#include "Target/AMDGPU/GCNSubtarget.h"

Inheritance diagram for llvm::GCNSubtarget:

Public Types
enum class	TrapHandlerAbi { NONE = 0x00 , AMDHSA = 0x01 }

enum class	TrapID { LLVMAMDHSATrap = 0x02 , LLVMAMDHSADebugTrap = 0x03 }

Public Types inherited from llvm::AMDGPUSubtarget
enum	Generation { INVALID = 0 , R600 = 1 , R700 = 2 , EVERGREEN = 3 , NORTHERN_ISLANDS = 4 , SOUTHERN_ISLANDS = 5 , SEA_ISLANDS = 6 , VOLCANIC_ISLANDS = 7 , GFX9 = 8 , GFX10 = 9 , GFX11 = 10 }

Public Member Functions
	GCNSubtarget (const Triple &TT, StringRef GPU, StringRef FS, const GCNTargetMachine &TM)

	~GCNSubtarget () override

GCNSubtarget &	initializeSubtargetDependencies (const Triple &TT, StringRef GPU, StringRef FS)

const SIInstrInfo *	getInstrInfo () const override

const SIFrameLowering *	getFrameLowering () const override

const SITargetLowering *	getTargetLowering () const override

const SIRegisterInfo *	getRegisterInfo () const override

const CallLowering *	getCallLowering () const override

const InlineAsmLowering *	getInlineAsmLowering () const override

InstructionSelector *	getInstructionSelector () const override

const LegalizerInfo *	getLegalizerInfo () const override

const AMDGPURegisterBankInfo *	getRegBankInfo () const override

const AMDGPU::IsaInfo::AMDGPUTargetID &	getTargetID () const

const SelectionDAGTargetInfo *	getSelectionDAGInfo () const override

const InstrItineraryData *	getInstrItineraryData () const override

void	ParseSubtargetFeatures (StringRef CPU, StringRef TuneCPU, StringRef FS)

Generation	getGeneration () const

unsigned	getMaxWaveScratchSize () const

unsigned	getKnownHighZeroBitsForFrameIndex () const
	Return the number of high bits known to be zero for a frame index.

int	getLDSBankCount () const

unsigned	getMaxPrivateElementSize (bool ForBufferRSrc=false) const

unsigned	getConstantBusLimit (unsigned Opcode) const

bool	zeroesHigh16BitsOfDest (unsigned Opcode) const
	Returns if the result of this instruction with a 16-bit result returned in a 32-bit register implicitly zeroes the high 16-bits, rather than preserve the original value.

bool	supportsWGP () const

bool	hasIntClamp () const

bool	hasFP64 () const

bool	hasMIMG_R128 () const

bool	hasHWFP64 () const

bool	hasHalfRate64Ops () const

bool	hasFullRate64Ops () const

bool	hasAddr64 () const

bool	hasFlat () const

bool	hasOnlyRevVALUShifts () const

bool	hasFractBug () const

bool	hasBFE () const

bool	hasBFI () const

bool	hasBFM () const

bool	hasBCNT (unsigned Size) const

bool	hasFFBL () const

bool	hasFFBH () const

bool	hasMed3_16 () const

bool	hasMin3Max3_16 () const

bool	hasFmaMixInsts () const

bool	hasCARRY () const

bool	hasFMA () const

bool	hasSwap () const

bool	hasScalarPackInsts () const

bool	hasScalarMulHiInsts () const

TrapHandlerAbi	getTrapHandlerAbi () const

bool	supportsGetDoorbellID () const

bool	hasUsableDSOffset () const
	True if the offset field of DS instructions works as expected.

bool	unsafeDSOffsetFoldingEnabled () const

bool	hasUsableDivScaleConditionOutput () const
	Condition output from div_scale is usable.

bool	hasReadVCCZBug () const
	Extra wait hazard is needed in some cases before s_cbranch_vccnz/s_cbranch_vccz.

bool	partialVCCWritesUpdateVCCZ () const
	Writes to VCC_LO/VCC_HI update the VCCZ flag.

bool	hasSMRDReadVALUDefHazard () const
	A read of an SGPR by SMRD instruction requires 4 wait states when the SGPR was written by a VALU instruction.

bool	hasVMEMReadSGPRVALUDefHazard () const
	A read of an SGPR by a VMEM instruction requires 5 wait states when the SGPR was written by a VALU Instruction.

bool	hasRFEHazards () const

unsigned	getSetRegWaitStates () const
	Number of hazard wait states for s_setreg_b32/s_setreg_imm32_b32.

bool	dumpCode () const

unsigned	getMaxLocalMemSizeWithWaveCount (unsigned WaveCount, const Function &) const
	Return the amount of LDS that can be used that will not restrict the occupancy lower than WaveCount.

bool	supportsMinMaxDenormModes () const

bool	hasDenormModeInst () const

bool	useFlatForGlobal () const

bool	useDS128 () const

bool	hasDS96AndDS128 () const

bool	haveRoundOpsF64 () const
	Have v_trunc_f64, v_ceil_f64, v_rndne_f64.

bool	privateMemoryResourceIsRangeChecked () const

bool	usePRTStrictNull () const

bool	hasAutoWaitcntBeforeBarrier () const

bool	supportsBackOffBarrier () const

bool	hasUnalignedBufferAccess () const

bool	hasUnalignedBufferAccessEnabled () const

bool	hasUnalignedDSAccess () const

bool	hasUnalignedDSAccessEnabled () const

bool	hasUnalignedScratchAccess () const

bool	hasUnalignedAccessMode () const

bool	hasApertureRegs () const

bool	isTrapHandlerEnabled () const

bool	isXNACKEnabled () const

bool	isTgSplitEnabled () const

bool	isCuModeEnabled () const

bool	hasFlatAddressSpace () const

bool	hasFlatScrRegister () const

bool	hasFlatInstOffsets () const

bool	hasFlatGlobalInsts () const

bool	hasFlatScratchInsts () const

bool	hasFlatScratchSTMode () const

bool	hasFlatScratchSVSMode () const

bool	hasScalarFlatScratchInsts () const

bool	enableFlatScratch () const

bool	hasGlobalAddTidInsts () const

bool	hasAtomicCSub () const

bool	hasMultiDwordFlatScratchAddressing () const

bool	hasFlatSegmentOffsetBug () const

bool	hasFlatLgkmVMemCountInOrder () const

bool	hasD16LoadStore () const

bool	d16PreservesUnusedBits () const

bool	hasD16Images () const

bool	ldsRequiresM0Init () const
	Return if most LDS instructions have an m0 use that require m0 to be initialized.

bool	hasGWSAutoReplay () const

bool	hasGWSSemaReleaseAll () const

bool	hasAddNoCarry () const

bool	hasUnpackedD16VMem () const

bool	isMesaGfxShader (const Function &F) const

bool	hasMad64_32 () const

bool	hasSDWAOmod () const

bool	hasSDWAScalar () const

bool	hasSDWASdst () const

bool	hasSDWAMac () const

bool	hasSDWAOutModsVOPC () const

bool	hasDLInsts () const

bool	hasFmacF64Inst () const

bool	hasDot1Insts () const

bool	hasDot2Insts () const

bool	hasDot3Insts () const

bool	hasDot4Insts () const

bool	hasDot5Insts () const

bool	hasDot6Insts () const

bool	hasDot7Insts () const

bool	hasDot8Insts () const

bool	hasDot9Insts () const

bool	hasDot10Insts () const

bool	hasMAIInsts () const

bool	hasFP8Insts () const

bool	hasPkFmacF16Inst () const

bool	hasAtomicDsPkAdd16Insts () const

bool	hasAtomicFlatPkAdd16Insts () const

bool	hasAtomicFaddInsts () const

bool	hasAtomicFaddRtnInsts () const

bool	hasAtomicFaddNoRtnInsts () const

bool	hasAtomicBufferGlobalPkAddF16NoRtnInsts () const

bool	hasAtomicBufferGlobalPkAddF16Insts () const

bool	hasAtomicGlobalPkAddBF16Inst () const

bool	hasFlatAtomicFaddF32Inst () const

bool	hasNoSdstCMPX () const

bool	hasVscnt () const

bool	hasGetWaveIdInst () const

bool	hasSMemTimeInst () const

bool	hasShaderCyclesRegister () const

bool	hasVOP3Literal () const

bool	hasNoDataDepHazard () const

bool	vmemWriteNeedsExpWaitcnt () const

bool	hasInstPrefetch () const

Align	getStackAlignment () const

bool	enableMachineScheduler () const override

bool	useAA () const override

bool	enableSubRegLiveness () const override

void	setScalarizeGlobalBehavior (bool b)

bool	getScalarizeGlobalBehavior () const

bool	enableEarlyIfConversion () const override

void	overrideSchedPolicy (MachineSchedPolicy &Policy, unsigned NumRegionInstrs) const override

unsigned	getMaxNumUserSGPRs () const

bool	hasSMemRealTime () const

bool	hasMovrel () const

bool	hasVGPRIndexMode () const

bool	useVGPRIndexMode () const

bool	hasScalarCompareEq64 () const

bool	hasScalarStores () const

bool	hasScalarAtomics () const

bool	hasLDSFPAtomicAdd () const

bool	hasPermLaneX16 () const

bool	hasPermLane64 () const

bool	hasDPP () const

bool	hasDPPBroadcasts () const

bool	hasDPPWavefrontShifts () const

bool	hasDPP8 () const

bool	hasDPALU_DPP () const

bool	hasPackedFP32Ops () const

bool	hasPkMovB32 () const

bool	hasFmaakFmamkF32Insts () const

bool	hasImageInsts () const

bool	hasExtendedImageInsts () const

bool	hasR128A16 () const

bool	hasA16 () const

bool	hasG16 () const

bool	hasOffset3fBug () const

bool	hasImageStoreD16Bug () const

bool	hasImageGather4D16Bug () const

bool	hasMADIntraFwdBug () const

bool	hasNSAEncoding () const

bool	hasPartialNSAEncoding () const

unsigned	getNSAMaxSize () const

bool	hasGFX10_AEncoding () const

bool	hasGFX10_BEncoding () const

bool	hasGFX10_3Insts () const

bool	hasMadF16 () const

bool	hasMovB64 () const

bool	hasLshlAddB64 () const

bool	enableSIScheduler () const

bool	loadStoreOptEnabled () const

bool	hasSGPRInitBug () const

bool	hasUserSGPRInit16Bug () const

bool	hasNegativeScratchOffsetBug () const

bool	hasNegativeUnalignedScratchOffsetBug () const

bool	hasMFMAInlineLiteralBug () const

bool	has12DWordStoreHazard () const

bool	hasDwordx3LoadStores () const

bool	hasReadM0MovRelInterpHazard () const

bool	hasReadM0SendMsgHazard () const

bool	hasReadM0LdsDmaHazard () const

bool	hasReadM0LdsDirectHazard () const

bool	hasVcmpxPermlaneHazard () const

bool	hasVMEMtoScalarWriteHazard () const

bool	hasSMEMtoVectorWriteHazard () const

bool	hasLDSMisalignedBug () const

bool	hasInstFwdPrefetchBug () const

bool	hasVcmpxExecWARHazard () const

bool	hasLdsBranchVmemWARHazard () const

bool	hasShift64HighRegBug () const

bool	hasTransForwardingHazard () const

bool	hasDstSelForwardingHazard () const

bool	hasDOTOpSelHazard () const

bool	hasVDecCoExecHazard () const

bool	hasNSAtoVMEMBug () const

bool	hasNSAClauseBug () const

bool	hasHardClauses () const

bool	hasGFX90AInsts () const

bool	hasFPAtomicToDenormModeHazard () const

bool	hasVOP3DPP () const

bool	hasLdsDirect () const

bool	hasVALUPartialForwardingHazard () const

bool	hasVALUTransUseHazard () const

bool	hasForceStoreSC0SC1 () const

bool	hasVALUMaskWriteHazard () const

bool	needsAlignedVGPRs () const
	Return if operations acting on VGPR tuples require even alignment.

bool	hasSPackHL () const
	Return true if the target has the S_PACK_HL_B32_B16 instruction.

bool	hasCompressedExport () const
	Return true if the target's EXP instruction has the COMPR flag, which affects the meaning of the EN (enable) bits.

bool	hasNullExportTarget () const
	Return true if the target's EXP instruction supports the NULL export target.

bool	hasGFX11FullVGPRs () const

bool	hasVOPDInsts () const

bool	hasFlatScratchSVSSwizzleBug () const

bool	hasDelayAlu () const
	Return true if the target has the S_DELAY_ALU instruction.

bool	hasPackedTID () const

bool	hasGFX940Insts () const

bool	hasSALUFloatInsts () const

unsigned	getOccupancyWithNumSGPRs (unsigned SGPRs) const
	Return the maximum number of waves per SIMD for kernels using `SGPRs` SGPRs.

unsigned	getOccupancyWithNumVGPRs (unsigned VGPRs) const
	Return the maximum number of waves per SIMD for kernels using `VGPRs` VGPRs.

unsigned	computeOccupancy (const Function &F, unsigned LDSSize=0, unsigned NumSGPRs=0, unsigned NumVGPRs=0) const
	Return occupancy for the given function.

bool	flatScratchIsPointer () const

bool	flatScratchIsArchitected () const

bool	hasArchitectedSGPRs () const

bool	hasGDS () const

bool	hasGWS () const

bool	hasMergedShaders () const

bool	hasLegacyGeometry () const

bool	hasKernargPreload () const

bool	needsKernargPreloadBackwardsCompatibility () const

bool	hasCvtFP8VOP1Bug () const

unsigned	getSGPRAllocGranule () const

unsigned	getSGPREncodingGranule () const

unsigned	getTotalNumSGPRs () const

unsigned	getAddressableNumSGPRs () const

unsigned	getMinNumSGPRs (unsigned WavesPerEU) const

unsigned	getMaxNumSGPRs (unsigned WavesPerEU, bool Addressable) const

unsigned	getBaseReservedNumSGPRs (const bool HasFlatScratch) const

unsigned	getReservedNumSGPRs (const MachineFunction &MF) const

unsigned	getReservedNumSGPRs (const Function &F) const

unsigned	getBaseMaxNumSGPRs (const Function &F, std::pair< unsigned, unsigned > WavesPerEU, unsigned PreloadedSGPRs, unsigned ReservedNumSGPRs) const

unsigned	getMaxNumSGPRs (const MachineFunction &MF) const

unsigned	getMaxNumSGPRs (const Function &F) const

unsigned	getVGPRAllocGranule () const

unsigned	getVGPREncodingGranule () const

unsigned	getTotalNumVGPRs () const

unsigned	getAddressableNumVGPRs () const

unsigned	getMinNumVGPRs (unsigned WavesPerEU) const

unsigned	getMaxNumVGPRs (unsigned WavesPerEU) const

unsigned	getBaseMaxNumVGPRs (const Function &F, std::pair< unsigned, unsigned > WavesPerEU) const

unsigned	getMaxNumVGPRs (const Function &F) const

unsigned	getMaxNumAGPRs (const Function &F) const

unsigned	getMaxNumVGPRs (const MachineFunction &MF) const

void	getPostRAMutations (std::vector< std::unique_ptr< ScheduleDAGMutation > > &Mutations) const override

std::unique_ptr< ScheduleDAGMutation >	createFillMFMAShadowMutation (const TargetInstrInfo *TII) const

bool	isWave32 () const

bool	isWave64 () const

const TargetRegisterClass *	getBoolRC () const

unsigned	getMaxWorkGroupsPerCU (unsigned FlatWorkGroupSize) const override

unsigned	getMinFlatWorkGroupSize () const override

unsigned	getMaxFlatWorkGroupSize () const override

unsigned	getWavesPerEUForWorkGroup (unsigned FlatWorkGroupSize) const override

unsigned	getMinWavesPerEU () const override

void	adjustSchedDependency (SUnit Def, int DefOpIdx, SUnit Use, int UseOpIdx, SDep &Dep) const override

bool	shouldClusterStores () const

unsigned	getNSAThreshold (const MachineFunction &MF) const

bool	requiresNopBeforeDeallocVGPRs () const

unsigned	getMaxWavesPerEU () const

Public Member Functions inherited from llvm::AMDGPUSubtarget
	AMDGPUSubtarget (const Triple &TT)

std::pair< unsigned, unsigned >	getDefaultFlatWorkGroupSize (CallingConv::ID CC) const

std::pair< unsigned, unsigned >	getFlatWorkGroupSizes (const Function &F) const

std::pair< unsigned, unsigned >	getWavesPerEU (const Function &F) const

std::pair< unsigned, unsigned >	getWavesPerEU (const Function &F, std::pair< unsigned, unsigned > FlatWorkGroupSizes) const
	Overload which uses the specified values for the flat work group sizes, rather than querying the function itself.

std::pair< unsigned, unsigned >	getEffectiveWavesPerEU (std::pair< unsigned, unsigned > WavesPerEU, std::pair< unsigned, unsigned > FlatWorkGroupSizes) const

unsigned	getMaxLocalMemSizeWithWaveCount (unsigned WaveCount, const Function &) const
	Return the amount of LDS that can be used that will not restrict the occupancy lower than WaveCount.

unsigned	getOccupancyWithLocalMemSize (uint32_t Bytes, const Function &) const
	Inverse of getMaxLocalMemWithWaveCount.

unsigned	getOccupancyWithLocalMemSize (const MachineFunction &MF) const

bool	isAmdHsaOS () const

bool	isAmdPalOS () const

bool	isMesa3DOS () const

bool	isMesaKernel (const Function &F) const

bool	isAmdHsaOrMesa (const Function &F) const

bool	isGCN () const

bool	isGCN3Encoding () const

bool	has16BitInsts () const

bool	hasTrue16BitInsts () const
	Return true if the subtarget supports True16 instructions.

bool	useRealTrue16Insts () const
	Return true if real (non-fake) variants of True16 instructions using 16-bit registers should be code-generated.

bool	hasMadMixInsts () const

bool	hasMadMacF32Insts () const

bool	hasDsSrc2Insts () const

bool	hasSDWA () const

bool	hasVOP3PInsts () const

bool	hasMulI24 () const

bool	hasMulU24 () const

bool	hasSMulHi () const

bool	hasInv2PiInlineImm () const

bool	hasFminFmaxLegacy () const

bool	hasTrigReducedRange () const

bool	hasFastFMAF32 () const

bool	isPromoteAllocaEnabled () const

unsigned	getWavefrontSize () const

unsigned	getWavefrontSizeLog2 () const

unsigned	getLocalMemorySize () const

unsigned	getAddressableLocalMemorySize () const

unsigned	getEUsPerCU () const
	Number of SIMDs/EUs (execution units) per "CU" ("compute unit"), where the "CU" is the unit onto which workgroups are mapped.

Align	getAlignmentForImplicitArgPtr () const

unsigned	getExplicitKernelArgOffset () const
	Returns the offset in bytes from the start of the input buffer of the first explicit kernel argument.

virtual unsigned	getMaxWorkGroupsPerCU (unsigned FlatWorkGroupSize) const =0

virtual unsigned	getMinFlatWorkGroupSize () const =0

virtual unsigned	getMaxFlatWorkGroupSize () const =0

virtual unsigned	getWavesPerEUForWorkGroup (unsigned FlatWorkGroupSize) const =0

virtual unsigned	getMinWavesPerEU () const =0

unsigned	getMaxWavesPerEU () const

unsigned	getMaxWorkitemID (const Function &Kernel, unsigned Dimension) const
	Return the maximum workitem ID value in the function, for the given (0, 1, 2) dimension.

bool	isSingleLaneExecution (const Function &Kernel) const
	Return true if only a single workitem can be active in a wave.

bool	makeLIDRangeMetadata (Instruction *I) const
	Creates value range metadata on an workitemid.* intrinsic call or load.

unsigned	getImplicitArgNumBytes (const Function &F) const

uint64_t	getExplicitKernArgSize (const Function &F, Align &MaxAlign) const

unsigned	getKernArgSegmentSize (const Function &F, Align &MaxAlign) const

AMDGPUDwarfFlavour	getAMDGPUDwarfFlavour () const

virtual	~AMDGPUSubtarget ()=default

Static Public Member Functions
static bool	hasHalfRate64Ops (const TargetSubtargetInfo &STI)

Static Public Member Functions inherited from llvm::AMDGPUSubtarget
static const AMDGPUSubtarget &	get (const MachineFunction &MF)

static const AMDGPUSubtarget &	get (const TargetMachine &TM, const Function &F)

Protected Attributes
Triple	TargetTriple

AMDGPU::IsaInfo::AMDGPUTargetID	TargetID

unsigned	Gen = INVALID

InstrItineraryData	InstrItins

int	LDSBankCount = 0

unsigned	MaxPrivateElementSize = 0

bool	FastDenormalF32 = false

bool	HalfRate64Ops = false

bool	FullRate64Ops = false

bool	FlatForGlobal = false

bool	AutoWaitcntBeforeBarrier = false

bool	BackOffBarrier = false

bool	UnalignedScratchAccess = false

bool	UnalignedAccessMode = false

bool	HasApertureRegs = false

bool	SupportsXNACK = false

bool	KernargPreload = false

bool	EnableXNACK = false

bool	EnableTgSplit = false

bool	EnableCuMode = false

bool	TrapHandler = false

bool	EnableLoadStoreOpt = false

bool	EnableUnsafeDSOffsetFolding = false

bool	EnableSIScheduler = false

bool	EnableDS128 = false

bool	EnablePRTStrictNull = false

bool	DumpCode = false

bool	FP64 = false

bool	FMA = false

bool	MIMG_R128 = false

bool	CIInsts = false

bool	GFX8Insts = false

bool	GFX9Insts = false

bool	GFX90AInsts = false

bool	GFX940Insts = false

bool	GFX10Insts = false

bool	GFX11Insts = false

bool	GFX10_3Insts = false

bool	GFX7GFX8GFX9Insts = false

bool	SGPRInitBug = false

bool	UserSGPRInit16Bug = false

bool	NegativeScratchOffsetBug = false

bool	NegativeUnalignedScratchOffsetBug = false

bool	HasSMemRealTime = false

bool	HasIntClamp = false

bool	HasFmaMixInsts = false

bool	HasMovrel = false

bool	HasVGPRIndexMode = false

bool	HasScalarStores = false

bool	HasScalarAtomics = false

bool	HasSDWAOmod = false

bool	HasSDWAScalar = false

bool	HasSDWASdst = false

bool	HasSDWAMac = false

bool	HasSDWAOutModsVOPC = false

bool	HasDPP = false

bool	HasDPP8 = false

bool	HasDPALU_DPP = false

bool	HasPackedFP32Ops = false

bool	HasImageInsts = false

bool	HasExtendedImageInsts = false

bool	HasR128A16 = false

bool	HasA16 = false

bool	HasG16 = false

bool	HasNSAEncoding = false

bool	HasPartialNSAEncoding = false

bool	GFX10_AEncoding = false

bool	GFX10_BEncoding = false

bool	HasDLInsts = false

bool	HasFmacF64Inst = false

bool	HasDot1Insts = false

bool	HasDot2Insts = false

bool	HasDot3Insts = false

bool	HasDot4Insts = false

bool	HasDot5Insts = false

bool	HasDot6Insts = false

bool	HasDot7Insts = false

bool	HasDot8Insts = false

bool	HasDot9Insts = false

bool	HasDot10Insts = false

bool	HasMAIInsts = false

bool	HasFP8Insts = false

bool	HasPkFmacF16Inst = false

bool	HasAtomicDsPkAdd16Insts = false

bool	HasAtomicFlatPkAdd16Insts = false

bool	HasAtomicFaddRtnInsts = false

bool	HasAtomicFaddNoRtnInsts = false

bool	HasAtomicBufferGlobalPkAddF16NoRtnInsts = false

bool	HasAtomicBufferGlobalPkAddF16Insts = false

bool	HasAtomicGlobalPkAddBF16Inst = false

bool	HasFlatAtomicFaddF32Inst = false

bool	SupportsSRAMECC = false

bool	EnableSRAMECC = false

bool	HasNoSdstCMPX = false

bool	HasVscnt = false

bool	HasGetWaveIdInst = false

bool	HasSMemTimeInst = false

bool	HasShaderCyclesRegister = false

bool	HasVOP3Literal = false

bool	HasNoDataDepHazard = false

bool	FlatAddressSpace = false

bool	FlatInstOffsets = false

bool	FlatGlobalInsts = false

bool	FlatScratchInsts = false

bool	ScalarFlatScratchInsts = false

bool	HasArchitectedFlatScratch = false

bool	EnableFlatScratch = false

bool	HasArchitectedSGPRs = false

bool	HasGDS = false

bool	HasGWS = false

bool	AddNoCarryInsts = false

bool	HasUnpackedD16VMem = false

bool	LDSMisalignedBug = false

bool	HasMFMAInlineLiteralBug = false

bool	UnalignedBufferAccess = false

bool	UnalignedDSAccess = false

bool	HasPackedTID = false

bool	ScalarizeGlobal = false

bool	HasSALUFloatInsts = false

bool	HasVcmpxPermlaneHazard = false

bool	HasVMEMtoScalarWriteHazard = false

bool	HasSMEMtoVectorWriteHazard = false

bool	HasInstFwdPrefetchBug = false

bool	HasVcmpxExecWARHazard = false

bool	HasLdsBranchVmemWARHazard = false

bool	HasNSAtoVMEMBug = false

bool	HasNSAClauseBug = false

bool	HasOffset3fBug = false

bool	HasFlatSegmentOffsetBug = false

bool	HasImageStoreD16Bug = false

bool	HasImageGather4D16Bug = false

bool	HasGFX11FullVGPRs = false

bool	HasMADIntraFwdBug = false

bool	HasVOPDInsts = false

bool	HasVALUTransUseHazard = false

bool	HasForceStoreSC0SC1 = false

bool	FeatureDisable = false

SelectionDAGTargetInfo	TSInfo

Protected Attributes inherited from llvm::AMDGPUSubtarget
bool	GCN3Encoding = false

bool	Has16BitInsts = false

bool	HasTrue16BitInsts = false

bool	EnableRealTrue16Insts = false

bool	HasMadMixInsts = false

bool	HasMadMacF32Insts = false

bool	HasDsSrc2Insts = false

bool	HasSDWA = false

bool	HasVOP3PInsts = false

bool	HasMulI24 = true

bool	HasMulU24 = true

bool	HasSMulHi = false

bool	HasInv2PiInlineImm = false

bool	HasFminFmaxLegacy = true

bool	EnablePromoteAlloca = false

bool	HasTrigReducedRange = false

bool	FastFMAF32 = false

unsigned	EUsPerCU = 4

unsigned	MaxWavesPerEU = 10

unsigned	LocalMemorySize = 0

unsigned	AddressableLocalMemorySize = 0

char	WavefrontSizeLog2 = 0

Detailed Description

Definition at line 34 of file GCNSubtarget.h.

Member Enumeration Documentation

◆ TrapHandlerAbi

enum class llvm::GCNSubtarget::TrapHandlerAbi

strong

Enumerator
NONE
AMDHSA

Definition at line 41 of file GCNSubtarget.h.

◆ TrapID

enum class llvm::GCNSubtarget::TrapID

strong

Enumerator
LLVMAMDHSATrap
LLVMAMDHSADebugTrap

Definition at line 46 of file GCNSubtarget.h.

Constructor & Destructor Documentation

◆ GCNSubtarget()

GCNSubtarget::GCNSubtarget	(	const Triple &	TT,
		StringRef	GPU,
		StringRef	FS,
		const GCNTargetMachine &	TM
	)

Definition at line 174 of file AMDGPUSubtarget.cpp.

References llvm::AMDGPUSubtarget::EUsPerCU, llvm::AMDGPU::IsaInfo::getEUsPerCU(), llvm::AMDGPU::IsaInfo::getMaxWavesPerEU(), getTargetLowering(), InstrInfo, llvm::AMDGPUSubtarget::MaxWavesPerEU, and TM.

◆ ~GCNSubtarget()

GCNSubtarget::~GCNSubtarget ( )

overridedefault

Member Function Documentation

◆ adjustSchedDependency()

void GCNSubtarget::adjustSchedDependency	(	SUnit *	Def,
		int	DefOpIdx,
		SUnit *	Use,
		int	UseOpIdx,
		SDep &	Dep
	)		const

override

Definition at line 848 of file AMDGPUSubtarget.cpp.

References llvm::TargetSchedModel::computeOperandLatency(), llvm::SDep::Data, E, getInstrItineraryData(), llvm::SIInstrInfo::getInstrLatency(), llvm::ilist_node_impl< OptionsT >::getIterator(), llvm::SDep::getKind(), llvm::SDep::getLatency(), llvm::MachineInstr::getParent(), llvm::SDep::getReg(), getRegisterInfo(), llvm::SIInstrInfo::getSchedModel(), I, llvm::MachineBasicBlock::instr_end(), llvm::MachineInstr::isBundle(), llvm::SDep::setLatency(), and TRI.

◆ computeOccupancy()

unsigned GCNSubtarget::computeOccupancy	(	const Function &	F,
		unsigned	LDSSize = `0`,
		unsigned	NumSGPRs = `0`,
		unsigned	NumVGPRs = `0`
	)		const

Return occupancy for the given function.

Used LDS and a number of registers if provided. Note, occupancy can be affected by the scratch allocation as well, but we do not have enough information to compute it.

Definition at line 711 of file AMDGPUSubtarget.cpp.

References F, getMaxWavesPerEU(), llvm::AMDGPUSubtarget::getOccupancyWithLocalMemSize(), getOccupancyWithNumSGPRs(), and getOccupancyWithNumVGPRs().

Referenced by llvm::PreRARematStage::initGCNSchedStage().

◆ createFillMFMAShadowMutation()

std::unique_ptr< ScheduleDAGMutation > GCNSubtarget::createFillMFMAShadowMutation ( const TargetInstrInfo * TII ) const

Definition at line 998 of file AMDGPUSubtarget.cpp.

References EnablePowerSched.

◆ d16PreservesUnusedBits()

bool llvm::GCNSubtarget::d16PreservesUnusedBits ( ) const

inline

Definition at line 639 of file GCNSubtarget.h.

References hasD16LoadStore(), llvm::AMDGPU::IsaInfo::AMDGPUTargetID::isSramEccOnOrAny(), and TargetID.

Referenced by AMDGPUDAGToDAGISel::matchLoadD16FromBuildVector(), and AMDGPUDAGToDAGISel::PreprocessISelDAG().

◆ dumpCode()

bool llvm::GCNSubtarget::dumpCode ( ) const

inline

Definition at line 473 of file GCNSubtarget.h.

References DumpCode.

Referenced by llvm::AMDGPUAsmPrinter::runOnMachineFunction().

◆ enableEarlyIfConversion()

bool llvm::GCNSubtarget::enableEarlyIfConversion ( ) const

inlineoverride

Definition at line 853 of file GCNSubtarget.h.

◆ enableFlatScratch()

bool llvm::GCNSubtarget::enableFlatScratch ( ) const

inline

Definition at line 610 of file GCNSubtarget.h.

References EnableFlatScratch, flatScratchIsArchitected(), and hasFlatScratchInsts().

Referenced by llvm::SITargetLowering::allowsMisalignedMemoryAccessesImpl(), llvm::SIRegisterInfo::buildVGPRSpillLoadStore(), llvm::SIRegisterInfo::eliminateFrameIndex(), getMaxPrivateElementSize(), llvm::SITargetLowering::LowerCall(), llvm::SITargetLowering::LowerFormalArguments(), and llvm::SIRegisterInfo::materializeFrameBaseRegister().

◆ enableMachineScheduler()

bool llvm::GCNSubtarget::enableMachineScheduler ( ) const

inlineoverride

Definition at line 836 of file GCNSubtarget.h.

◆ enableSIScheduler()

bool llvm::GCNSubtarget::enableSIScheduler ( ) const

inline

Definition at line 981 of file GCNSubtarget.h.

References EnableSIScheduler.

Referenced by overrideSchedPolicy().

◆ enableSubRegLiveness()

bool llvm::GCNSubtarget::enableSubRegLiveness ( ) const

inlineoverride

Definition at line 842 of file GCNSubtarget.h.

◆ flatScratchIsArchitected()

bool llvm::GCNSubtarget::flatScratchIsArchitected ( ) const

inline

Returns: true if the flat_scratch register is initialized by the HW. In this case it is readonly.

Definition at line 1165 of file GCNSubtarget.h.

References HasArchitectedFlatScratch.

Referenced by enableFlatScratch().

◆ flatScratchIsPointer()

bool llvm::GCNSubtarget::flatScratchIsPointer ( ) const

inline

Returns: true if the flat_scratch register should be initialized with the pointer to the wave's scratch memory rather than a size and offset.

Definition at line 1159 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

◆ getAddressableNumSGPRs()

unsigned llvm::GCNSubtarget::getAddressableNumSGPRs ( ) const

inline

Returns: Addressable number of SGPRs supported by the subtarget.

Definition at line 1213 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getAddressableNumSGPRs().

◆ getAddressableNumVGPRs()

unsigned llvm::GCNSubtarget::getAddressableNumVGPRs ( ) const

inline

Returns: Addressable number of VGPRs supported by the subtarget.

Definition at line 1283 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getAddressableNumVGPRs().

◆ getBaseMaxNumSGPRs()

unsigned GCNSubtarget::getBaseMaxNumSGPRs	(	const Function &	F,
		std::pair< unsigned, unsigned >	WavesPerEU,
		unsigned	PreloadedSGPRs,
		unsigned	ReservedNumSGPRs
	)		const

Returns: max num SGPRs. This is the common utility function called by MachineFunction and Function variants of getMaxNumSGPRs.

Definition at line 724 of file AMDGPUSubtarget.cpp.

References F, llvm::AMDGPU::IsaInfo::FIXED_NUM_SGPRS_FOR_INIT_BUG, getMaxNumSGPRs(), getMinNumSGPRs(), and hasSGPRInitBug().

Referenced by getMaxNumSGPRs().

◆ getBaseMaxNumVGPRs()

unsigned GCNSubtarget::getBaseMaxNumVGPRs	(	const Function &	F,
		std::pair< unsigned, unsigned >	WavesPerEU
	)		const

Returns: max num VGPRs. This is the common utility function called by MachineFunction and Function variants of getMaxNumVGPRs.

Definition at line 808 of file AMDGPUSubtarget.cpp.

References F, getMaxNumVGPRs(), getMinNumVGPRs(), and hasGFX90AInsts().

Referenced by getMaxNumVGPRs().

◆ getBaseReservedNumSGPRs()

unsigned GCNSubtarget::getBaseReservedNumSGPRs ( const bool HasFlatScratch ) const

Returns: Reserved number of SGPRs. This is common utility function called by MachineFunction and Function variants of getReservedNumSGPRs.

Definition at line 682 of file AMDGPUSubtarget.cpp.

References getGeneration(), llvm::AMDGPUSubtarget::GFX10, HasArchitectedFlatScratch, isXNACKEnabled(), llvm::AMDGPUSubtarget::SEA_ISLANDS, and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.

Referenced by getReservedNumSGPRs().

◆ getBoolRC()

const TargetRegisterClass * llvm::GCNSubtarget::getBoolRC ( ) const

inline

Definition at line 1342 of file GCNSubtarget.h.

References llvm::SIRegisterInfo::getBoolRC(), and getRegisterInfo().

◆ getCallLowering()

const CallLowering * llvm::GCNSubtarget::getCallLowering ( ) const

inlineoverride

Definition at line 248 of file GCNSubtarget.h.

◆ getConstantBusLimit()

unsigned GCNSubtarget::getConstantBusLimit ( unsigned Opcode ) const

Definition at line 196 of file AMDGPUSubtarget.cpp.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX10.

Referenced by llvm::SIRegisterInfo::buildSpillLoadStore(), llvm::SIInstrInfo::convertToThreeAddress(), llvm::SIInstrInfo::FoldImmediate(), llvm::SIInstrInfo::isOperandLegal(), llvm::SIInstrInfo::legalizeOperandsVOP2(), llvm::SIInstrInfo::legalizeOperandsVOP3(), and llvm::SIInstrInfo::verifyInstruction().

◆ getFrameLowering()

const SIFrameLowering * llvm::GCNSubtarget::getFrameLowering ( ) const

inlineoverride

Definition at line 236 of file GCNSubtarget.h.

Referenced by llvm::SIRegisterInfo::getFrameRegister(), and llvm::SITargetLowering::lowerDYNAMIC_STACKALLOCImpl().

◆ getGeneration()

Generation llvm::GCNSubtarget::getGeneration ( ) const

inline

Definition at line 283 of file GCNSubtarget.h.

References Gen.

Referenced by flatScratchIsPointer(), getBaseReservedNumSGPRs(), getConstantBusLimit(), llvm::SIInstrInfo::getDefaultRsrcDataFormat(), getMaxWaveScratchSize(), getOccupancyWithNumSGPRs(), llvm::SIInstrInfo::getScratchRsrcWords23(), getSetRegWaitStates(), has12DWordStoreHazard(), hasAddr64(), hasD16Images(), hasD16LoadStore(), hasDenormModeInst(), hasDPPBroadcasts(), hasDPPWavefrontShifts(), hasFlat(), hasFlatLgkmVMemCountInOrder(), hasFlatScratchSVSSwizzleBug(), hasFmaakFmamkF32Insts(), hasFPAtomicToDenormModeHazard(), hasFractBug(), hasGWSAutoReplay(), hasHardClauses(), hasInstPrefetch(), hasLdsDirect(), hasLegacyGeometry(), hasMad64_32(), hasMed3_16(), hasMergedShaders(), hasMin3Max3_16(), hasMultiDwordFlatScratchAddressing(), hasOnlyRevVALUShifts(), hasPermLane64(), hasPermLaneX16(), hasReadM0LdsDirectHazard(), hasReadM0LdsDmaHazard(), hasReadM0MovRelInterpHazard(), hasReadM0SendMsgHazard(), hasReadVCCZBug(), hasRFEHazards(), hasScalarCompareEq64(), hasSMRDReadVALUDefHazard(), hasUsableDivScaleConditionOutput(), hasUsableDSOffset(), hasVALUMaskWriteHazard(), hasVALUPartialForwardingHazard(), hasVMEMReadSGPRVALUDefHazard(), hasVOP3DPP(), initializeSubtargetDependencies(), llvm::SITargetLowering::isLegalAddressingMode(), ldsRequiresM0Init(), llvm::AMDGPULegalizerInfo::legalizeMul(), llvm::SIInstrInfo::legalizeOperands(), llvm::AMDGPULegalizerInfo::legalizeRsqClampIntrinsic(), llvm::SITargetLowering::LowerFormalArguments(), partialVCCWritesUpdateVCCZ(), privateMemoryResourceIsRangeChecked(), llvm::SIInstrInfo::pseudoToMCOpcode(), shouldClusterStores(), llvm::SIInstrInfo::splitMUBUFOffset(), supportsGetDoorbellID(), supportsMinMaxDenormModes(), supportsWGP(), llvm::SIInstrInfo::verifyInstruction(), vmemWriteNeedsExpWaitcnt(), and zeroesHigh16BitsOfDest().

◆ getInlineAsmLowering()

const InlineAsmLowering * llvm::GCNSubtarget::getInlineAsmLowering ( ) const

inlineoverride

Definition at line 252 of file GCNSubtarget.h.

◆ getInstrInfo()

const SIInstrInfo * llvm::GCNSubtarget::getInstrInfo ( ) const

inlineoverride

Definition at line 232 of file GCNSubtarget.h.

References InstrInfo.

◆ getInstrItineraryData()

const InstrItineraryData * llvm::GCNSubtarget::getInstrItineraryData ( ) const

inlineoverride

Definition at line 277 of file GCNSubtarget.h.

References InstrItins.

Referenced by adjustSchedDependency().

◆ getInstructionSelector()

InstructionSelector * llvm::GCNSubtarget::getInstructionSelector ( ) const

inlineoverride

Definition at line 256 of file GCNSubtarget.h.

◆ getKnownHighZeroBitsForFrameIndex()

unsigned llvm::GCNSubtarget::getKnownHighZeroBitsForFrameIndex ( ) const

inline

Return the number of high bits known to be zero for a frame index.

Definition at line 298 of file GCNSubtarget.h.

References llvm::countl_zero(), getMaxWaveScratchSize(), and llvm::AMDGPUSubtarget::getWavefrontSizeLog2().

Referenced by llvm::SITargetLowering::LowerFormalArguments().

◆ getLDSBankCount()

int llvm::GCNSubtarget::getLDSBankCount ( ) const

inline

Definition at line 302 of file GCNSubtarget.h.

References LDSBankCount.

◆ getLegalizerInfo()

const LegalizerInfo * llvm::GCNSubtarget::getLegalizerInfo ( ) const

inlineoverride

Definition at line 260 of file GCNSubtarget.h.

◆ getMaxFlatWorkGroupSize()

unsigned llvm::GCNSubtarget::getMaxFlatWorkGroupSize ( ) const

inlineoverridevirtual

Returns: Maximum flat work group size supported by the subtarget.

Implements llvm::AMDGPUSubtarget.

Definition at line 1358 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getMaxFlatWorkGroupSize().

◆ getMaxLocalMemSizeWithWaveCount()

unsigned llvm::GCNSubtarget::getMaxLocalMemSizeWithWaveCount	(	unsigned	WaveCount,
		const Function &
	)		const

Return the amount of LDS that can be used that will not restrict the occupancy lower than WaveCount.

◆ getMaxNumAGPRs()

unsigned llvm::GCNSubtarget::getMaxNumAGPRs ( const Function & F ) const

inline

Definition at line 1313 of file GCNSubtarget.h.

References F, and getMaxNumVGPRs().

◆ getMaxNumSGPRs() [1/3]

unsigned GCNSubtarget::getMaxNumSGPRs ( const Function & F ) const

Returns: Maximum number of SGPRs that meets number of waves per execution unit requirement for function F, or number of SGPRs explicitly requested using "amdgpu-num-sgpr" attribute attached to function F.; Value that meets number of waves per execution unit requirement if explicitly requested value cannot be converted to integer, violates subtarget's specifications, or does not meet number of waves per execution unit requirement.

Definition at line 803 of file AMDGPUSubtarget.cpp.

References F, getBaseMaxNumSGPRs(), getMaxNumPreloadedSGPRs(), getReservedNumSGPRs(), and llvm::AMDGPUSubtarget::getWavesPerEU().

◆ getMaxNumSGPRs() [2/3]

unsigned GCNSubtarget::getMaxNumSGPRs ( const MachineFunction & MF ) const

Returns: Maximum number of SGPRs that meets number of waves per execution unit requirement for function MF, or number of SGPRs explicitly requested using "amdgpu-num-sgpr" attribute attached to function MF.; Value that meets number of waves per execution unit requirement if explicitly requested value cannot be converted to integer, violates subtarget's specifications, or does not meet number of waves per execution unit requirement.

Definition at line 771 of file AMDGPUSubtarget.cpp.

References F, getBaseMaxNumSGPRs(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getInfo(), llvm::SIMachineFunctionInfo::getNumPreloadedSGPRs(), getReservedNumSGPRs(), and llvm::SIMachineFunctionInfo::getWavesPerEU().

◆ getMaxNumSGPRs() [3/3]

unsigned llvm::GCNSubtarget::getMaxNumSGPRs	(	unsigned	WavesPerEU,
		bool	Addressable
	)		const

inline

Returns: Maximum number of SGPRs that meets the given number of waves per execution unit requirement supported by the subtarget.

Definition at line 1225 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getMaxNumSGPRs().

Referenced by llvm::GCNSchedStage::checkScheduling(), llvm::SIRegisterInfo::getAlignedHighSGPRForRC(), llvm::SIRegisterInfo::getAllSGPR128(), llvm::SIRegisterInfo::getAllSGPR32(), llvm::SIRegisterInfo::getAllSGPR64(), getBaseMaxNumSGPRs(), llvm::SIRegisterInfo::getRegPressureLimit(), and llvm::SIRegisterInfo::getReservedRegs().

◆ getMaxNumUserSGPRs()

unsigned llvm::GCNSubtarget::getMaxNumUserSGPRs ( ) const

inline

Definition at line 860 of file GCNSubtarget.h.

References llvm::AMDGPU::getMaxNumUserSGPRs().

◆ getMaxNumVGPRs() [1/3]

unsigned GCNSubtarget::getMaxNumVGPRs ( const Function & F ) const

Returns: Maximum number of VGPRs that meets number of waves per execution unit requirement for function F, or number of VGPRs explicitly requested using "amdgpu-num-vgpr" attribute attached to function F.; Value that meets number of waves per execution unit requirement if explicitly requested value cannot be converted to integer, violates subtarget's specifications, or does not meet number of waves per execution unit requirement.

Definition at line 838 of file AMDGPUSubtarget.cpp.

References F, getBaseMaxNumVGPRs(), and llvm::AMDGPUSubtarget::getWavesPerEU().

◆ getMaxNumVGPRs() [2/3]

unsigned GCNSubtarget::getMaxNumVGPRs ( const MachineFunction & MF ) const

Returns: Maximum number of VGPRs that meets number of waves per execution unit requirement for function MF, or number of VGPRs explicitly requested using "amdgpu-num-vgpr" attribute attached to function MF.; Value that meets number of waves per execution unit requirement if explicitly requested value cannot be converted to integer, violates subtarget's specifications, or does not meet number of waves per execution unit requirement.

Definition at line 842 of file AMDGPUSubtarget.cpp.

References F, getBaseMaxNumVGPRs(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getInfo(), and llvm::SIMachineFunctionInfo::getWavesPerEU().

◆ getMaxNumVGPRs() [3/3]

unsigned llvm::GCNSubtarget::getMaxNumVGPRs ( unsigned WavesPerEU ) const

inline

Returns: the maximum number of VGPRs that can be used and still achieved at least the specified number of waves WavesPerEU.

Definition at line 1295 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getMaxNumVGPRs().

Referenced by llvm::SITargetLowering::CanLowerReturn(), llvm::GCNSchedStage::checkScheduling(), getBaseMaxNumVGPRs(), getMaxNumAGPRs(), llvm::SIRegisterInfo::getRegPressureLimit(), and llvm::SIRegisterInfo::getReservedRegs().

◆ getMaxPrivateElementSize()

unsigned llvm::GCNSubtarget::getMaxPrivateElementSize ( bool ForBufferRSrc = false ) const

inline

Definition at line 306 of file GCNSubtarget.h.

References enableFlatScratch(), and MaxPrivateElementSize.

Referenced by llvm::SITargetLowering::canMergeStoresTo(), llvm::GCNTTIImpl::getLoadStoreVecRegBitWidth(), llvm::SIInstrInfo::getScratchRsrcWords23(), and llvm::GCNTTIImpl::isLegalToVectorizeMemChain().

◆ getMaxWaveScratchSize()

unsigned llvm::GCNSubtarget::getMaxWaveScratchSize ( ) const

inline

Definition at line 287 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX11.

Referenced by getKnownHighZeroBitsForFrameIndex().

◆ getMaxWavesPerEU()

unsigned llvm::AMDGPUSubtarget::getMaxWavesPerEU ( ) const

inline

Returns: Maximum number of waves per execution unit supported by the subtarget without any kind of limitation.

Definition at line 284 of file AMDGPUSubtarget.h.

Referenced by computeOccupancy(), and getOccupancyWithNumSGPRs().

◆ getMaxWorkGroupsPerCU()

unsigned llvm::GCNSubtarget::getMaxWorkGroupsPerCU ( unsigned FlatWorkGroupSize ) const

inlineoverridevirtual

Returns: Maximum number of work groups per compute unit supported by the subtarget and limited by given FlatWorkGroupSize.

Implements llvm::AMDGPUSubtarget.

Definition at line 1348 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getMaxWorkGroupsPerCU().

◆ getMinFlatWorkGroupSize()

unsigned llvm::GCNSubtarget::getMinFlatWorkGroupSize ( ) const

inlineoverridevirtual

Returns: Minimum flat work group size supported by the subtarget.

Implements llvm::AMDGPUSubtarget.

Definition at line 1353 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getMinFlatWorkGroupSize().

◆ getMinNumSGPRs()

unsigned llvm::GCNSubtarget::getMinNumSGPRs ( unsigned WavesPerEU ) const

inline

Returns: Minimum number of SGPRs that meets the given number of waves per execution unit requirement supported by the subtarget.

Definition at line 1219 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getMinNumSGPRs().

Referenced by getBaseMaxNumSGPRs().

◆ getMinNumVGPRs()

unsigned llvm::GCNSubtarget::getMinNumVGPRs ( unsigned WavesPerEU ) const

inline

Returns: the minimum number of VGPRs that will prevent achieving more than the specified number of waves WavesPerEU.

Definition at line 1289 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getMinNumVGPRs().

Referenced by getBaseMaxNumVGPRs().

◆ getMinWavesPerEU()

unsigned llvm::GCNSubtarget::getMinWavesPerEU ( ) const

inlineoverridevirtual

Returns: Minimum number of waves per execution unit supported by the subtarget.

Implements llvm::AMDGPUSubtarget.

Definition at line 1371 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getMinWavesPerEU().

◆ getNSAMaxSize()

unsigned llvm::GCNSubtarget::getNSAMaxSize ( ) const

inline

Definition at line 961 of file GCNSubtarget.h.

References llvm::AMDGPU::getNSAMaxSize().

Referenced by llvm::AMDGPULegalizerInfo::legalizeBVHIntrinsic(), llvm::AMDGPULegalizerInfo::legalizeImageIntrinsic(), and llvm::SIInstrInfo::verifyInstruction().

◆ getNSAThreshold()

unsigned GCNSubtarget::getNSAThreshold ( const MachineFunction & MF ) const

Definition at line 1003 of file AMDGPUSubtarget.cpp.

References llvm::Function::getFnAttributeAsParsedInteger(), llvm::MachineFunction::getFunction(), and NSAThreshold.

Referenced by llvm::AMDGPULegalizerInfo::legalizeImageIntrinsic().

◆ getOccupancyWithNumSGPRs()

unsigned GCNSubtarget::getOccupancyWithNumSGPRs ( unsigned SGPRs ) const

Return the maximum number of waves per SIMD for kernels using SGPRs SGPRs.

Definition at line 651 of file AMDGPUSubtarget.cpp.

References getGeneration(), getMaxWavesPerEU(), llvm::AMDGPUSubtarget::GFX10, and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.

Referenced by computeOccupancy().

◆ getOccupancyWithNumVGPRs()

unsigned GCNSubtarget::getOccupancyWithNumVGPRs ( unsigned VGPRs ) const

Return the maximum number of waves per SIMD for kernels using VGPRs VGPRs.

Definition at line 677 of file AMDGPUSubtarget.cpp.

References llvm::AMDGPU::IsaInfo::getNumWavesPerEUWithNumVGPRs().

Referenced by computeOccupancy().

◆ getPostRAMutations()

void GCNSubtarget::getPostRAMutations ( std::vector< std::unique_ptr< ScheduleDAGMutation > > & Mutations ) const

override

Definition at line 992 of file AMDGPUSubtarget.cpp.

◆ getRegBankInfo()

const AMDGPURegisterBankInfo * llvm::GCNSubtarget::getRegBankInfo ( ) const

inlineoverride

Definition at line 264 of file GCNSubtarget.h.

Referenced by llvm::SIInstrInfo::getInstructionUniformity().

◆ getRegisterInfo()

const SIRegisterInfo * llvm::GCNSubtarget::getRegisterInfo ( ) const

inlineoverride

Definition at line 244 of file GCNSubtarget.h.

References InstrInfo.

◆ getReservedNumSGPRs() [1/2]

unsigned GCNSubtarget::getReservedNumSGPRs ( const Function & F ) const

Returns: Reserved number of SGPRs for given function F.

Definition at line 703 of file AMDGPUSubtarget.cpp.

References getBaseReservedNumSGPRs(), and hasFlatAddressSpace().

◆ getReservedNumSGPRs() [2/2]

unsigned GCNSubtarget::getReservedNumSGPRs ( const MachineFunction & MF ) const

Returns: Reserved number of SGPRs for given machine function MF.

Definition at line 698 of file AMDGPUSubtarget.cpp.

References getBaseReservedNumSGPRs(), llvm::MachineFunction::getInfo(), llvm::SIMachineFunctionInfo::getUserSGPRInfo(), and llvm::GCNUserSGPRUsageInfo::hasFlatScratchInit().

Referenced by getMaxNumSGPRs().

◆ getScalarizeGlobalBehavior()

bool llvm::GCNSubtarget::getScalarizeGlobalBehavior ( ) const

inline

Definition at line 847 of file GCNSubtarget.h.

References ScalarizeGlobal.

◆ getSelectionDAGInfo()

const SelectionDAGTargetInfo * llvm::GCNSubtarget::getSelectionDAGInfo ( ) const

inlineoverride

Definition at line 273 of file GCNSubtarget.h.

References TSInfo.

◆ getSetRegWaitStates()

unsigned llvm::GCNSubtarget::getSetRegWaitStates ( ) const

inline

Number of hazard wait states for s_setreg_b32/s_setreg_imm32_b32.

Definition at line 469 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::SEA_ISLANDS.

◆ getSGPRAllocGranule()

unsigned llvm::GCNSubtarget::getSGPRAllocGranule ( ) const

inline

Returns: SGPR allocation granularity supported by the subtarget.

Definition at line 1198 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getSGPRAllocGranule().

◆ getSGPREncodingGranule()

unsigned llvm::GCNSubtarget::getSGPREncodingGranule ( ) const

inline

Returns: SGPR encoding granularity supported by the subtarget.

Definition at line 1203 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getSGPREncodingGranule().

◆ getStackAlignment()

Align llvm::GCNSubtarget::getStackAlignment ( ) const

inline

Definition at line 834 of file GCNSubtarget.h.

Referenced by llvm::SITargetLowering::LowerCall().

◆ getTargetID()

const AMDGPU::IsaInfo::AMDGPUTargetID & llvm::GCNSubtarget::getTargetID ( ) const

inline

Definition at line 268 of file GCNSubtarget.h.

References TargetID.

◆ getTargetLowering()

const SITargetLowering * llvm::GCNSubtarget::getTargetLowering ( ) const

inlineoverride

Definition at line 240 of file GCNSubtarget.h.

Referenced by GCNSubtarget(), llvm::AMDGPULegalizerInfo::getImplicitArgPtr(), getTM(), llvm::AMDGPULegalizerInfo::legalizeGlobalValue(), llvm::AMDGPULegalizerInfo::legalizeStackSave(), and llvm::AMDGPULegalizerInfo::legalizeTrapHsaQueuePtr().

◆ getTotalNumSGPRs()

unsigned llvm::GCNSubtarget::getTotalNumSGPRs ( ) const

inline

Returns: Total number of SGPRs supported by the subtarget.

Definition at line 1208 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getTotalNumSGPRs().

◆ getTotalNumVGPRs()

unsigned llvm::GCNSubtarget::getTotalNumVGPRs ( ) const

inline

Returns: Total number of VGPRs supported by the subtarget.

Definition at line 1278 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getTotalNumVGPRs().

◆ getTrapHandlerAbi()

TrapHandlerAbi llvm::GCNSubtarget::getTrapHandlerAbi ( ) const

inline

Definition at line 417 of file GCNSubtarget.h.

References AMDHSA, llvm::AMDGPUSubtarget::isAmdHsaOS(), and NONE.

Referenced by llvm::AMDGPULegalizerInfo::legalizeDebugTrapIntrinsic(), and llvm::AMDGPULegalizerInfo::legalizeTrapIntrinsic().

◆ getVGPRAllocGranule()

unsigned llvm::GCNSubtarget::getVGPRAllocGranule ( ) const

inline

Returns: VGPR allocation granularity supported by the subtarget.

Definition at line 1268 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getVGPRAllocGranule().

◆ getVGPREncodingGranule()

unsigned llvm::GCNSubtarget::getVGPREncodingGranule ( ) const

inline

Returns: VGPR encoding granularity supported by the subtarget.

Definition at line 1273 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getVGPREncodingGranule().

◆ getWavesPerEUForWorkGroup()

unsigned llvm::GCNSubtarget::getWavesPerEUForWorkGroup ( unsigned FlatWorkGroupSize ) const

inlineoverridevirtual

Returns: Number of waves per execution unit required to support the given FlatWorkGroupSize.

Implements llvm::AMDGPUSubtarget.

Definition at line 1365 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::getWavesPerEUForWorkGroup().

◆ has12DWordStoreHazard()

bool llvm::GCNSubtarget::has12DWordStoreHazard ( ) const

inline

Definition at line 1007 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::SOUTHERN_ISLANDS.

◆ hasA16()

bool llvm::GCNSubtarget::hasA16 ( ) const

inline

Definition at line 943 of file GCNSubtarget.h.

References HasA16.

Referenced by llvm::AMDGPULegalizerInfo::legalizeImageIntrinsic(), and llvm::SIInstrInfo::verifyInstruction().

◆ hasAddNoCarry()

bool llvm::GCNSubtarget::hasAddNoCarry ( ) const

inline

Returns: true if the target has integer add/sub instructions that do not produce a carry-out. This includes v_add_[iu]32, v_sub_[iu]32, v_add_[iu]16, and v_sub_[iu]16, all of which support the clamp modifier for saturation.

Definition at line 671 of file GCNSubtarget.h.

References AddNoCarryInsts.

Referenced by llvm::AMDGPULegalizerInfo::AMDGPULegalizerInfo(), llvm::SIInstrInfo::getAddNoCarry(), llvm::SIInstrInfo::getVALUOp(), and llvm::SITargetLowering::SITargetLowering().

◆ hasAddr64()

bool llvm::GCNSubtarget::hasAddr64 ( ) const

inline

Definition at line 343 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.

Referenced by initializeSubtargetDependencies(), llvm::SITargetLowering::isLegalGlobalAddressingMode(), and llvm::SIInstrInfo::legalizeOperands().

◆ hasApertureRegs()

bool llvm::GCNSubtarget::hasApertureRegs ( ) const

inline

Definition at line 557 of file GCNSubtarget.h.

References HasApertureRegs.

◆ hasArchitectedSGPRs()

bool llvm::GCNSubtarget::hasArchitectedSGPRs ( ) const

inline

Returns: true if the architected SGPRs are enabled.

Definition at line 1168 of file GCNSubtarget.h.

References HasArchitectedSGPRs.

Referenced by llvm::SITargetLowering::allocateSystemSGPRs(), and llvm::SITargetLowering::LowerFormalArguments().

◆ hasAtomicBufferGlobalPkAddF16Insts()

bool llvm::GCNSubtarget::hasAtomicBufferGlobalPkAddF16Insts ( ) const

inline

Definition at line 782 of file GCNSubtarget.h.

References HasAtomicBufferGlobalPkAddF16Insts.

◆ hasAtomicBufferGlobalPkAddF16NoRtnInsts()

bool llvm::GCNSubtarget::hasAtomicBufferGlobalPkAddF16NoRtnInsts ( ) const

inline

Definition at line 778 of file GCNSubtarget.h.

References HasAtomicBufferGlobalPkAddF16NoRtnInsts.

◆ hasAtomicCSub()

bool llvm::GCNSubtarget::hasAtomicCSub ( ) const

inline

Definition at line 619 of file GCNSubtarget.h.

References GFX10_BEncoding.

◆ hasAtomicDsPkAdd16Insts()

bool llvm::GCNSubtarget::hasAtomicDsPkAdd16Insts ( ) const

inline

Definition at line 766 of file GCNSubtarget.h.

References HasAtomicDsPkAdd16Insts.

◆ hasAtomicFaddInsts()

bool llvm::GCNSubtarget::hasAtomicFaddInsts ( ) const

inline

Definition at line 770 of file GCNSubtarget.h.

References HasAtomicFaddNoRtnInsts, and HasAtomicFaddRtnInsts.

Referenced by llvm::SITargetLowering::emitExpandAtomicRMW().

◆ hasAtomicFaddNoRtnInsts()

bool llvm::GCNSubtarget::hasAtomicFaddNoRtnInsts ( ) const

inline

Definition at line 776 of file GCNSubtarget.h.

References HasAtomicFaddNoRtnInsts.

Referenced by llvm::SITargetLowering::shouldExpandAtomicRMWInIR().

◆ hasAtomicFaddRtnInsts()

bool llvm::GCNSubtarget::hasAtomicFaddRtnInsts ( ) const

inline

Definition at line 774 of file GCNSubtarget.h.

References HasAtomicFaddRtnInsts.

Referenced by llvm::AMDGPU::hasAtomicFaddRtnForTy(), llvm::SITargetLowering::hasAtomicFaddRtnForTy(), and llvm::SITargetLowering::shouldExpandAtomicRMWInIR().

◆ hasAtomicFlatPkAdd16Insts()

bool llvm::GCNSubtarget::hasAtomicFlatPkAdd16Insts ( ) const

inline

Definition at line 768 of file GCNSubtarget.h.

References HasAtomicFlatPkAdd16Insts.

◆ hasAtomicGlobalPkAddBF16Inst()

bool llvm::GCNSubtarget::hasAtomicGlobalPkAddBF16Inst ( ) const

inline

Definition at line 786 of file GCNSubtarget.h.

References HasAtomicGlobalPkAddBF16Inst.

◆ hasAutoWaitcntBeforeBarrier()

bool llvm::GCNSubtarget::hasAutoWaitcntBeforeBarrier ( ) const

inline

Definition at line 523 of file GCNSubtarget.h.

References AutoWaitcntBeforeBarrier.

◆ hasBCNT()

bool llvm::GCNSubtarget::hasBCNT ( unsigned Size ) const

inline

Definition at line 373 of file GCNSubtarget.h.

Referenced by llvm::SITargetLowering::SITargetLowering().

◆ hasBFE()

bool llvm::GCNSubtarget::hasBFE ( ) const

inline

Definition at line 361 of file GCNSubtarget.h.

Referenced by hasBFM(), and llvm::SITargetLowering::SITargetLowering().

◆ hasBFI()

bool llvm::GCNSubtarget::hasBFI ( ) const

inline

Definition at line 365 of file GCNSubtarget.h.

Referenced by llvm::SITargetLowering::SITargetLowering().

◆ hasBFM()

bool llvm::GCNSubtarget::hasBFM ( ) const

inline

Definition at line 369 of file GCNSubtarget.h.

References hasBFE().

◆ hasCARRY()

bool llvm::GCNSubtarget::hasCARRY ( ) const

inline

Definition at line 397 of file GCNSubtarget.h.

◆ hasCompressedExport()

bool llvm::GCNSubtarget::hasCompressedExport ( ) const

inline

Return true if the target's EXP instruction has the COMPR flag, which affects the meaning of the EN (enable) bits.

Definition at line 1119 of file GCNSubtarget.h.

References GFX11Insts.

◆ hasCvtFP8VOP1Bug()

bool llvm::GCNSubtarget::hasCvtFP8VOP1Bug ( ) const

inline

Definition at line 1195 of file GCNSubtarget.h.

◆ hasD16Images()

bool llvm::GCNSubtarget::hasD16Images ( ) const

inline

Definition at line 643 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.

◆ hasD16LoadStore()

bool llvm::GCNSubtarget::hasD16LoadStore ( ) const

inline

Definition at line 635 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

Referenced by d16PreservesUnusedBits().

◆ hasDelayAlu()

bool llvm::GCNSubtarget::hasDelayAlu ( ) const

inline

Return true if the target has the S_DELAY_ALU instruction.

Definition at line 1132 of file GCNSubtarget.h.

References GFX11Insts.

◆ hasDenormModeInst()

bool llvm::GCNSubtarget::hasDenormModeInst ( ) const

inline

Returns: If target supports S_DENORM_MODE.

Definition at line 487 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX10.

◆ hasDLInsts()

bool llvm::GCNSubtarget::hasDLInsts ( ) const

inline

Definition at line 708 of file GCNSubtarget.h.

References HasDLInsts.

Referenced by llvm::SIInstrInfo::getVALUOp(), llvm::SITargetLowering::isFMAFasterThanFMulAndFAdd(), and llvm::SIInstrInfo::moveToVALUImpl().

◆ hasDot10Insts()

bool llvm::GCNSubtarget::hasDot10Insts ( ) const

inline

Definition at line 750 of file GCNSubtarget.h.

References HasDot10Insts.

◆ hasDot1Insts()

bool llvm::GCNSubtarget::hasDot1Insts ( ) const

inline

Definition at line 714 of file GCNSubtarget.h.

References HasDot1Insts.

◆ hasDot2Insts()

bool llvm::GCNSubtarget::hasDot2Insts ( ) const

inline

Definition at line 718 of file GCNSubtarget.h.

References HasDot2Insts.

◆ hasDot3Insts()

bool llvm::GCNSubtarget::hasDot3Insts ( ) const

inline

Definition at line 722 of file GCNSubtarget.h.

References HasDot3Insts.

◆ hasDot4Insts()

bool llvm::GCNSubtarget::hasDot4Insts ( ) const

inline

Definition at line 726 of file GCNSubtarget.h.

References HasDot4Insts.

◆ hasDot5Insts()

bool llvm::GCNSubtarget::hasDot5Insts ( ) const

inline

Definition at line 730 of file GCNSubtarget.h.

References HasDot5Insts.

◆ hasDot6Insts()

bool llvm::GCNSubtarget::hasDot6Insts ( ) const

inline

Definition at line 734 of file GCNSubtarget.h.

References HasDot6Insts.

◆ hasDot7Insts()

bool llvm::GCNSubtarget::hasDot7Insts ( ) const

inline

Definition at line 738 of file GCNSubtarget.h.

References HasDot7Insts.

◆ hasDot8Insts()

bool llvm::GCNSubtarget::hasDot8Insts ( ) const

inline

Definition at line 742 of file GCNSubtarget.h.

References HasDot8Insts.

◆ hasDot9Insts()

bool llvm::GCNSubtarget::hasDot9Insts ( ) const

inline

Definition at line 746 of file GCNSubtarget.h.

References HasDot9Insts.

◆ hasDOTOpSelHazard()

bool llvm::GCNSubtarget::hasDOTOpSelHazard ( ) const

inline

Definition at line 1076 of file GCNSubtarget.h.

References GFX940Insts.

◆ hasDPALU_DPP()

bool llvm::GCNSubtarget::hasDPALU_DPP ( ) const

inline

Definition at line 914 of file GCNSubtarget.h.

References HasDPALU_DPP.

◆ hasDPP()

bool llvm::GCNSubtarget::hasDPP ( ) const

inline

Definition at line 898 of file GCNSubtarget.h.

References HasDPP.

◆ hasDPP8()

bool llvm::GCNSubtarget::hasDPP8 ( ) const

inline

Definition at line 910 of file GCNSubtarget.h.

References HasDPP8.

◆ hasDPPBroadcasts()

bool llvm::GCNSubtarget::hasDPPBroadcasts ( ) const

inline

Definition at line 902 of file GCNSubtarget.h.

References getGeneration(), llvm::AMDGPUSubtarget::GFX10, and HasDPP.

◆ hasDPPWavefrontShifts()

bool llvm::GCNSubtarget::hasDPPWavefrontShifts ( ) const

inline

Definition at line 906 of file GCNSubtarget.h.

References getGeneration(), llvm::AMDGPUSubtarget::GFX10, and HasDPP.

◆ hasDS96AndDS128()

bool llvm::GCNSubtarget::hasDS96AndDS128 ( ) const

inline

Returns: If target supports ds_read/write_b96/128.

Definition at line 502 of file GCNSubtarget.h.

References CIInsts.

Referenced by llvm::SITargetLowering::allowsMisalignedMemoryAccessesImpl().

◆ hasDstSelForwardingHazard()

bool llvm::GCNSubtarget::hasDstSelForwardingHazard ( ) const

inline

Definition at line 1073 of file GCNSubtarget.h.

References GFX940Insts.

◆ hasDwordx3LoadStores()

bool llvm::GCNSubtarget::hasDwordx3LoadStores ( ) const

inline

Definition at line 1012 of file GCNSubtarget.h.

References CIInsts.

◆ hasExtendedImageInsts()

bool llvm::GCNSubtarget::hasExtendedImageInsts ( ) const

inline

Definition at line 935 of file GCNSubtarget.h.

References HasExtendedImageInsts.

◆ hasFFBH()

bool llvm::GCNSubtarget::hasFFBH ( ) const

inline

Definition at line 381 of file GCNSubtarget.h.

Referenced by llvm::SITargetLowering::SITargetLowering().

◆ hasFFBL()

bool llvm::GCNSubtarget::hasFFBL ( ) const

inline

Definition at line 377 of file GCNSubtarget.h.

Referenced by llvm::SITargetLowering::SITargetLowering().

◆ hasFlat()

bool llvm::GCNSubtarget::hasFlat ( ) const

inline

Definition at line 347 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::SOUTHERN_ISLANDS.

Referenced by initializeSubtargetDependencies().

◆ hasFlatAddressSpace()

bool llvm::GCNSubtarget::hasFlatAddressSpace ( ) const

inline

Definition at line 577 of file GCNSubtarget.h.

References FlatAddressSpace.

Referenced by getReservedNumSGPRs(), and hasFlatScrRegister().

◆ hasFlatAtomicFaddF32Inst()

bool llvm::GCNSubtarget::hasFlatAtomicFaddF32Inst ( ) const

inline

Definition at line 790 of file GCNSubtarget.h.

References HasFlatAtomicFaddF32Inst.

Referenced by llvm::SITargetLowering::shouldExpandAtomicRMWInIR().

◆ hasFlatGlobalInsts()

bool llvm::GCNSubtarget::hasFlatGlobalInsts ( ) const

inline

Definition at line 589 of file GCNSubtarget.h.

References FlatGlobalInsts.

Referenced by llvm::SITargetLowering::isLegalGlobalAddressingMode().

◆ hasFlatInstOffsets()

bool llvm::GCNSubtarget::hasFlatInstOffsets ( ) const

inline

Definition at line 585 of file GCNSubtarget.h.

References FlatInstOffsets.

Referenced by llvm::SIInstrInfo::isLegalFLATOffset(), and llvm::SIInstrInfo::verifyInstruction().

◆ hasFlatLgkmVMemCountInOrder()

bool llvm::GCNSubtarget::hasFlatLgkmVMemCountInOrder ( ) const

inline

Definition at line 631 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

◆ hasFlatScratchInsts()

bool llvm::GCNSubtarget::hasFlatScratchInsts ( ) const

inline

Definition at line 593 of file GCNSubtarget.h.

References FlatScratchInsts.

Referenced by enableFlatScratch(), and hasFlatScratchSTMode().

◆ hasFlatScratchSTMode()

bool llvm::GCNSubtarget::hasFlatScratchSTMode ( ) const

inline

Definition at line 600 of file GCNSubtarget.h.

References hasFlatScratchInsts(), hasGFX10_3Insts(), and hasGFX940Insts().

Referenced by llvm::SIRegisterInfo::buildSpillLoadStore(), and llvm::SIRegisterInfo::eliminateFrameIndex().

◆ hasFlatScratchSVSMode()

bool llvm::GCNSubtarget::hasFlatScratchSVSMode ( ) const

inline

Definition at line 604 of file GCNSubtarget.h.

References GFX11Insts, and GFX940Insts.

◆ hasFlatScratchSVSSwizzleBug()

bool llvm::GCNSubtarget::hasFlatScratchSVSSwizzleBug ( ) const

inline

Definition at line 1129 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX11.

◆ hasFlatScrRegister()

bool llvm::GCNSubtarget::hasFlatScrRegister ( ) const

inline

Definition at line 581 of file GCNSubtarget.h.

References hasFlatAddressSpace().

Referenced by llvm::SITargetLowering::getRegisterByName().

◆ hasFlatSegmentOffsetBug()

bool llvm::GCNSubtarget::hasFlatSegmentOffsetBug ( ) const

inline

Definition at line 627 of file GCNSubtarget.h.

References HasFlatSegmentOffsetBug.

Referenced by llvm::SIInstrInfo::isLegalFLATOffset().

◆ hasFMA()

bool llvm::GCNSubtarget::hasFMA ( ) const

inline

Definition at line 401 of file GCNSubtarget.h.

References FMA.

◆ hasFmaakFmamkF32Insts()

bool llvm::GCNSubtarget::hasFmaakFmamkF32Insts ( ) const

inline

Definition at line 927 of file GCNSubtarget.h.

References getGeneration(), llvm::AMDGPUSubtarget::GFX10, and hasGFX940Insts().

◆ hasFmacF64Inst()

bool llvm::GCNSubtarget::hasFmacF64Inst ( ) const

inline

Definition at line 712 of file GCNSubtarget.h.

References HasFmacF64Inst.

◆ hasFmaMixInsts()

bool llvm::GCNSubtarget::hasFmaMixInsts ( ) const

inline

Definition at line 393 of file GCNSubtarget.h.

References HasFmaMixInsts.

Referenced by llvm::SITargetLowering::isFPExtFoldable().

◆ hasForceStoreSC0SC1()

bool llvm::GCNSubtarget::hasForceStoreSC0SC1 ( ) const

inline

Definition at line 1107 of file GCNSubtarget.h.

References HasForceStoreSC0SC1.

◆ hasFP64()

bool llvm::GCNSubtarget::hasFP64 ( ) const

inline

Definition at line 323 of file GCNSubtarget.h.

References FP64.

Referenced by initializeSubtargetDependencies().

◆ hasFP8Insts()

bool llvm::GCNSubtarget::hasFP8Insts ( ) const

inline

Definition at line 758 of file GCNSubtarget.h.

References HasFP8Insts.

◆ hasFPAtomicToDenormModeHazard()

bool llvm::GCNSubtarget::hasFPAtomicToDenormModeHazard ( ) const

inline

Definition at line 1093 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX10.

◆ hasFractBug()

bool llvm::GCNSubtarget::hasFractBug ( ) const

inline

Definition at line 357 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::SOUTHERN_ISLANDS.

Referenced by llvm::AMDGPULegalizerInfo::AMDGPULegalizerInfo(), llvm::AMDGPULegalizerInfo::legalizeFFloor(), and llvm::AMDGPULegalizerInfo::legalizeFFREXP().

◆ hasFullRate64Ops()

bool llvm::GCNSubtarget::hasFullRate64Ops ( ) const

inline

Definition at line 339 of file GCNSubtarget.h.

References FullRate64Ops.

Referenced by llvm::AMDGPURegisterBankInfo::getInstrMapping(), and llvm::AMDGPULegalizerInfo::legalizeMul().

◆ hasG16()

bool llvm::GCNSubtarget::hasG16 ( ) const

inline

Definition at line 945 of file GCNSubtarget.h.

References HasG16.

Referenced by llvm::AMDGPULegalizerInfo::legalizeImageIntrinsic(), and llvm::SIInstrInfo::verifyInstruction().

◆ hasGDS()

bool llvm::GCNSubtarget::hasGDS ( ) const

inline

Returns: true if Global Data Share is supported.

Definition at line 1171 of file GCNSubtarget.h.

References HasGDS.

Referenced by llvm::SITargetLowering::isLegalAddressingMode().

◆ hasGetWaveIdInst()

bool llvm::GCNSubtarget::hasGetWaveIdInst ( ) const

inline

Definition at line 800 of file GCNSubtarget.h.

References HasGetWaveIdInst.

◆ hasGFX10_3Insts()

bool llvm::GCNSubtarget::hasGFX10_3Insts ( ) const

inline

Definition at line 971 of file GCNSubtarget.h.

References GFX10_3Insts.

Referenced by hasFlatScratchSTMode().

◆ hasGFX10_AEncoding()

bool llvm::GCNSubtarget::hasGFX10_AEncoding ( ) const

inline

Definition at line 963 of file GCNSubtarget.h.

References GFX10_AEncoding.

Referenced by llvm::AMDGPULegalizerInfo::legalizeBVHIntrinsic().

◆ hasGFX10_BEncoding()

bool llvm::GCNSubtarget::hasGFX10_BEncoding ( ) const

inline

Definition at line 967 of file GCNSubtarget.h.

References GFX10_BEncoding.

◆ hasGFX11FullVGPRs()

bool llvm::GCNSubtarget::hasGFX11FullVGPRs ( ) const

inline

Definition at line 1125 of file GCNSubtarget.h.

References HasGFX11FullVGPRs.

◆ hasGFX90AInsts()

bool llvm::GCNSubtarget::hasGFX90AInsts ( ) const

inline

Definition at line 1091 of file GCNSubtarget.h.

References GFX90AInsts.

Referenced by llvm::SIRegisterInfo::buildSpillLoadStore(), llvm::GCNSchedStage::checkScheduling(), llvm::SIInstrInfo::copyPhysReg(), getBaseMaxNumVGPRs(), llvm::SIRegisterInfo::getCalleeSavedRegs(), llvm::SIRegisterInfo::getCallPreservedMask(), llvm::SIRegisterInfo::getCrossCopyRegClass(), llvm::SIRegisterInfo::getReservedRegs(), llvm::AMDGPU::hasAtomicFaddRtnForTy(), llvm::SITargetLowering::hasAtomicFaddRtnForTy(), llvm::SIInstrInfo::hasVALU32BitEncoding(), llvm::SIInstrInfo::isOperandLegal(), llvm::SIInstrInfo::pseudoToMCOpcode(), llvm::AMDGPUAsmPrinter::runOnMachineFunction(), llvm::SITargetLowering::shouldExpandAtomicRMWInIR(), and llvm::SIInstrInfo::verifyInstruction().

◆ hasGFX940Insts()

bool llvm::GCNSubtarget::hasGFX940Insts ( ) const

inline

Definition at line 1138 of file GCNSubtarget.h.

References GFX940Insts.

Referenced by hasFlatScratchSTMode(), hasFmaakFmamkF32Insts(), needsKernargPreloadBackwardsCompatibility(), llvm::SIInstrInfo::pseudoToMCOpcode(), and llvm::SITargetLowering::shouldExpandAtomicRMWInIR().

◆ hasGlobalAddTidInsts()

bool llvm::GCNSubtarget::hasGlobalAddTidInsts ( ) const

inline

Definition at line 615 of file GCNSubtarget.h.

References GFX10_BEncoding.

◆ hasGWS()

bool llvm::GCNSubtarget::hasGWS ( ) const

inline

Returns: true if Global Wave Sync is supported.

Definition at line 1174 of file GCNSubtarget.h.

References HasGWS.

◆ hasGWSAutoReplay()

bool llvm::GCNSubtarget::hasGWSAutoReplay ( ) const

inline

Definition at line 658 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

Referenced by llvm::SITargetLowering::EmitInstrWithCustomInserter().

◆ hasGWSSemaReleaseAll()

bool llvm::GCNSubtarget::hasGWSSemaReleaseAll ( ) const

inline

Returns: if target has ds_gws_sema_release_all instruction.

Definition at line 663 of file GCNSubtarget.h.

References CIInsts.

◆ hasHalfRate64Ops() [1/2]

bool llvm::GCNSubtarget::hasHalfRate64Ops ( ) const

inline

Definition at line 335 of file GCNSubtarget.h.

References HalfRate64Ops.

◆ hasHalfRate64Ops() [2/2]

static bool llvm::GCNSubtarget::hasHalfRate64Ops ( const TargetSubtargetInfo & STI )

static

◆ hasHardClauses()

bool llvm::GCNSubtarget::hasHardClauses ( ) const

inline

Definition at line 1089 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX10.

◆ hasHWFP64()

bool llvm::GCNSubtarget::hasHWFP64 ( ) const

inline

Definition at line 331 of file GCNSubtarget.h.

References FP64.

◆ hasImageGather4D16Bug()

bool llvm::GCNSubtarget::hasImageGather4D16Bug ( ) const

inline

Definition at line 953 of file GCNSubtarget.h.

References HasImageGather4D16Bug.

◆ hasImageInsts()

bool llvm::GCNSubtarget::hasImageInsts ( ) const

inline

Definition at line 931 of file GCNSubtarget.h.

References HasImageInsts.

◆ hasImageStoreD16Bug()

bool llvm::GCNSubtarget::hasImageStoreD16Bug ( ) const

inline

Definition at line 951 of file GCNSubtarget.h.

References HasImageStoreD16Bug.

Referenced by llvm::AMDGPULegalizerInfo::handleD16VData().

◆ hasInstFwdPrefetchBug()

bool llvm::GCNSubtarget::hasInstFwdPrefetchBug ( ) const

inline

Definition at line 1049 of file GCNSubtarget.h.

References HasInstFwdPrefetchBug.

◆ hasInstPrefetch()

bool llvm::GCNSubtarget::hasInstPrefetch ( ) const

inline

Definition at line 824 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX10.

◆ hasIntClamp()

bool llvm::GCNSubtarget::hasIntClamp ( ) const

inline

Definition at line 319 of file GCNSubtarget.h.

References HasIntClamp.

Referenced by llvm::AMDGPULegalizerInfo::AMDGPULegalizerInfo(), and llvm::SITargetLowering::SITargetLowering().

◆ hasKernargPreload()

bool llvm::GCNSubtarget::hasKernargPreload ( ) const

inline

Definition at line 1186 of file GCNSubtarget.h.

References KernargPreload.

Referenced by needsKernargPreloadBackwardsCompatibility().

◆ hasLdsBranchVmemWARHazard()

bool llvm::GCNSubtarget::hasLdsBranchVmemWARHazard ( ) const

inline

Definition at line 1057 of file GCNSubtarget.h.

References HasLdsBranchVmemWARHazard.

◆ hasLdsDirect()

bool llvm::GCNSubtarget::hasLdsDirect ( ) const

inline

Definition at line 1099 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX11.

◆ hasLDSFPAtomicAdd()

bool llvm::GCNSubtarget::hasLDSFPAtomicAdd ( ) const

inline

Definition at line 890 of file GCNSubtarget.h.

References GFX8Insts.

Referenced by llvm::SITargetLowering::shouldExpandAtomicRMWInIR().

◆ hasLDSMisalignedBug()

bool llvm::GCNSubtarget::hasLDSMisalignedBug ( ) const

inline

Definition at line 1045 of file GCNSubtarget.h.

References EnableCuMode, and LDSMisalignedBug.

Referenced by llvm::SITargetLowering::allowsMisalignedMemoryAccessesImpl().

◆ hasLegacyGeometry()

bool llvm::GCNSubtarget::hasLegacyGeometry ( ) const

inline

Definition at line 1183 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX11.

◆ hasLshlAddB64()

bool llvm::GCNSubtarget::hasLshlAddB64 ( ) const

inline

Definition at line 979 of file GCNSubtarget.h.

References GFX940Insts.

◆ hasMad64_32()

bool llvm::GCNSubtarget::hasMad64_32 ( ) const

inline

Definition at line 684 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::SEA_ISLANDS.

Referenced by llvm::AMDGPULegalizerInfo::AMDGPULegalizerInfo(), llvm::AMDGPULegalizerInfo::legalizeMul(), and llvm::SITargetLowering::SITargetLowering().

◆ hasMadF16()

bool GCNSubtarget::hasMadF16 ( ) const

Definition at line 641 of file AMDGPUSubtarget.cpp.

References llvm::SIInstrInfo::pseudoToMCOpcode().

Referenced by llvm::AMDGPULegalizerInfo::AMDGPULegalizerInfo(), llvm::SITargetLowering::isFMADLegal(), and llvm::SITargetLowering::SITargetLowering().

◆ hasMADIntraFwdBug()

bool llvm::GCNSubtarget::hasMADIntraFwdBug ( ) const

inline

Definition at line 955 of file GCNSubtarget.h.

References HasMADIntraFwdBug.

◆ hasMAIInsts()

bool llvm::GCNSubtarget::hasMAIInsts ( ) const

inline

Definition at line 754 of file GCNSubtarget.h.

References HasMAIInsts.

Referenced by llvm::AMDGPU::HSAMD::MetadataStreamerMsgPackV3::getHSAKernelProps(), llvm::SIRegisterInfo::getLargestLegalSuperClass(), llvm::SITargetLowering::getRegForInlineAsmConstraint(), llvm::SIRegisterInfo::getReservedRegs(), llvm::SIInstrInfo::isOperandLegal(), and llvm::AMDGPUAsmPrinter::runOnMachineFunction().

◆ hasMed3_16()

bool llvm::GCNSubtarget::hasMed3_16 ( ) const

inline

Definition at line 385 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

Referenced by llvm::GCNTTIImpl::instCombineIntrinsic(), and llvm::SITargetLowering::SITargetLowering().

◆ hasMergedShaders()

bool llvm::GCNSubtarget::hasMergedShaders ( ) const

inline

Returns: true if the machine has merged shaders in which s0-s7 are reserved by the hardware and user SGPRs start at s8

Definition at line 1178 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

◆ hasMFMAInlineLiteralBug()

bool llvm::GCNSubtarget::hasMFMAInlineLiteralBug ( ) const

inline

Definition at line 1003 of file GCNSubtarget.h.

References HasMFMAInlineLiteralBug.

Referenced by llvm::SIInstrInfo::isImmOperandLegal(), and llvm::SIRegisterInfo::opCanUseInlineConstant().

◆ hasMIMG_R128()

bool llvm::GCNSubtarget::hasMIMG_R128 ( ) const

inline

Definition at line 327 of file GCNSubtarget.h.

References MIMG_R128.

◆ hasMin3Max3_16()

bool llvm::GCNSubtarget::hasMin3Max3_16 ( ) const

inline

Definition at line 389 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

◆ hasMovB64()

bool llvm::GCNSubtarget::hasMovB64 ( ) const

inline

Definition at line 977 of file GCNSubtarget.h.

References GFX940Insts.

Referenced by llvm::SIInstrInfo::copyPhysReg(), llvm::SIInstrInfo::expandMovDPP64(), and llvm::SIInstrInfo::expandPostRAPseudo().

◆ hasMovrel()

bool llvm::GCNSubtarget::hasMovrel ( ) const

inline

Definition at line 868 of file GCNSubtarget.h.

References HasMovrel.

Referenced by llvm::SITargetLowering::shouldExpandVectorDynExt(), and useVGPRIndexMode().

◆ hasMultiDwordFlatScratchAddressing()

bool llvm::GCNSubtarget::hasMultiDwordFlatScratchAddressing ( ) const

inline

Definition at line 623 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

◆ hasNegativeScratchOffsetBug()

bool llvm::GCNSubtarget::hasNegativeScratchOffsetBug ( ) const

inline

Definition at line 997 of file GCNSubtarget.h.

References NegativeScratchOffsetBug.

Referenced by llvm::SIInstrInfo::isLegalFLATOffset(), and llvm::SIInstrInfo::splitFlatOffset().

◆ hasNegativeUnalignedScratchOffsetBug()

bool llvm::GCNSubtarget::hasNegativeUnalignedScratchOffsetBug ( ) const

inline

Definition at line 999 of file GCNSubtarget.h.

References NegativeUnalignedScratchOffsetBug.

Referenced by llvm::SIInstrInfo::isLegalFLATOffset(), and llvm::SIInstrInfo::splitFlatOffset().

◆ hasNoDataDepHazard()

bool llvm::GCNSubtarget::hasNoDataDepHazard ( ) const

inline

Definition at line 816 of file GCNSubtarget.h.

References HasNoDataDepHazard.

Referenced by llvm::GCNHazardRecognizer::getHazardType(), and llvm::GCNHazardRecognizer::PreEmitNoopsCommon().

◆ hasNoSdstCMPX()

bool llvm::GCNSubtarget::hasNoSdstCMPX ( ) const

inline

Definition at line 792 of file GCNSubtarget.h.

References HasNoSdstCMPX.

◆ hasNSAClauseBug()

bool llvm::GCNSubtarget::hasNSAClauseBug ( ) const

inline

Definition at line 1087 of file GCNSubtarget.h.

References HasNSAClauseBug.

◆ hasNSAEncoding()

bool llvm::GCNSubtarget::hasNSAEncoding ( ) const

inline

Definition at line 957 of file GCNSubtarget.h.

References HasNSAEncoding.

Referenced by llvm::AMDGPULegalizerInfo::legalizeBVHIntrinsic(), and llvm::AMDGPULegalizerInfo::legalizeImageIntrinsic().

◆ hasNSAtoVMEMBug()

bool llvm::GCNSubtarget::hasNSAtoVMEMBug ( ) const

inline

Definition at line 1083 of file GCNSubtarget.h.

References HasNSAtoVMEMBug.

Referenced by llvm::GCNHazardRecognizer::getHazardType(), and llvm::GCNHazardRecognizer::PreEmitNoopsCommon().

◆ hasNullExportTarget()

bool llvm::GCNSubtarget::hasNullExportTarget ( ) const

inline

Return true if the target's EXP instruction supports the NULL export target.

Definition at line 1123 of file GCNSubtarget.h.

References GFX11Insts.

◆ hasOffset3fBug()

bool llvm::GCNSubtarget::hasOffset3fBug ( ) const

inline

Definition at line 947 of file GCNSubtarget.h.

References HasOffset3fBug.

Referenced by llvm::AMDGPUAsmPrinter::emitInstruction(), llvm::SIInstrInfo::getInstSizeInBytes(), and llvm::SIInstrInfo::insertBranch().

◆ hasOnlyRevVALUShifts()

bool llvm::GCNSubtarget::hasOnlyRevVALUShifts ( ) const

inline

Definition at line 353 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.

Referenced by llvm::SIInstrInfo::moveToVALUImpl().

◆ hasPackedFP32Ops()

bool llvm::GCNSubtarget::hasPackedFP32Ops ( ) const

inline

Definition at line 918 of file GCNSubtarget.h.

References HasPackedFP32Ops.

Referenced by llvm::AMDGPULegalizerInfo::AMDGPULegalizerInfo(), llvm::GCNTTIImpl::getArithmeticInstrCost(), llvm::GCNTTIImpl::getIntrinsicInstrCost(), llvm::GCNTTIImpl::getMaximumVF(), llvm::GCNTTIImpl::getRegisterBitWidth(), and llvm::SITargetLowering::SITargetLowering().

◆ hasPackedTID()

bool llvm::GCNSubtarget::hasPackedTID ( ) const

inline

Definition at line 1134 of file GCNSubtarget.h.

References HasPackedTID.

Referenced by llvm::SITargetLowering::allocateSpecialEntryInputVGPRs().

◆ hasPartialNSAEncoding()

bool llvm::GCNSubtarget::hasPartialNSAEncoding ( ) const

inline

Definition at line 959 of file GCNSubtarget.h.

References HasPartialNSAEncoding.

Referenced by llvm::AMDGPULegalizerInfo::legalizeImageIntrinsic(), and llvm::SIInstrInfo::verifyInstruction().

◆ hasPermLane64()

bool llvm::GCNSubtarget::hasPermLane64 ( ) const

inline

Returns: true if the subtarget has the v_permlane64_b32 instruction.

Definition at line 896 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX11.

◆ hasPermLaneX16()

bool llvm::GCNSubtarget::hasPermLaneX16 ( ) const

inline

Returns: true if the subtarget has the v_permlanex16_b32 instruction.

Definition at line 893 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX10.

◆ hasPkFmacF16Inst()

bool llvm::GCNSubtarget::hasPkFmacF16Inst ( ) const

inline

Definition at line 762 of file GCNSubtarget.h.

References HasPkFmacF16Inst.

◆ hasPkMovB32()

bool llvm::GCNSubtarget::hasPkMovB32 ( ) const

inline

Definition at line 923 of file GCNSubtarget.h.

References GFX90AInsts.

Referenced by llvm::SIInstrInfo::copyPhysReg(), and llvm::SIInstrInfo::expandPostRAPseudo().

◆ hasR128A16()

bool llvm::GCNSubtarget::hasR128A16 ( ) const

inline

Definition at line 939 of file GCNSubtarget.h.

References HasR128A16.

Referenced by llvm::SIInstrInfo::verifyInstruction().

◆ hasReadM0LdsDirectHazard()

bool llvm::GCNSubtarget::hasReadM0LdsDirectHazard ( ) const

inline

Definition at line 1029 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

Referenced by llvm::GCNHazardRecognizer::getHazardType(), and llvm::GCNHazardRecognizer::PreEmitNoopsCommon().

◆ hasReadM0LdsDmaHazard()

bool llvm::GCNSubtarget::hasReadM0LdsDmaHazard ( ) const

inline

Definition at line 1025 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

Referenced by llvm::GCNHazardRecognizer::getHazardType(), and llvm::GCNHazardRecognizer::PreEmitNoopsCommon().

◆ hasReadM0MovRelInterpHazard()

bool llvm::GCNSubtarget::hasReadM0MovRelInterpHazard ( ) const

inline

Definition at line 1016 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

Referenced by llvm::GCNHazardRecognizer::getHazardType(), and llvm::GCNHazardRecognizer::PreEmitNoopsCommon().

◆ hasReadM0SendMsgHazard()

bool llvm::GCNSubtarget::hasReadM0SendMsgHazard ( ) const

inline

Definition at line 1020 of file GCNSubtarget.h.

References getGeneration(), llvm::AMDGPUSubtarget::GFX9, and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.

Referenced by llvm::GCNHazardRecognizer::getHazardType(), and llvm::GCNHazardRecognizer::PreEmitNoopsCommon().

◆ hasReadVCCZBug()

bool llvm::GCNSubtarget::hasReadVCCZBug ( ) const

inline

Extra wait hazard is needed in some cases before s_cbranch_vccnz/s_cbranch_vccz.

Definition at line 443 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::SEA_ISLANDS.

◆ hasRFEHazards()

bool llvm::GCNSubtarget::hasRFEHazards ( ) const

inline

Definition at line 464 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.

◆ hasSALUFloatInsts()

bool llvm::GCNSubtarget::hasSALUFloatInsts ( ) const

inline

Definition at line 1140 of file GCNSubtarget.h.

References HasSALUFloatInsts.

Referenced by llvm::AMDGPURegisterBankInfo::applyMappingImpl(), and llvm::AMDGPURegisterBankInfo::getInstrMapping().

◆ hasScalarAtomics()

bool llvm::GCNSubtarget::hasScalarAtomics ( ) const

inline

Definition at line 886 of file GCNSubtarget.h.

References HasScalarAtomics.

◆ hasScalarCompareEq64()

bool llvm::GCNSubtarget::hasScalarCompareEq64 ( ) const

inline

Definition at line 878 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.

Referenced by llvm::SIInstrInfo::copyPhysReg(), and llvm::AMDGPURegisterBankInfo::getInstrMapping().

◆ hasScalarFlatScratchInsts()

bool llvm::GCNSubtarget::hasScalarFlatScratchInsts ( ) const

inline

Definition at line 606 of file GCNSubtarget.h.

References ScalarFlatScratchInsts.

◆ hasScalarMulHiInsts()

bool llvm::GCNSubtarget::hasScalarMulHiInsts ( ) const

inline

Definition at line 413 of file GCNSubtarget.h.

References GFX9Insts.

Referenced by llvm::AMDGPURegisterBankInfo::getInstrMapping().

◆ hasScalarPackInsts()

bool llvm::GCNSubtarget::hasScalarPackInsts ( ) const

inline

Definition at line 409 of file GCNSubtarget.h.

References GFX9Insts.

◆ hasScalarStores()

bool llvm::GCNSubtarget::hasScalarStores ( ) const

inline

Definition at line 882 of file GCNSubtarget.h.

References HasScalarStores.

◆ hasSDWAMac()

bool llvm::GCNSubtarget::hasSDWAMac ( ) const

inline

Definition at line 700 of file GCNSubtarget.h.

References HasSDWAMac.

◆ hasSDWAOmod()

bool llvm::GCNSubtarget::hasSDWAOmod ( ) const

inline

Definition at line 688 of file GCNSubtarget.h.

References HasSDWAOmod.

Referenced by llvm::SIInstrInfo::verifyInstruction().

◆ hasSDWAOutModsVOPC()

bool llvm::GCNSubtarget::hasSDWAOutModsVOPC ( ) const

inline

Definition at line 704 of file GCNSubtarget.h.

References HasSDWAOutModsVOPC.

Referenced by llvm::SIInstrInfo::verifyInstruction().

◆ hasSDWAScalar()

bool llvm::GCNSubtarget::hasSDWAScalar ( ) const

inline

Definition at line 692 of file GCNSubtarget.h.

References HasSDWAScalar.

Referenced by llvm::SIInstrInfo::copyPhysReg(), and llvm::SIInstrInfo::verifyInstruction().

◆ hasSDWASdst()

bool llvm::GCNSubtarget::hasSDWASdst ( ) const

inline

Definition at line 696 of file GCNSubtarget.h.

References HasSDWASdst.

Referenced by llvm::SIInstrInfo::verifyInstruction().

◆ hasSGPRInitBug()

bool llvm::GCNSubtarget::hasSGPRInitBug ( ) const

inline

Definition at line 989 of file GCNSubtarget.h.

References SGPRInitBug.

Referenced by getBaseMaxNumSGPRs().

◆ hasShaderCyclesRegister()

bool llvm::GCNSubtarget::hasShaderCyclesRegister ( ) const

inline

Definition at line 808 of file GCNSubtarget.h.

References HasShaderCyclesRegister.

◆ hasShift64HighRegBug()

bool llvm::GCNSubtarget::hasShift64HighRegBug ( ) const

inline

Definition at line 1063 of file GCNSubtarget.h.

References GFX90AInsts, and GFX940Insts.

◆ hasSMemRealTime()

bool llvm::GCNSubtarget::hasSMemRealTime ( ) const

inline

Definition at line 864 of file GCNSubtarget.h.

References HasSMemRealTime.

◆ hasSMemTimeInst()

bool llvm::GCNSubtarget::hasSMemTimeInst ( ) const

inline

Definition at line 804 of file GCNSubtarget.h.

References HasSMemTimeInst.

◆ hasSMEMtoVectorWriteHazard()

bool llvm::GCNSubtarget::hasSMEMtoVectorWriteHazard ( ) const

inline

Definition at line 1041 of file GCNSubtarget.h.

References HasSMEMtoVectorWriteHazard.

◆ hasSMRDReadVALUDefHazard()

bool llvm::GCNSubtarget::hasSMRDReadVALUDefHazard ( ) const

inline

A read of an SGPR by SMRD instruction requires 4 wait states when the SGPR was written by a VALU instruction.

Definition at line 454 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::SOUTHERN_ISLANDS.

◆ hasSPackHL()

bool llvm::GCNSubtarget::hasSPackHL ( ) const

inline

Return true if the target has the S_PACK_HL_B32_B16 instruction.

Definition at line 1115 of file GCNSubtarget.h.

References GFX11Insts.

◆ hasSwap()

bool llvm::GCNSubtarget::hasSwap ( ) const

inline

Definition at line 405 of file GCNSubtarget.h.

References GFX9Insts.

◆ hasTransForwardingHazard()

bool llvm::GCNSubtarget::hasTransForwardingHazard ( ) const

inline

Definition at line 1069 of file GCNSubtarget.h.

References GFX940Insts.

◆ hasUnalignedAccessMode()

bool llvm::GCNSubtarget::hasUnalignedAccessMode ( ) const

inline

Definition at line 553 of file GCNSubtarget.h.

References UnalignedAccessMode.

◆ hasUnalignedBufferAccess()

bool llvm::GCNSubtarget::hasUnalignedBufferAccess ( ) const

inline

Definition at line 533 of file GCNSubtarget.h.

References UnalignedBufferAccess.

◆ hasUnalignedBufferAccessEnabled()

bool llvm::GCNSubtarget::hasUnalignedBufferAccessEnabled ( ) const

inline

Definition at line 537 of file GCNSubtarget.h.

References UnalignedAccessMode, and UnalignedBufferAccess.

Referenced by llvm::SITargetLowering::allowsMisalignedMemoryAccessesImpl().

◆ hasUnalignedDSAccess()

bool llvm::GCNSubtarget::hasUnalignedDSAccess ( ) const

inline

Definition at line 541 of file GCNSubtarget.h.

References UnalignedDSAccess.

◆ hasUnalignedDSAccessEnabled()

bool llvm::GCNSubtarget::hasUnalignedDSAccessEnabled ( ) const

inline

Definition at line 545 of file GCNSubtarget.h.

References UnalignedAccessMode, and UnalignedDSAccess.

Referenced by llvm::SITargetLowering::allowsMisalignedMemoryAccessesImpl().

◆ hasUnalignedScratchAccess()

bool llvm::GCNSubtarget::hasUnalignedScratchAccess ( ) const

inline

Definition at line 549 of file GCNSubtarget.h.

References UnalignedScratchAccess.

Referenced by llvm::SITargetLowering::allowsMisalignedMemoryAccessesImpl(), and llvm::GCNTTIImpl::isLegalToVectorizeMemChain().

◆ hasUnpackedD16VMem()

bool llvm::GCNSubtarget::hasUnpackedD16VMem ( ) const

inline

Definition at line 675 of file GCNSubtarget.h.

References HasUnpackedD16VMem.

Referenced by llvm::SITargetLowering::AddIMGInit(), llvm::AMDGPURegisterBankInfo::handleD16VData(), llvm::AMDGPULegalizerInfo::handleD16VData(), llvm::AMDGPULegalizerInfo::legalizeBufferLoad(), llvm::AMDGPULegalizerInfo::legalizeImageIntrinsic(), llvm::SIInstrInfo::pseudoToMCOpcode(), and llvm::SIInstrInfo::verifyInstruction().

◆ hasUsableDivScaleConditionOutput()

bool llvm::GCNSubtarget::hasUsableDivScaleConditionOutput ( ) const

inline

Condition output from div_scale is usable.

Definition at line 437 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::SOUTHERN_ISLANDS.

Referenced by llvm::GCNTTIImpl::getArithmeticInstrCost(), and llvm::AMDGPULegalizerInfo::legalizeFDIV64().

◆ hasUsableDSOffset()

bool llvm::GCNSubtarget::hasUsableDSOffset ( ) const

inline

True if the offset field of DS instructions works as expected.

On SI, the offset uses a 16-bit adder and does not always wrap properly.

Definition at line 428 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::SEA_ISLANDS.

Referenced by llvm::SITargetLowering::allowsMisalignedMemoryAccessesImpl().

◆ hasUserSGPRInit16Bug()

bool llvm::GCNSubtarget::hasUserSGPRInit16Bug ( ) const

inline

Definition at line 993 of file GCNSubtarget.h.

References isWave32(), and UserSGPRInit16Bug.

Referenced by llvm::SITargetLowering::allocateSystemSGPRs().

◆ hasVALUMaskWriteHazard()

bool llvm::GCNSubtarget::hasVALUMaskWriteHazard ( ) const

inline

Definition at line 1109 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX11.

◆ hasVALUPartialForwardingHazard()

bool llvm::GCNSubtarget::hasVALUPartialForwardingHazard ( ) const

inline

Definition at line 1101 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX11.

◆ hasVALUTransUseHazard()

bool llvm::GCNSubtarget::hasVALUTransUseHazard ( ) const

inline

Definition at line 1105 of file GCNSubtarget.h.

References HasVALUTransUseHazard.

◆ hasVcmpxExecWARHazard()

bool llvm::GCNSubtarget::hasVcmpxExecWARHazard ( ) const

inline

Definition at line 1053 of file GCNSubtarget.h.

References HasVcmpxExecWARHazard.

◆ hasVcmpxPermlaneHazard()

bool llvm::GCNSubtarget::hasVcmpxPermlaneHazard ( ) const

inline

Definition at line 1033 of file GCNSubtarget.h.

References HasVcmpxPermlaneHazard.

◆ hasVDecCoExecHazard()

bool llvm::GCNSubtarget::hasVDecCoExecHazard ( ) const

inline

Definition at line 1079 of file GCNSubtarget.h.

References GFX940Insts.

◆ hasVGPRIndexMode()

bool llvm::GCNSubtarget::hasVGPRIndexMode ( ) const

inline

Definition at line 872 of file GCNSubtarget.h.

References HasVGPRIndexMode.

Referenced by useVGPRIndexMode().

◆ hasVMEMReadSGPRVALUDefHazard()

bool llvm::GCNSubtarget::hasVMEMReadSGPRVALUDefHazard ( ) const

inline

A read of an SGPR by a VMEM instruction requires 5 wait states when the SGPR was written by a VALU Instruction.

Definition at line 460 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.

◆ hasVMEMtoScalarWriteHazard()

bool llvm::GCNSubtarget::hasVMEMtoScalarWriteHazard ( ) const

inline

Definition at line 1037 of file GCNSubtarget.h.

References HasVMEMtoScalarWriteHazard.

◆ hasVOP3DPP()

bool llvm::GCNSubtarget::hasVOP3DPP ( ) const

inline

Definition at line 1097 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX11.

◆ hasVOP3Literal()

bool llvm::GCNSubtarget::hasVOP3Literal ( ) const

inline

Definition at line 812 of file GCNSubtarget.h.

References HasVOP3Literal.

Referenced by llvm::SIInstrInfo::convertToThreeAddress(), llvm::SIInstrInfo::isImmOperandLegal(), llvm::SIInstrInfo::isOperandLegal(), llvm::SIInstrInfo::legalizeOperandsVOP3(), and llvm::SIInstrInfo::verifyInstruction().

◆ hasVOPDInsts()

bool llvm::GCNSubtarget::hasVOPDInsts ( ) const

inline

Definition at line 1127 of file GCNSubtarget.h.

References HasVOPDInsts.

◆ hasVscnt()

bool llvm::GCNSubtarget::hasVscnt ( ) const

inline

Definition at line 796 of file GCNSubtarget.h.

References HasVscnt.

◆ haveRoundOpsF64()

bool llvm::GCNSubtarget::haveRoundOpsF64 ( ) const

inline

Have v_trunc_f64, v_ceil_f64, v_rndne_f64.

Definition at line 507 of file GCNSubtarget.h.

References CIInsts.

Referenced by llvm::SITargetLowering::SITargetLowering().

◆ initializeSubtargetDependencies()

GCNSubtarget & GCNSubtarget::initializeSubtargetDependencies	(	const Triple &	TT,
		StringRef	GPU,
		StringRef	FS
	)

Definition at line 65 of file AMDGPUSubtarget.cpp.

◆ isCuModeEnabled()

bool llvm::GCNSubtarget::isCuModeEnabled ( ) const

inline

Definition at line 573 of file GCNSubtarget.h.

References EnableCuMode.

◆ isMesaGfxShader()

bool llvm::GCNSubtarget::isMesaGfxShader ( const Function & F ) const

inline

Definition at line 680 of file GCNSubtarget.h.

References F, llvm::AMDGPUSubtarget::isMesa3DOS(), and llvm::AMDGPU::isShader().

◆ isTgSplitEnabled()

bool llvm::GCNSubtarget::isTgSplitEnabled ( ) const

inline

Definition at line 569 of file GCNSubtarget.h.

References EnableTgSplit.

◆ isTrapHandlerEnabled()

bool llvm::GCNSubtarget::isTrapHandlerEnabled ( ) const

inline

Definition at line 561 of file GCNSubtarget.h.

References TrapHandler.

Referenced by llvm::AMDGPULegalizerInfo::legalizeDebugTrapIntrinsic(), and llvm::AMDGPULegalizerInfo::legalizeTrapIntrinsic().

◆ isWave32()

bool llvm::GCNSubtarget::isWave32 ( ) const

inline

Definition at line 1334 of file GCNSubtarget.h.

References llvm::AMDGPUSubtarget::getWavefrontSize().

Referenced by llvm::SIInstrInfo::createPHISourceCopy(), llvm::AMDGPURegisterBankInfo::executeInWaterfallLoop(), llvm::SIInstrInfo::expandPostRAPseudo(), llvm::SIInstrInfo::fixImplicitOperands(), hasUserSGPRInit16Bug(), llvm::SIInstrInfo::insertVectorSelect(), llvm::GCNTTIImpl::instCombineIntrinsic(), llvm::SIInstrInfo::isWave32(), and llvm::SIInstrInfo::moveToVALUImpl().

◆ isWave64()

bool llvm::GCNSubtarget::isWave64 ( ) const

inline

Definition at line 1338 of file GCNSubtarget.h.

References llvm::AMDGPUSubtarget::getWavefrontSize().

◆ isXNACKEnabled()

bool llvm::GCNSubtarget::isXNACKEnabled ( ) const

inline

Definition at line 565 of file GCNSubtarget.h.

References llvm::AMDGPU::IsaInfo::AMDGPUTargetID::isXnackOnOrAny(), and TargetID.

Referenced by getBaseReservedNumSGPRs().

◆ ldsRequiresM0Init()

bool llvm::GCNSubtarget::ldsRequiresM0Init ( ) const

inline

Return if most LDS instructions have an m0 use that require m0 to be initialized.

Definition at line 649 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

◆ loadStoreOptEnabled()

bool llvm::GCNSubtarget::loadStoreOptEnabled ( ) const

inline

Definition at line 985 of file GCNSubtarget.h.

References EnableLoadStoreOpt.

◆ needsAlignedVGPRs()

bool llvm::GCNSubtarget::needsAlignedVGPRs ( ) const

inline

Return if operations acting on VGPR tuples require even alignment.

Definition at line 1112 of file GCNSubtarget.h.

References GFX90AInsts.

Referenced by llvm::SIInstrInfo::enforceOperandRCAlignment(), llvm::SIRegisterInfo::getAGPRClassForBitWidth(), llvm::SIRegisterInfo::getProperlyAlignedRC(), llvm::SIRegisterInfo::getVectorSuperClassForBitWidth(), llvm::SIRegisterInfo::getVGPR64Class(), llvm::SIRegisterInfo::getVGPRClassForBitWidth(), llvm::SIRegisterInfo::isProperlyAlignedRC(), and llvm::SIInstrInfo::verifyInstruction().

◆ needsKernargPreloadBackwardsCompatibility()

bool llvm::GCNSubtarget::needsKernargPreloadBackwardsCompatibility ( ) const

inline

Definition at line 1190 of file GCNSubtarget.h.

References hasGFX940Insts(), and hasKernargPreload().

◆ overrideSchedPolicy()

void GCNSubtarget::overrideSchedPolicy	(	MachineSchedPolicy &	Policy,
		unsigned	NumRegionInstrs
	)		const

override

Definition at line 624 of file AMDGPUSubtarget.cpp.

References enableSIScheduler(), llvm::MachineSchedPolicy::OnlyBottomUp, llvm::MachineSchedPolicy::OnlyTopDown, llvm::MachineSchedPolicy::ShouldTrackLaneMasks, and llvm::MachineSchedPolicy::ShouldTrackPressure.

◆ ParseSubtargetFeatures()

void llvm::GCNSubtarget::ParseSubtargetFeatures	(	StringRef	CPU,
		StringRef	TuneCPU,
		StringRef	FS
	)

Referenced by initializeSubtargetDependencies().

◆ partialVCCWritesUpdateVCCZ()

bool llvm::GCNSubtarget::partialVCCWritesUpdateVCCZ ( ) const

inline

Writes to VCC_LO/VCC_HI update the VCCZ flag.

Definition at line 448 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX10.

◆ privateMemoryResourceIsRangeChecked()

bool llvm::GCNSubtarget::privateMemoryResourceIsRangeChecked ( ) const

inline

Returns: If MUBUF instructions always perform range checking, even for buffer resources used for private memory access.

Definition at line 513 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

◆ requiresNopBeforeDeallocVGPRs()

bool llvm::GCNSubtarget::requiresNopBeforeDeallocVGPRs ( ) const

inline

Definition at line 1388 of file GCNSubtarget.h.

◆ setScalarizeGlobalBehavior()

void llvm::GCNSubtarget::setScalarizeGlobalBehavior ( bool b )

inline

Definition at line 846 of file GCNSubtarget.h.

References ScalarizeGlobal.

◆ shouldClusterStores()

bool llvm::GCNSubtarget::shouldClusterStores ( ) const

inline

Definition at line 1380 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX11.

◆ supportsBackOffBarrier()

bool llvm::GCNSubtarget::supportsBackOffBarrier ( ) const

inline

Returns: true if the target supports backing off of s_barrier instructions when an exception is raised.

Definition at line 529 of file GCNSubtarget.h.

References BackOffBarrier.

◆ supportsGetDoorbellID()

bool llvm::GCNSubtarget::supportsGetDoorbellID ( ) const

inline

Definition at line 421 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

Referenced by llvm::AMDGPULegalizerInfo::legalizeTrapIntrinsic().

◆ supportsMinMaxDenormModes()

bool llvm::GCNSubtarget::supportsMinMaxDenormModes ( ) const

inline

Definition at line 482 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

Referenced by llvm::SITargetLowering::isCanonicalized().

◆ supportsWGP()

bool llvm::GCNSubtarget::supportsWGP ( ) const

inline

Definition at line 317 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::GFX10.

Referenced by llvm::AMDGPU::HSAMD::MetadataStreamerMsgPackV3::getHSAKernelProps().

◆ unsafeDSOffsetFoldingEnabled()

bool llvm::GCNSubtarget::unsafeDSOffsetFoldingEnabled ( ) const

inline

Definition at line 432 of file GCNSubtarget.h.

References EnableUnsafeDSOffsetFolding.

◆ useAA()

bool GCNSubtarget::useAA ( ) const

override

Definition at line 649 of file AMDGPUSubtarget.cpp.

References UseAA.

◆ useDS128()

bool llvm::GCNSubtarget::useDS128 ( ) const

inline

Returns: If target supports ds_read/write_b128 and user enables generation of ds_read/write_b128.

Definition at line 497 of file GCNSubtarget.h.

References CIInsts, and EnableDS128.

Referenced by llvm::SITargetLowering::allowsMisalignedMemoryAccessesImpl().

◆ useFlatForGlobal()

bool llvm::GCNSubtarget::useFlatForGlobal ( ) const

inline

Definition at line 491 of file GCNSubtarget.h.

References FlatForGlobal.

Referenced by llvm::AMDGPURegisterBankInfo::getInstrMappingForLoad(), llvm::AMDGPURegisterBankInfo::getValueMappingForPtr(), and llvm::SITargetLowering::isLegalGlobalAddressingMode().

◆ usePRTStrictNull()

bool llvm::GCNSubtarget::usePRTStrictNull ( ) const

inline

Returns: If target requires PRT Struct NULL support (zero result registers for sparse texture support).

Definition at line 519 of file GCNSubtarget.h.

References EnablePRTStrictNull.

Referenced by llvm::SITargetLowering::AddIMGInit().

◆ useVGPRIndexMode()

bool GCNSubtarget::useVGPRIndexMode ( ) const

Definition at line 645 of file AMDGPUSubtarget.cpp.

References EnableVGPRIndexMode, hasMovrel(), and hasVGPRIndexMode().

Referenced by llvm::SIInstrInfo::expandPostRAPseudo().

◆ vmemWriteNeedsExpWaitcnt()

bool llvm::GCNSubtarget::vmemWriteNeedsExpWaitcnt ( ) const

inline

Definition at line 820 of file GCNSubtarget.h.

References getGeneration(), and llvm::AMDGPUSubtarget::SEA_ISLANDS.

◆ zeroesHigh16BitsOfDest()

bool GCNSubtarget::zeroesHigh16BitsOfDest ( unsigned Opcode ) const

Returns if the result of this instruction with a 16-bit result returned in a 32-bit register implicitly zeroes the high 16-bits, rather than preserve the original value.

This list was mostly derived from experimentation.

Definition at line 220 of file AMDGPUSubtarget.cpp.

References getGeneration(), llvm::AMDGPUSubtarget::GFX9, and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.

Member Data Documentation

◆ AddNoCarryInsts

bool llvm::GCNSubtarget::AddNoCarryInsts = false

protected

Definition at line 187 of file GCNSubtarget.h.

Referenced by hasAddNoCarry().

◆ AutoWaitcntBeforeBarrier

bool llvm::GCNSubtarget::AutoWaitcntBeforeBarrier = false

protected

Definition at line 75 of file GCNSubtarget.h.

Referenced by hasAutoWaitcntBeforeBarrier().

◆ BackOffBarrier

bool llvm::GCNSubtarget::BackOffBarrier = false

protected

Definition at line 76 of file GCNSubtarget.h.

Referenced by supportsBackOffBarrier().

◆ CIInsts

bool llvm::GCNSubtarget::CIInsts = false

protected

Definition at line 103 of file GCNSubtarget.h.

Referenced by hasDS96AndDS128(), hasDwordx3LoadStores(), hasGWSSemaReleaseAll(), haveRoundOpsF64(), and useDS128().

◆ DumpCode

bool llvm::GCNSubtarget::DumpCode = false

protected

Definition at line 97 of file GCNSubtarget.h.

Referenced by dumpCode().

◆ EnableCuMode

bool llvm::GCNSubtarget::EnableCuMode = false

protected

Definition at line 88 of file GCNSubtarget.h.

Referenced by hasLDSMisalignedBug(), and isCuModeEnabled().

◆ EnableDS128

bool llvm::GCNSubtarget::EnableDS128 = false

protected

Definition at line 95 of file GCNSubtarget.h.

Referenced by useDS128().

◆ EnableFlatScratch

bool llvm::GCNSubtarget::EnableFlatScratch = false

protected

Definition at line 183 of file GCNSubtarget.h.

Referenced by enableFlatScratch().

◆ EnableLoadStoreOpt

bool llvm::GCNSubtarget::EnableLoadStoreOpt = false

protected

Definition at line 92 of file GCNSubtarget.h.

Referenced by loadStoreOptEnabled().

◆ EnablePRTStrictNull

bool llvm::GCNSubtarget::EnablePRTStrictNull = false

protected

Definition at line 96 of file GCNSubtarget.h.

Referenced by usePRTStrictNull().

◆ EnableSIScheduler

bool llvm::GCNSubtarget::EnableSIScheduler = false

protected

Definition at line 94 of file GCNSubtarget.h.

Referenced by enableSIScheduler().

◆ EnableSRAMECC

bool llvm::GCNSubtarget::EnableSRAMECC = false

protected

Definition at line 168 of file GCNSubtarget.h.

◆ EnableTgSplit

bool llvm::GCNSubtarget::EnableTgSplit = false

protected

Definition at line 87 of file GCNSubtarget.h.

Referenced by isTgSplitEnabled().

◆ EnableUnsafeDSOffsetFolding

bool llvm::GCNSubtarget::EnableUnsafeDSOffsetFolding = false

protected

Definition at line 93 of file GCNSubtarget.h.

Referenced by unsafeDSOffsetFoldingEnabled().

◆ EnableXNACK

bool llvm::GCNSubtarget::EnableXNACK = false

protected

Definition at line 85 of file GCNSubtarget.h.

◆ FastDenormalF32

bool llvm::GCNSubtarget::FastDenormalF32 = false

protected

Definition at line 69 of file GCNSubtarget.h.

◆ FeatureDisable

bool llvm::GCNSubtarget::FeatureDisable = false

protected

Definition at line 216 of file GCNSubtarget.h.

◆ FlatAddressSpace

bool llvm::GCNSubtarget::FlatAddressSpace = false

protected

Definition at line 177 of file GCNSubtarget.h.

Referenced by hasFlatAddressSpace().

◆ FlatForGlobal

bool llvm::GCNSubtarget::FlatForGlobal = false

protected

Definition at line 74 of file GCNSubtarget.h.

Referenced by initializeSubtargetDependencies(), and useFlatForGlobal().

◆ FlatGlobalInsts

bool llvm::GCNSubtarget::FlatGlobalInsts = false

protected

Definition at line 179 of file GCNSubtarget.h.

Referenced by hasFlatGlobalInsts().

◆ FlatInstOffsets

bool llvm::GCNSubtarget::FlatInstOffsets = false

protected

Definition at line 178 of file GCNSubtarget.h.

Referenced by hasFlatInstOffsets().

◆ FlatScratchInsts

bool llvm::GCNSubtarget::FlatScratchInsts = false

protected

Definition at line 180 of file GCNSubtarget.h.

Referenced by hasFlatScratchInsts().

◆ FMA

bool llvm::GCNSubtarget::FMA = false

protected

Definition at line 101 of file GCNSubtarget.h.

Referenced by hasFMA().

◆ FP64

bool llvm::GCNSubtarget::FP64 = false

protected

Definition at line 100 of file GCNSubtarget.h.

Referenced by hasFP64(), and hasHWFP64().

◆ FullRate64Ops

bool llvm::GCNSubtarget::FullRate64Ops = false

protected

Definition at line 71 of file GCNSubtarget.h.

Referenced by hasFullRate64Ops().

◆ Gen

unsigned llvm::GCNSubtarget::Gen = INVALID

protected

Definition at line 63 of file GCNSubtarget.h.

Referenced by getGeneration(), and initializeSubtargetDependencies().

◆ GFX10_3Insts

bool llvm::GCNSubtarget::GFX10_3Insts = false

protected

Definition at line 110 of file GCNSubtarget.h.

Referenced by hasGFX10_3Insts().

◆ GFX10_AEncoding

bool llvm::GCNSubtarget::GFX10_AEncoding = false

protected

Definition at line 139 of file GCNSubtarget.h.

Referenced by hasGFX10_AEncoding().

◆ GFX10_BEncoding

bool llvm::GCNSubtarget::GFX10_BEncoding = false

protected

Definition at line 140 of file GCNSubtarget.h.

Referenced by hasAtomicCSub(), hasGFX10_BEncoding(), and hasGlobalAddTidInsts().

◆ GFX10Insts

bool llvm::GCNSubtarget::GFX10Insts = false

protected

Definition at line 108 of file GCNSubtarget.h.

◆ GFX11Insts

bool llvm::GCNSubtarget::GFX11Insts = false

protected

Definition at line 109 of file GCNSubtarget.h.

Referenced by hasCompressedExport(), hasDelayAlu(), hasFlatScratchSVSMode(), hasNullExportTarget(), and hasSPackHL().

◆ GFX7GFX8GFX9Insts

bool llvm::GCNSubtarget::GFX7GFX8GFX9Insts = false

protected

Definition at line 111 of file GCNSubtarget.h.

◆ GFX8Insts

bool llvm::GCNSubtarget::GFX8Insts = false

protected

Definition at line 104 of file GCNSubtarget.h.

Referenced by hasLDSFPAtomicAdd().

◆ GFX90AInsts

bool llvm::GCNSubtarget::GFX90AInsts = false

protected

Definition at line 106 of file GCNSubtarget.h.

Referenced by hasGFX90AInsts(), hasPkMovB32(), hasShift64HighRegBug(), and needsAlignedVGPRs().

◆ GFX940Insts

bool llvm::GCNSubtarget::GFX940Insts = false

protected

Definition at line 107 of file GCNSubtarget.h.

Referenced by hasDOTOpSelHazard(), hasDstSelForwardingHazard(), hasFlatScratchSVSMode(), hasGFX940Insts(), hasLshlAddB64(), hasMovB64(), hasShift64HighRegBug(), hasTransForwardingHazard(), and hasVDecCoExecHazard().

◆ GFX9Insts

bool llvm::GCNSubtarget::GFX9Insts = false

protected

Definition at line 105 of file GCNSubtarget.h.

Referenced by hasScalarMulHiInsts(), hasScalarPackInsts(), and hasSwap().

◆ HalfRate64Ops

bool llvm::GCNSubtarget::HalfRate64Ops = false

protected

Definition at line 70 of file GCNSubtarget.h.

Referenced by hasHalfRate64Ops().

◆ HasA16

bool llvm::GCNSubtarget::HasA16 = false

protected

Definition at line 135 of file GCNSubtarget.h.

Referenced by hasA16().

◆ HasApertureRegs

bool llvm::GCNSubtarget::HasApertureRegs = false

protected

Definition at line 79 of file GCNSubtarget.h.

Referenced by hasApertureRegs().

◆ HasArchitectedFlatScratch

bool llvm::GCNSubtarget::HasArchitectedFlatScratch = false

protected

Definition at line 182 of file GCNSubtarget.h.

Referenced by flatScratchIsArchitected(), and getBaseReservedNumSGPRs().

◆ HasArchitectedSGPRs

bool llvm::GCNSubtarget::HasArchitectedSGPRs = false

protected

Definition at line 184 of file GCNSubtarget.h.

Referenced by hasArchitectedSGPRs().

◆ HasAtomicBufferGlobalPkAddF16Insts

bool llvm::GCNSubtarget::HasAtomicBufferGlobalPkAddF16Insts = false

protected

Definition at line 161 of file GCNSubtarget.h.

Referenced by hasAtomicBufferGlobalPkAddF16Insts().

◆ HasAtomicBufferGlobalPkAddF16NoRtnInsts

bool llvm::GCNSubtarget::HasAtomicBufferGlobalPkAddF16NoRtnInsts = false

protected

Definition at line 160 of file GCNSubtarget.h.

Referenced by hasAtomicBufferGlobalPkAddF16NoRtnInsts().

◆ HasAtomicDsPkAdd16Insts

bool llvm::GCNSubtarget::HasAtomicDsPkAdd16Insts = false

protected

Definition at line 156 of file GCNSubtarget.h.

Referenced by hasAtomicDsPkAdd16Insts().

◆ HasAtomicFaddNoRtnInsts

bool llvm::GCNSubtarget::HasAtomicFaddNoRtnInsts = false

protected

Definition at line 159 of file GCNSubtarget.h.

Referenced by hasAtomicFaddInsts(), and hasAtomicFaddNoRtnInsts().

◆ HasAtomicFaddRtnInsts

bool llvm::GCNSubtarget::HasAtomicFaddRtnInsts = false

protected

Definition at line 158 of file GCNSubtarget.h.

Referenced by hasAtomicFaddInsts(), and hasAtomicFaddRtnInsts().

◆ HasAtomicFlatPkAdd16Insts

bool llvm::GCNSubtarget::HasAtomicFlatPkAdd16Insts = false

protected

Definition at line 157 of file GCNSubtarget.h.

Referenced by hasAtomicFlatPkAdd16Insts().

◆ HasAtomicGlobalPkAddBF16Inst

bool llvm::GCNSubtarget::HasAtomicGlobalPkAddBF16Inst = false

protected

Definition at line 162 of file GCNSubtarget.h.

Referenced by hasAtomicGlobalPkAddBF16Inst().

◆ HasDLInsts

bool llvm::GCNSubtarget::HasDLInsts = false

protected

Definition at line 141 of file GCNSubtarget.h.

Referenced by hasDLInsts().

◆ HasDot10Insts

bool llvm::GCNSubtarget::HasDot10Insts = false

protected

Definition at line 152 of file GCNSubtarget.h.

Referenced by hasDot10Insts().

◆ HasDot1Insts

bool llvm::GCNSubtarget::HasDot1Insts = false

protected

Definition at line 143 of file GCNSubtarget.h.

Referenced by hasDot1Insts().

◆ HasDot2Insts

bool llvm::GCNSubtarget::HasDot2Insts = false

protected

Definition at line 144 of file GCNSubtarget.h.

Referenced by hasDot2Insts().

◆ HasDot3Insts

bool llvm::GCNSubtarget::HasDot3Insts = false

protected

Definition at line 145 of file GCNSubtarget.h.

Referenced by hasDot3Insts().

◆ HasDot4Insts

bool llvm::GCNSubtarget::HasDot4Insts = false

protected

Definition at line 146 of file GCNSubtarget.h.

Referenced by hasDot4Insts().

◆ HasDot5Insts

bool llvm::GCNSubtarget::HasDot5Insts = false

protected

Definition at line 147 of file GCNSubtarget.h.

Referenced by hasDot5Insts().

◆ HasDot6Insts

bool llvm::GCNSubtarget::HasDot6Insts = false

protected

Definition at line 148 of file GCNSubtarget.h.

Referenced by hasDot6Insts().

◆ HasDot7Insts

bool llvm::GCNSubtarget::HasDot7Insts = false

protected

Definition at line 149 of file GCNSubtarget.h.

Referenced by hasDot7Insts().

◆ HasDot8Insts

bool llvm::GCNSubtarget::HasDot8Insts = false

protected

Definition at line 150 of file GCNSubtarget.h.

Referenced by hasDot8Insts().

◆ HasDot9Insts

bool llvm::GCNSubtarget::HasDot9Insts = false

protected

Definition at line 151 of file GCNSubtarget.h.

Referenced by hasDot9Insts().

◆ HasDPALU_DPP

bool llvm::GCNSubtarget::HasDPALU_DPP = false

protected

Definition at line 130 of file GCNSubtarget.h.

Referenced by hasDPALU_DPP().

◆ HasDPP

bool llvm::GCNSubtarget::HasDPP = false

protected

Definition at line 128 of file GCNSubtarget.h.

Referenced by hasDPP(), hasDPPBroadcasts(), and hasDPPWavefrontShifts().

◆ HasDPP8

bool llvm::GCNSubtarget::HasDPP8 = false

protected

Definition at line 129 of file GCNSubtarget.h.

Referenced by hasDPP8().

◆ HasExtendedImageInsts

bool llvm::GCNSubtarget::HasExtendedImageInsts = false

protected

Definition at line 133 of file GCNSubtarget.h.

Referenced by hasExtendedImageInsts().

◆ HasFlatAtomicFaddF32Inst

bool llvm::GCNSubtarget::HasFlatAtomicFaddF32Inst = false

protected

Definition at line 163 of file GCNSubtarget.h.

Referenced by hasFlatAtomicFaddF32Inst().

◆ HasFlatSegmentOffsetBug

bool llvm::GCNSubtarget::HasFlatSegmentOffsetBug = false

protected

Definition at line 206 of file GCNSubtarget.h.

Referenced by hasFlatSegmentOffsetBug().

◆ HasFmacF64Inst

bool llvm::GCNSubtarget::HasFmacF64Inst = false

protected

Definition at line 142 of file GCNSubtarget.h.

Referenced by hasFmacF64Inst().

◆ HasFmaMixInsts

bool llvm::GCNSubtarget::HasFmaMixInsts = false

protected

Definition at line 118 of file GCNSubtarget.h.

Referenced by hasFmaMixInsts().

◆ HasForceStoreSC0SC1

bool llvm::GCNSubtarget::HasForceStoreSC0SC1 = false

protected

Definition at line 213 of file GCNSubtarget.h.

Referenced by hasForceStoreSC0SC1().

◆ HasFP8Insts

bool llvm::GCNSubtarget::HasFP8Insts = false

protected

Definition at line 154 of file GCNSubtarget.h.

Referenced by hasFP8Insts().

◆ HasG16

bool llvm::GCNSubtarget::HasG16 = false

protected

Definition at line 136 of file GCNSubtarget.h.

Referenced by hasG16().

◆ HasGDS

bool llvm::GCNSubtarget::HasGDS = false

protected

Definition at line 185 of file GCNSubtarget.h.

Referenced by hasGDS().

◆ HasGetWaveIdInst

bool llvm::GCNSubtarget::HasGetWaveIdInst = false

protected

Definition at line 172 of file GCNSubtarget.h.

Referenced by hasGetWaveIdInst().

◆ HasGFX11FullVGPRs

bool llvm::GCNSubtarget::HasGFX11FullVGPRs = false

protected

Definition at line 209 of file GCNSubtarget.h.

Referenced by hasGFX11FullVGPRs().

◆ HasGWS

bool llvm::GCNSubtarget::HasGWS = false

protected

Definition at line 186 of file GCNSubtarget.h.

Referenced by hasGWS().

◆ HasImageGather4D16Bug

bool llvm::GCNSubtarget::HasImageGather4D16Bug = false

protected

Definition at line 208 of file GCNSubtarget.h.

Referenced by hasImageGather4D16Bug().

◆ HasImageInsts

bool llvm::GCNSubtarget::HasImageInsts = false

protected

Definition at line 132 of file GCNSubtarget.h.

Referenced by hasImageInsts().

◆ HasImageStoreD16Bug

bool llvm::GCNSubtarget::HasImageStoreD16Bug = false

protected

Definition at line 207 of file GCNSubtarget.h.

Referenced by hasImageStoreD16Bug().

◆ HasInstFwdPrefetchBug

bool llvm::GCNSubtarget::HasInstFwdPrefetchBug = false

protected

Definition at line 200 of file GCNSubtarget.h.

Referenced by hasInstFwdPrefetchBug().

◆ HasIntClamp

bool llvm::GCNSubtarget::HasIntClamp = false

protected

Definition at line 117 of file GCNSubtarget.h.

Referenced by hasIntClamp().

◆ HasLdsBranchVmemWARHazard

bool llvm::GCNSubtarget::HasLdsBranchVmemWARHazard = false

protected

Definition at line 202 of file GCNSubtarget.h.

Referenced by hasLdsBranchVmemWARHazard().

◆ HasMADIntraFwdBug

bool llvm::GCNSubtarget::HasMADIntraFwdBug = false

protected

Definition at line 210 of file GCNSubtarget.h.

Referenced by hasMADIntraFwdBug().

◆ HasMAIInsts

bool llvm::GCNSubtarget::HasMAIInsts = false

protected

Definition at line 153 of file GCNSubtarget.h.

Referenced by hasMAIInsts().

◆ HasMFMAInlineLiteralBug

bool llvm::GCNSubtarget::HasMFMAInlineLiteralBug = false

protected

Definition at line 190 of file GCNSubtarget.h.

Referenced by hasMFMAInlineLiteralBug().

◆ HasMovrel

bool llvm::GCNSubtarget::HasMovrel = false

protected

Definition at line 119 of file GCNSubtarget.h.

Referenced by hasMovrel(), and initializeSubtargetDependencies().

◆ HasNoDataDepHazard

bool llvm::GCNSubtarget::HasNoDataDepHazard = false

protected

Definition at line 176 of file GCNSubtarget.h.

Referenced by hasNoDataDepHazard().

◆ HasNoSdstCMPX

bool llvm::GCNSubtarget::HasNoSdstCMPX = false

protected

Definition at line 170 of file GCNSubtarget.h.

Referenced by hasNoSdstCMPX().

◆ HasNSAClauseBug

bool llvm::GCNSubtarget::HasNSAClauseBug = false

protected

Definition at line 204 of file GCNSubtarget.h.

Referenced by hasNSAClauseBug().

◆ HasNSAEncoding

bool llvm::GCNSubtarget::HasNSAEncoding = false

protected

Definition at line 137 of file GCNSubtarget.h.

Referenced by hasNSAEncoding().

◆ HasNSAtoVMEMBug

bool llvm::GCNSubtarget::HasNSAtoVMEMBug = false

protected

Definition at line 203 of file GCNSubtarget.h.

Referenced by hasNSAtoVMEMBug().

◆ HasOffset3fBug

bool llvm::GCNSubtarget::HasOffset3fBug = false

protected

Definition at line 205 of file GCNSubtarget.h.

Referenced by hasOffset3fBug().

◆ HasPackedFP32Ops

bool llvm::GCNSubtarget::HasPackedFP32Ops = false

protected

Definition at line 131 of file GCNSubtarget.h.

Referenced by hasPackedFP32Ops().

◆ HasPackedTID

bool llvm::GCNSubtarget::HasPackedTID = false

protected

Definition at line 193 of file GCNSubtarget.h.

Referenced by hasPackedTID().

◆ HasPartialNSAEncoding

bool llvm::GCNSubtarget::HasPartialNSAEncoding = false

protected

Definition at line 138 of file GCNSubtarget.h.

Referenced by hasPartialNSAEncoding().

◆ HasPkFmacF16Inst

bool llvm::GCNSubtarget::HasPkFmacF16Inst = false

protected

Definition at line 155 of file GCNSubtarget.h.

Referenced by hasPkFmacF16Inst().

◆ HasR128A16

bool llvm::GCNSubtarget::HasR128A16 = false

protected

Definition at line 134 of file GCNSubtarget.h.

Referenced by hasR128A16().

◆ HasSALUFloatInsts

bool llvm::GCNSubtarget::HasSALUFloatInsts = false

protected

Definition at line 195 of file GCNSubtarget.h.

Referenced by hasSALUFloatInsts().

◆ HasScalarAtomics

bool llvm::GCNSubtarget::HasScalarAtomics = false

protected

Definition at line 122 of file GCNSubtarget.h.

Referenced by hasScalarAtomics().

◆ HasScalarStores

bool llvm::GCNSubtarget::HasScalarStores = false

protected

Definition at line 121 of file GCNSubtarget.h.

Referenced by hasScalarStores().

◆ HasSDWAMac

bool llvm::GCNSubtarget::HasSDWAMac = false

protected

Definition at line 126 of file GCNSubtarget.h.

Referenced by hasSDWAMac().

◆ HasSDWAOmod

bool llvm::GCNSubtarget::HasSDWAOmod = false

protected

Definition at line 123 of file GCNSubtarget.h.

Referenced by hasSDWAOmod().

◆ HasSDWAOutModsVOPC

bool llvm::GCNSubtarget::HasSDWAOutModsVOPC = false

protected

Definition at line 127 of file GCNSubtarget.h.

Referenced by hasSDWAOutModsVOPC().

◆ HasSDWAScalar

bool llvm::GCNSubtarget::HasSDWAScalar = false

protected

Definition at line 124 of file GCNSubtarget.h.

Referenced by hasSDWAScalar().

◆ HasSDWASdst

bool llvm::GCNSubtarget::HasSDWASdst = false

protected

Definition at line 125 of file GCNSubtarget.h.

Referenced by hasSDWASdst().

◆ HasShaderCyclesRegister

bool llvm::GCNSubtarget::HasShaderCyclesRegister = false

protected

Definition at line 174 of file GCNSubtarget.h.

Referenced by hasShaderCyclesRegister().

◆ HasSMemRealTime

bool llvm::GCNSubtarget::HasSMemRealTime = false

protected

Definition at line 116 of file GCNSubtarget.h.

Referenced by hasSMemRealTime().

◆ HasSMemTimeInst

bool llvm::GCNSubtarget::HasSMemTimeInst = false

protected

Definition at line 173 of file GCNSubtarget.h.

Referenced by hasSMemTimeInst().

◆ HasSMEMtoVectorWriteHazard

bool llvm::GCNSubtarget::HasSMEMtoVectorWriteHazard = false

protected

Definition at line 199 of file GCNSubtarget.h.

Referenced by hasSMEMtoVectorWriteHazard().

◆ HasUnpackedD16VMem

bool llvm::GCNSubtarget::HasUnpackedD16VMem = false

protected

Definition at line 188 of file GCNSubtarget.h.

Referenced by hasUnpackedD16VMem().

◆ HasVALUTransUseHazard

bool llvm::GCNSubtarget::HasVALUTransUseHazard = false

protected

Definition at line 212 of file GCNSubtarget.h.

Referenced by hasVALUTransUseHazard().

◆ HasVcmpxExecWARHazard

bool llvm::GCNSubtarget::HasVcmpxExecWARHazard = false

protected

Definition at line 201 of file GCNSubtarget.h.

Referenced by hasVcmpxExecWARHazard().

◆ HasVcmpxPermlaneHazard

bool llvm::GCNSubtarget::HasVcmpxPermlaneHazard = false

protected

Definition at line 197 of file GCNSubtarget.h.

Referenced by hasVcmpxPermlaneHazard().

◆ HasVGPRIndexMode

bool llvm::GCNSubtarget::HasVGPRIndexMode = false

protected

Definition at line 120 of file GCNSubtarget.h.

Referenced by hasVGPRIndexMode(), and initializeSubtargetDependencies().

◆ HasVMEMtoScalarWriteHazard

bool llvm::GCNSubtarget::HasVMEMtoScalarWriteHazard = false

protected

Definition at line 198 of file GCNSubtarget.h.

Referenced by hasVMEMtoScalarWriteHazard().

◆ HasVOP3Literal

bool llvm::GCNSubtarget::HasVOP3Literal = false

protected

Definition at line 175 of file GCNSubtarget.h.

Referenced by hasVOP3Literal().

◆ HasVOPDInsts

bool llvm::GCNSubtarget::HasVOPDInsts = false

protected

Definition at line 211 of file GCNSubtarget.h.

Referenced by hasVOPDInsts().

◆ HasVscnt

bool llvm::GCNSubtarget::HasVscnt = false

protected

Definition at line 171 of file GCNSubtarget.h.

Referenced by hasVscnt().

◆ InstrItins

InstrItineraryData llvm::GCNSubtarget::InstrItins

protected

Definition at line 64 of file GCNSubtarget.h.

Referenced by getInstrItineraryData().

◆ KernargPreload

bool llvm::GCNSubtarget::KernargPreload = false

protected

Definition at line 81 of file GCNSubtarget.h.

Referenced by hasKernargPreload().

◆ LDSBankCount

int llvm::GCNSubtarget::LDSBankCount = 0

protected

Definition at line 65 of file GCNSubtarget.h.

Referenced by getLDSBankCount(), and initializeSubtargetDependencies().

◆ LDSMisalignedBug

bool llvm::GCNSubtarget::LDSMisalignedBug = false

protected

Definition at line 189 of file GCNSubtarget.h.

Referenced by hasLDSMisalignedBug().

◆ MaxPrivateElementSize

unsigned llvm::GCNSubtarget::MaxPrivateElementSize = 0

protected

Definition at line 66 of file GCNSubtarget.h.

Referenced by getMaxPrivateElementSize(), and initializeSubtargetDependencies().

◆ MIMG_R128

bool llvm::GCNSubtarget::MIMG_R128 = false

protected

Definition at line 102 of file GCNSubtarget.h.

Referenced by hasMIMG_R128().

◆ NegativeScratchOffsetBug

bool llvm::GCNSubtarget::NegativeScratchOffsetBug = false

protected

Definition at line 114 of file GCNSubtarget.h.

Referenced by hasNegativeScratchOffsetBug().

◆ NegativeUnalignedScratchOffsetBug

bool llvm::GCNSubtarget::NegativeUnalignedScratchOffsetBug = false

protected

Definition at line 115 of file GCNSubtarget.h.

Referenced by hasNegativeUnalignedScratchOffsetBug().

◆ ScalarFlatScratchInsts

bool llvm::GCNSubtarget::ScalarFlatScratchInsts = false

protected

Definition at line 181 of file GCNSubtarget.h.

Referenced by hasScalarFlatScratchInsts().

◆ ScalarizeGlobal

bool llvm::GCNSubtarget::ScalarizeGlobal = false

protected

Definition at line 194 of file GCNSubtarget.h.

Referenced by getScalarizeGlobalBehavior(), and setScalarizeGlobalBehavior().

◆ SGPRInitBug

bool llvm::GCNSubtarget::SGPRInitBug = false

protected

Definition at line 112 of file GCNSubtarget.h.

Referenced by hasSGPRInitBug().

◆ SupportsSRAMECC

bool llvm::GCNSubtarget::SupportsSRAMECC = false

protected

Definition at line 164 of file GCNSubtarget.h.

◆ SupportsXNACK

bool llvm::GCNSubtarget::SupportsXNACK = false

protected

Definition at line 80 of file GCNSubtarget.h.

◆ TargetID

AMDGPU::IsaInfo::AMDGPUTargetID llvm::GCNSubtarget::TargetID

protected

Definition at line 62 of file GCNSubtarget.h.

Referenced by d16PreservesUnusedBits(), getTargetID(), initializeSubtargetDependencies(), and isXNACKEnabled().

◆ TargetTriple

Triple llvm::GCNSubtarget::TargetTriple

protected

Definition at line 61 of file GCNSubtarget.h.

◆ TrapHandler

bool llvm::GCNSubtarget::TrapHandler = false

protected

Definition at line 89 of file GCNSubtarget.h.

Referenced by isTrapHandlerEnabled().

◆ TSInfo

SelectionDAGTargetInfo llvm::GCNSubtarget::TSInfo

protected

Definition at line 218 of file GCNSubtarget.h.

Referenced by getSelectionDAGInfo().

◆ UnalignedAccessMode

bool llvm::GCNSubtarget::UnalignedAccessMode = false

protected

Definition at line 78 of file GCNSubtarget.h.

Referenced by hasUnalignedAccessMode(), hasUnalignedBufferAccessEnabled(), and hasUnalignedDSAccessEnabled().

◆ UnalignedBufferAccess

bool llvm::GCNSubtarget::UnalignedBufferAccess = false

protected

Definition at line 191 of file GCNSubtarget.h.

Referenced by hasUnalignedBufferAccess(), and hasUnalignedBufferAccessEnabled().

◆ UnalignedDSAccess

bool llvm::GCNSubtarget::UnalignedDSAccess = false

protected

Definition at line 192 of file GCNSubtarget.h.

Referenced by hasUnalignedDSAccess(), and hasUnalignedDSAccessEnabled().

◆ UnalignedScratchAccess

bool llvm::GCNSubtarget::UnalignedScratchAccess = false

protected

Definition at line 77 of file GCNSubtarget.h.

Referenced by hasUnalignedScratchAccess().

◆ UserSGPRInit16Bug

bool llvm::GCNSubtarget::UserSGPRInit16Bug = false

protected

Definition at line 113 of file GCNSubtarget.h.

Referenced by hasUserSGPRInit16Bug().

The documentation for this class was generated from the following files:

lib/Target/AMDGPU/GCNSubtarget.h
lib/Target/AMDGPU/AMDGPUSubtarget.cpp

Public Types

Public Member Functions

Static Public Member Functions

Protected Attributes

Detailed Description

Member Enumeration Documentation

◆ TrapHandlerAbi

◆ TrapID

Constructor & Destructor Documentation

◆ GCNSubtarget()

◆ ~GCNSubtarget()

Member Function Documentation

◆ adjustSchedDependency()

◆ computeOccupancy()

◆ createFillMFMAShadowMutation()

◆ d16PreservesUnusedBits()

◆ dumpCode()

◆ enableEarlyIfConversion()

◆ enableFlatScratch()

◆ enableMachineScheduler()

◆ enableSIScheduler()

◆ enableSubRegLiveness()

◆ flatScratchIsArchitected()

◆ flatScratchIsPointer()

◆ getAddressableNumSGPRs()

◆ getAddressableNumVGPRs()

◆ getBaseMaxNumSGPRs()

◆ getBaseMaxNumVGPRs()

◆ getBaseReservedNumSGPRs()

◆ getBoolRC()

◆ getCallLowering()

◆ getConstantBusLimit()

◆ getFrameLowering()

◆ getGeneration()

◆ getInlineAsmLowering()

◆ getInstrInfo()

◆ getInstrItineraryData()

◆ getInstructionSelector()

◆ getKnownHighZeroBitsForFrameIndex()

◆ getLDSBankCount()

◆ getLegalizerInfo()

◆ getMaxFlatWorkGroupSize()

◆ getMaxLocalMemSizeWithWaveCount()

◆ getMaxNumAGPRs()

◆ getMaxNumSGPRs() [1/3]

◆ getMaxNumSGPRs() [2/3]

◆ getMaxNumSGPRs() [3/3]

◆ getMaxNumUserSGPRs()

◆ getMaxNumVGPRs() [1/3]

◆ getMaxNumVGPRs() [2/3]

◆ getMaxNumVGPRs() [3/3]

◆ getMaxPrivateElementSize()

◆ getMaxWaveScratchSize()

◆ getMaxWavesPerEU()

◆ getMaxWorkGroupsPerCU()

◆ getMinFlatWorkGroupSize()

◆ getMinNumSGPRs()

◆ getMinNumVGPRs()

◆ getMinWavesPerEU()

◆ getNSAMaxSize()

◆ getNSAThreshold()

◆ getOccupancyWithNumSGPRs()

◆ getOccupancyWithNumVGPRs()

◆ getPostRAMutations()

◆ getRegBankInfo()

◆ getRegisterInfo()

◆ getReservedNumSGPRs() [1/2]

◆ getReservedNumSGPRs() [2/2]

◆ getScalarizeGlobalBehavior()

◆ getSelectionDAGInfo()

◆ getSetRegWaitStates()

◆ getSGPRAllocGranule()

◆ getSGPREncodingGranule()

◆ getStackAlignment()

◆ getTargetID()

◆ getTargetLowering()

◆ getTotalNumSGPRs()

◆ getTotalNumVGPRs()

◆ getTrapHandlerAbi()

◆ getVGPRAllocGranule()