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28 std::unique_ptr<MCObjectTargetWriter>
29 createObjectTargetWriter()
const override {
40 unsigned getNumFixupKinds()
const override {
return 1; }
42 bool mayNeedRelaxation(
const MCInst &Inst,
47 void relaxInstruction(
MCInst &Inst,
This is an optimization pass for GlobalISel generic memory operations.
A relaxable fragment holds on to its MCInst, since it may need to be relaxed during the assembler lay...
Target - Wrapper for Target specific information.
Instances of this class represent a single low-level machine instruction.
Error applyFixup(LinkGraph &G, Block &B, const Edge &E)
Apply fixup expression for edge to block content.
Generic interface to target specific assembler backends.
This class implements an extremely fast bulk output stream that can only output to a stream.
static RegisterPass< DebugifyFunctionPass > DF("debugify-function", "Attach debug info to a function")
std::unique_ptr< MCObjectTargetWriter > createSPIRVObjectTargetWriter()
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
unsigned const MachineRegisterInfo * MRI
Encapsulates the layout of an assembly file at a particular point in time.
MCAsmBackend * createSPIRVAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)
This represents an "assembler immediate".
Generic base class for all target subtargets.
Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...
LLVM Value Representation.