23#define DEBUG_TYPE "asm-printer"
33#define GET_INSTRUCTION_NAME
34#define PRINT_ALIAS_INSTR
35#include "SparcGenAsmWriter.inc"
38 return (STI.
hasFeature(Sparc::FeatureV9)) != 0;
57 switch (
MI->getOpcode()) {
58 default:
return false;
61 if (
MI->getNumOperands() != 3)
63 if (!
MI->getOperand(0).isReg())
65 switch (
MI->getOperand(0).getReg()) {
66 default:
return false;
68 if (
MI->getOperand(2).isImm() &&
69 MI->getOperand(2).getImm() == 8) {
70 switch(
MI->getOperand(1).getReg()) {
72 case SP::I7: O <<
"\tret";
return true;
73 case SP::O7: O <<
"\tretl";
return true;
83 case SP::V9FCMPS:
case SP::V9FCMPD:
case SP::V9FCMPQ:
84 case SP::V9FCMPES:
case SP::V9FCMPED:
case SP::V9FCMPEQ: {
86 || (
MI->getNumOperands() != 3)
87 || (!
MI->getOperand(0).isReg())
88 || (
MI->getOperand(0).getReg() != SP::FCC0))
91 switch(
MI->getOpcode()) {
93 case SP::V9FCMPS: O <<
"\tfcmps ";
break;
94 case SP::V9FCMPD: O <<
"\tfcmpd ";
break;
95 case SP::V9FCMPQ: O <<
"\tfcmpq ";
break;
96 case SP::V9FCMPES: O <<
"\tfcmpes ";
break;
97 case SP::V9FCMPED: O <<
"\tfcmped ";
break;
98 case SP::V9FCMPEQ: O <<
"\tfcmpeq ";
break;
119 switch (
MI->getOpcode()) {
131 O << ((int) MO.
getImm() & 0x7f);
136 assert(MO.
isExpr() &&
"Unknown operand kind in printOperand");
144 if (Modifier && !strcmp(Modifier,
"arith")) {
154 bool PrintedFirstOperand =
false;
157 PrintedFirstOperand =
true;
162 const bool SkipSecondOperand =
163 PrintedFirstOperand && ((Op2.
isReg() && Op2.
getReg() == SP::G0) ||
166 if (!SkipSecondOperand) {
167 if (PrintedFirstOperand)
176 int CC = (int)
MI->getOperand(opNum).getImm();
177 switch (
MI->getOpcode()) {
187 case SP::MOVFCCrr:
case SP::V9MOVFCCrr:
188 case SP::MOVFCCri:
case SP::V9MOVFCCri:
189 case SP::FMOVS_FCC:
case SP::V9FMOVS_FCC:
190 case SP::FMOVD_FCC:
case SP::V9FMOVD_FCC:
191 case SP::FMOVQ_FCC:
case SP::V9FMOVQ_FCC:
222 static const char *
const TagNames[] = {
223 "#LoadLoad",
"#StoreLoad",
"#LoadStore",
"#StoreStore",
224 "#Lookaside",
"#MemIssue",
"#Sync"};
226 unsigned Imm =
MI->getOperand(opNum).getImm();
234 for (
unsigned i = 0; i < std::size(TagNames); i++) {
235 if (Imm & (1 << i)) {
236 O << (First ?
"" :
" | ") << TagNames[i];
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
void print(raw_ostream &OS, const MCAsmInfo *MAI, bool InParens=false) const
void printAnnotation(raw_ostream &OS, StringRef Annot)
Utility function for printing annotations.
Instances of this class represent a single low-level machine instruction.
Instances of this class represent operands of the MCInst class.
unsigned getReg() const
Returns the register number.
const MCExpr * getExpr() const
Wrapper class representing physical registers. Should be passed by value.
Generic base class for all target subtargets.
bool hasFeature(unsigned Feature) const
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot, const MCSubtargetInfo &STI, raw_ostream &O) override
Print the specified MCInst to the specified raw_ostream.
bool printAliasInstr(const MCInst *MI, uint64_t Address, const MCSubtargetInfo &STI, raw_ostream &O)
void printOperand(const MCInst *MI, int opNum, const MCSubtargetInfo &STI, raw_ostream &OS)
bool isV9(const MCSubtargetInfo &STI) const
bool printSparcAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI, raw_ostream &OS)
void printCCOperand(const MCInst *MI, int opNum, const MCSubtargetInfo &STI, raw_ostream &OS)
void printRegName(raw_ostream &OS, MCRegister Reg) const override
Print the assembler register name.
bool printGetPCX(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &OS)
static const char * getRegisterName(MCRegister Reg)
void printMemOperand(const MCInst *MI, int opNum, const MCSubtargetInfo &STI, raw_ostream &OS, const char *Modifier=nullptr)
void printInstruction(const MCInst *MI, uint64_t Address, const MCSubtargetInfo &STI, raw_ostream &O)
void printMembarTag(const MCInst *MI, int opNum, const MCSubtargetInfo &STI, raw_ostream &O)
StringRef - Represent a constant reference to a string, i.e.
std::string lower() const
This class implements an extremely fast bulk output stream that can only output to a stream.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
This is an optimization pass for GlobalISel generic memory operations.
static const char * SPARCCondCodeToString(SPCC::CondCodes CC)