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24 #define DEBUG_TYPE "ve-asmprinter"
26 #define GET_INSTRUCTION_NAME
27 #define PRINT_ALIAS_INSTR
28 #include "VEGenAsmWriter.inc"
32 unsigned AltIdx = VE::AsmName;
35 AltIdx = VE::NoRegAltName;
58 int32_t TruncatedImm =
static_cast<int32_t
>(MO.
getImm());
63 assert(MO.
isExpr() &&
"Unknown operand kind in printOperand");
71 if (Modifier && !strcmp(Modifier,
"arith")) {
78 if (
MI->getOperand(OpNum + 2).isImm() &&
79 MI->getOperand(OpNum + 2).getImm() == 0) {
84 if (
MI->getOperand(OpNum + 1).isImm() &&
85 MI->getOperand(OpNum + 1).getImm() == 0 &&
86 MI->getOperand(OpNum).isImm() &&
MI->getOperand(OpNum).getImm() == 0) {
87 if (
MI->getOperand(OpNum + 2).isImm() &&
88 MI->getOperand(OpNum + 2).getImm() == 0) {
95 if (
MI->getOperand(OpNum + 1).isImm() &&
96 MI->getOperand(OpNum + 1).getImm() == 0) {
101 if (
MI->getOperand(OpNum).isImm() &&
MI->getOperand(OpNum).getImm() == 0) {
115 if (Modifier && !strcmp(Modifier,
"arith")) {
122 if (
MI->getOperand(OpNum + 1).isImm() &&
123 MI->getOperand(OpNum + 1).getImm() == 0) {
128 if (
MI->getOperand(OpNum).isImm() &&
MI->getOperand(OpNum).getImm() == 0) {
129 if (
MI->getOperand(OpNum + 1).isImm() &&
130 MI->getOperand(OpNum + 1).getImm() == 0) {
146 if (Modifier && !strcmp(Modifier,
"arith")) {
153 if (
MI->getOperand(OpNum + 1).isImm() &&
154 MI->getOperand(OpNum + 1).getImm() == 0) {
159 if (
MI->getOperand(OpNum).isImm() &&
MI->getOperand(OpNum).getImm() == 0) {
160 if (
MI->getOperand(OpNum + 1).isImm() &&
161 MI->getOperand(OpNum + 1).getImm() == 0) {
177 if (Modifier && !strcmp(Modifier,
"arith")) {
184 if (
MI->getOperand(OpNum + 1).isImm() &&
185 MI->getOperand(OpNum + 1).getImm() == 0) {
191 if (
MI->getOperand(OpNum).isReg())
199 int MImm = (
int)
MI->getOperand(OpNum).getImm() & 0x7f;
201 O <<
"(" << MImm - 64 <<
")0";
203 O <<
"(" << MImm <<
")1";
208 int CC = (
int)
MI->getOperand(OpNum).getImm();
214 int RD = (
int)
MI->getOperand(OpNum).getImm();
This is an optimization pass for GlobalISel generic memory operations.
void printMemASXOperand(const MCInst *MI, int OpNum, const MCSubtargetInfo &STI, raw_ostream &OS, const char *Modifier=nullptr)
void printInstruction(const MCInst *, uint64_t, const MCSubtargetInfo &, raw_ostream &)
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot, const MCSubtargetInfo &STI, raw_ostream &OS) override
Print the specified MCInst to the specified raw_ostream.
bool contains(MCRegister Reg) const
contains - Return true if the specified register is included in this register class.
static const char * getRegisterName(unsigned RegNo, unsigned AltIdx=VE::NoRegAltName)
bool printAliasInstr(const MCInst *, uint64_t Address, const MCSubtargetInfo &, raw_ostream &)
Instances of this class represent a single low-level machine instruction.
void printOperand(const MCInst *MI, int OpNum, const MCSubtargetInfo &STI, raw_ostream &OS)
const MCRegisterInfo & MRI
const MCRegisterClass & getRegClass(unsigned i) const
Returns the register class associated with the enumeration value.
void printRegName(raw_ostream &OS, unsigned RegNo) const override
Print the assembler register name.
Clang compiles this i1 i64 store i64 i64 store i64 i64 store i64 i64 store i64 align Which gets codegen d xmm0 movaps rbp movaps rbp movaps rbp movaps rbp rbp rbp rbp rbp It would be better to have movq s of instead of the movaps s LLVM produces ret int
void printMImmOperand(const MCInst *MI, int OpNum, const MCSubtargetInfo &STI, raw_ostream &OS)
This class implements an extremely fast bulk output stream that can only output to a stream.
void printCCOperand(const MCInst *MI, int OpNum, const MCSubtargetInfo &STI, raw_ostream &OS)
void printAnnotation(raw_ostream &OS, StringRef Annot)
Utility function for printing annotations.
void printRDOperand(const MCInst *MI, int OpNum, const MCSubtargetInfo &STI, raw_ostream &OS)
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
StringRef - Represent a constant reference to a string, i.e.
void printMemASOperandRRM(const MCInst *MI, int OpNum, const MCSubtargetInfo &STI, raw_ostream &OS, const char *Modifier=nullptr)
void printMemASOperandASX(const MCInst *MI, int OpNum, const MCSubtargetInfo &STI, raw_ostream &OS, const char *Modifier=nullptr)
const MCExpr * getExpr() const
static const char * VECondCodeToString(VECC::CondCode CC)
void print(raw_ostream &OS, const MCAsmInfo *MAI, bool InParens=false) const
void printMemASOperandHM(const MCInst *MI, int OpNum, const MCSubtargetInfo &STI, raw_ostream &OS, const char *Modifier=nullptr)
Instances of this class represent operands of the MCInst class.
Generic base class for all target subtargets.
static const char * VERDToString(VERD::RoundingMode R)
unsigned getReg() const
Returns the register number.