LLVM  14.0.0git
WebAssemblyInstrInfo.h
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1 //=- WebAssemblyInstrInfo.h - WebAssembly Instruction Information -*- C++ -*-=//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 ///
9 /// \file
10 /// This file contains the WebAssembly implementation of the
11 /// TargetInstrInfo class.
12 ///
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYINSTRINFO_H
16 #define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYINSTRINFO_H
17 
19 #include "llvm/ADT/ArrayRef.h"
21 
22 #define GET_INSTRINFO_HEADER
23 #include "WebAssemblyGenInstrInfo.inc"
24 
25 #define GET_INSTRINFO_OPERAND_ENUM
26 #include "WebAssemblyGenInstrInfo.inc"
27 
28 namespace llvm {
29 
30 namespace WebAssembly {
31 
32 int16_t getNamedOperandIdx(uint16_t Opcode, uint16_t NamedIndex);
33 
34 }
35 
36 class WebAssemblySubtarget;
37 
39  const WebAssemblyRegisterInfo RI;
40 
41 public:
42  explicit WebAssemblyInstrInfo(const WebAssemblySubtarget &STI);
43 
44  const WebAssemblyRegisterInfo &getRegisterInfo() const { return RI; }
45 
47  AAResults *AA) const override;
48 
50  const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg,
51  bool KillSrc) const override;
53  unsigned OpIdx1,
54  unsigned OpIdx2) const override;
55 
57  MachineBasicBlock *&FBB,
59  bool AllowModify = false) const override;
61  int *BytesRemoved = nullptr) const override;
64  const DebugLoc &DL,
65  int *BytesAdded = nullptr) const override;
66  bool
68 
70  getSerializableTargetIndices() const override;
71 
72  const MachineOperand &getCalleeOperand(const MachineInstr &MI) const override;
73 };
74 
75 } // end namespace llvm
76 
77 #endif
llvm::WebAssemblyInstrInfo::WebAssemblyInstrInfo
WebAssemblyInstrInfo(const WebAssemblySubtarget &STI)
Definition: WebAssemblyInstrInfo.cpp:36
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:103
llvm::WebAssemblyInstrInfo::insertBranch
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const override
Definition: WebAssemblyInstrInfo.cpp:175
llvm
---------------------— PointerInfo ------------------------------------—
Definition: AllocatorList.h:23
llvm::WebAssemblyInstrInfo::commuteInstructionImpl
MachineInstr * commuteInstructionImpl(MachineInstr &MI, bool NewMI, unsigned OpIdx1, unsigned OpIdx2) const override
Definition: WebAssemblyInstrInfo.cpp:91
llvm::WebAssemblyInstrInfo::copyPhysReg
void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg, bool KillSrc) const override
Definition: WebAssemblyInstrInfo.cpp:57
TargetInstrInfo.h
llvm::WebAssemblyRegisterInfo
Definition: WebAssemblyRegisterInfo.h:28
llvm::AAResults
Definition: AliasAnalysis.h:456
llvm::MachineOperand
MachineOperand class - Representation of each machine instruction operand.
Definition: MachineOperand.h:49
llvm::WebAssemblyInstrInfo::isReallyTriviallyReMaterializable
bool isReallyTriviallyReMaterializable(const MachineInstr &MI, AAResults *AA) const override
Definition: WebAssemblyInstrInfo.cpp:42
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:95
WebAssemblyGenInstrInfo
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:64
llvm::WebAssemblyInstrInfo::reverseBranchCondition
bool reverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const override
Definition: WebAssemblyInstrInfo.cpp:201
ArrayRef.h
llvm::WebAssemblyInstrInfo::getCalleeOperand
const MachineOperand & getCalleeOperand(const MachineInstr &MI) const override
Definition: WebAssemblyInstrInfo.cpp:220
llvm::ArrayRef
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: APInt.h:32
Cond
SmallVector< MachineOperand, 4 > Cond
Definition: BasicBlockSections.cpp:179
llvm::WebAssemblyInstrInfo::analyzeBranch
bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify=false) const override
Definition: WebAssemblyInstrInfo.cpp:105
DL
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Definition: AArch64SLSHardening.cpp:76
llvm::WebAssemblySubtarget
Definition: WebAssemblySubtarget.h:35
llvm::WebAssemblyInstrInfo::getSerializableTargetIndices
ArrayRef< std::pair< int, const char * > > getSerializableTargetIndices() const override
Definition: WebAssemblyInstrInfo.cpp:209
MBB
MachineBasicBlock & MBB
Definition: AArch64SLSHardening.cpp:74
llvm::WebAssemblyInstrInfo
Definition: WebAssemblyInstrInfo.h:38
uint16_t
WebAssemblyRegisterInfo.h
llvm::SmallVectorImpl
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:43
llvm::DebugLoc
A debug info location.
Definition: DebugLoc.h:33
llvm::WebAssemblyInstrInfo::getRegisterInfo
const WebAssemblyRegisterInfo & getRegisterInfo() const
Definition: WebAssemblyInstrInfo.h:44
llvm::WebAssembly::getNamedOperandIdx
int16_t getNamedOperandIdx(uint16_t Opcode, uint16_t NamedIndex)
llvm::MachineInstrBundleIterator< MachineInstr >
llvm::WebAssemblyInstrInfo::removeBranch
unsigned removeBranch(MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const override
Definition: WebAssemblyInstrInfo.cpp:153
llvm::MCRegister
Wrapper class representing physical registers. Should be passed by value.
Definition: MCRegister.h:23