LLVM 22.0.0git
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#include "AMDGPURegBankLegalizeRules.h"
#include "AMDGPUInstrInfo.h"
#include "GCNSubtarget.h"
#include "llvm/CodeGen/GlobalISel/GenericMachineInstrs.h"
#include "llvm/CodeGen/MachineUniformityAnalysis.h"
#include "llvm/IR/IntrinsicsAMDGPU.h"
#include "llvm/Support/AMDGPUAddrSpace.h"
Go to the source code of this file.
Classes | |
class | Predicate |
Macros | |
#define | DEBUG_TYPE "amdgpu-regbanklegalize" |
Definitions of RegBankLegalize Rules for all opcodes. |
Functions | |
bool | matchUniformityAndLLT (Register Reg, UniformityLLTOpPredicateID UniID, const MachineUniformityInfo &MUI, const MachineRegisterInfo &MRI) |
UniformityLLTOpPredicateID | LLTToId (LLT Ty) |
UniformityLLTOpPredicateID | LLTToBId (LLT Ty) |
#define DEBUG_TYPE "amdgpu-regbanklegalize" |
Definitions of RegBankLegalize Rules for all opcodes.
Implementation of container for all the Rules and search. Fast search for most common case when Rule.Predicate checks LLT and uniformity of register in operand 0.
Definition at line 24 of file AMDGPURegBankLegalizeRules.cpp.
UniformityLLTOpPredicateID LLTToBId | ( | LLT | Ty | ) |
Definition at line 228 of file AMDGPURegBankLegalizeRules.cpp.
References _, llvm::AMDGPU::B128, llvm::AMDGPU::B32, llvm::AMDGPU::B64, llvm::AMDGPU::B96, llvm::LLT::fixed_vector(), llvm::AMDGPU::isAnyPtr(), and llvm::LLT::scalar().
Referenced by llvm::AMDGPU::SetOfRulesForOpcode::findMappingForMI().
UniformityLLTOpPredicateID LLTToId | ( | LLT | Ty | ) |
Definition at line 210 of file AMDGPURegBankLegalizeRules.cpp.
References _, llvm::LLT::fixed_vector(), S16, S32, S64, llvm::LLT::scalar(), V2S16, V2S32, V3S32, and V4S32.
Referenced by llvm::AMDGPU::SetOfRulesForOpcode::findMappingForMI().
bool matchUniformityAndLLT | ( | Register | Reg, |
UniformityLLTOpPredicateID | UniID, | ||
const MachineUniformityInfo & | MUI, | ||
const MachineRegisterInfo & | MRI ) |
Definition at line 45 of file AMDGPURegBankLegalizeRules.cpp.
References _, llvm::AMDGPU::B128, llvm::AMDGPU::B256, llvm::AMDGPU::B32, llvm::AMDGPU::B512, llvm::AMDGPU::B64, llvm::AMDGPU::B96, llvm::AMDGPU::DivB128, llvm::AMDGPU::DivB256, llvm::AMDGPU::DivB32, llvm::AMDGPU::DivB512, llvm::AMDGPU::DivB64, llvm::AMDGPU::DivB96, llvm::AMDGPU::DivP0, llvm::AMDGPU::DivP1, llvm::AMDGPU::DivP3, llvm::AMDGPU::DivP4, llvm::AMDGPU::DivP5, llvm::AMDGPU::DivPtr128, llvm::AMDGPU::DivPtr32, llvm::AMDGPU::DivPtr64, llvm::AMDGPU::DivS1, llvm::AMDGPU::DivS128, llvm::AMDGPU::DivS16, llvm::AMDGPU::DivS32, llvm::AMDGPU::DivS64, llvm::AMDGPU::DivV2S16, llvm::LLT::fixed_vector(), llvm::AMDGPU::isAnyPtr(), llvm::GenericUniformityInfo< ContextT >::isDivergent(), llvm::GenericUniformityInfo< ContextT >::isUniform(), llvm_unreachable, MRI, llvm::AMDGPU::P0, llvm::AMDGPU::P1, llvm::AMDGPU::P3, llvm::AMDGPU::P4, llvm::AMDGPU::P5, llvm::LLT::pointer(), llvm::AMDGPU::Ptr128, llvm::AMDGPU::Ptr32, llvm::AMDGPU::Ptr64, Reg, S1, S128, S16, S32, S64, llvm::LLT::scalar(), llvm::AMDGPU::UniB128, llvm::AMDGPU::UniB256, llvm::AMDGPU::UniB32, llvm::AMDGPU::UniB512, llvm::AMDGPU::UniB64, llvm::AMDGPU::UniB96, llvm::AMDGPU::UniP0, llvm::AMDGPU::UniP1, llvm::AMDGPU::UniP3, llvm::AMDGPU::UniP4, llvm::AMDGPU::UniP5, llvm::AMDGPU::UniPtr128, llvm::AMDGPU::UniPtr32, llvm::AMDGPU::UniPtr64, llvm::AMDGPU::UniS1, llvm::AMDGPU::UniS128, llvm::AMDGPU::UniS16, llvm::AMDGPU::UniS32, llvm::AMDGPU::UniS64, llvm::AMDGPU::UniV2S16, V2S32, and V4S32.
Referenced by llvm::AMDGPU::PredicateMapping::match().