LLVM 18.0.0git
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MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc. More...
#include "llvm/CodeGen/MachineRegisterInfo.h"
Classes | |
class | defusechain_instr_iterator |
defusechain_iterator - This class provides iterator support for machine operands in the function that use or define a specific register. More... | |
class | defusechain_iterator |
reg_begin/reg_end - Provide iteration support to walk over all definitions and uses of a register within the MachineFunction that corresponds to this MachineRegisterInfo object. More... | |
class | Delegate |
Public Types | |
using | reg_iterator = defusechain_iterator< true, true, false, true, false, false > |
reg_iterator/reg_begin/reg_end - Walk all defs and uses of the specified register. | |
using | reg_instr_iterator = defusechain_instr_iterator< true, true, false, false, true, false > |
reg_instr_iterator/reg_instr_begin/reg_instr_end - Walk all defs and uses of the specified register, stepping by MachineInstr. | |
using | reg_bundle_iterator = defusechain_instr_iterator< true, true, false, false, false, true > |
reg_bundle_iterator/reg_bundle_begin/reg_bundle_end - Walk all defs and uses of the specified register, stepping by bundle. | |
using | reg_nodbg_iterator = defusechain_iterator< true, true, true, true, false, false > |
reg_nodbg_iterator/reg_nodbg_begin/reg_nodbg_end - Walk all defs and uses of the specified register, skipping those marked as Debug. | |
using | reg_instr_nodbg_iterator = defusechain_instr_iterator< true, true, true, false, true, false > |
reg_instr_nodbg_iterator/reg_instr_nodbg_begin/reg_instr_nodbg_end - Walk all defs and uses of the specified register, stepping by MachineInstr, skipping those marked as Debug. | |
using | reg_bundle_nodbg_iterator = defusechain_instr_iterator< true, true, true, false, false, true > |
reg_bundle_nodbg_iterator/reg_bundle_nodbg_begin/reg_bundle_nodbg_end - Walk all defs and uses of the specified register, stepping by bundle, skipping those marked as Debug. | |
using | def_iterator = defusechain_iterator< false, true, false, true, false, false > |
def_iterator/def_begin/def_end - Walk all defs of the specified register. | |
using | def_instr_iterator = defusechain_instr_iterator< false, true, false, false, true, false > |
def_instr_iterator/def_instr_begin/def_instr_end - Walk all defs of the specified register, stepping by MachineInst. | |
using | def_bundle_iterator = defusechain_instr_iterator< false, true, false, false, false, true > |
def_bundle_iterator/def_bundle_begin/def_bundle_end - Walk all defs of the specified register, stepping by bundle. | |
using | use_iterator = defusechain_iterator< true, false, false, true, false, false > |
use_iterator/use_begin/use_end - Walk all uses of the specified register. | |
using | use_instr_iterator = defusechain_instr_iterator< true, false, false, false, true, false > |
use_instr_iterator/use_instr_begin/use_instr_end - Walk all uses of the specified register, stepping by MachineInstr. | |
using | use_bundle_iterator = defusechain_instr_iterator< true, false, false, false, false, true > |
use_bundle_iterator/use_bundle_begin/use_bundle_end - Walk all uses of the specified register, stepping by bundle. | |
using | use_nodbg_iterator = defusechain_iterator< true, false, true, true, false, false > |
use_nodbg_iterator/use_nodbg_begin/use_nodbg_end - Walk all uses of the specified register, skipping those marked as Debug. | |
using | use_instr_nodbg_iterator = defusechain_instr_iterator< true, false, true, false, true, false > |
use_instr_nodbg_iterator/use_instr_nodbg_begin/use_instr_nodbg_end - Walk all uses of the specified register, stepping by MachineInstr, skipping those marked as Debug. | |
using | use_bundle_nodbg_iterator = defusechain_instr_iterator< true, false, true, false, false, true > |
use_bundle_nodbg_iterator/use_bundle_nodbg_begin/use_bundle_nodbg_end - Walk all uses of the specified register, stepping by bundle, skipping those marked as Debug. | |
using | livein_iterator = std::vector< std::pair< MCRegister, Register > >::const_iterator |
Public Member Functions | |
MachineRegisterInfo (MachineFunction *MF) | |
MachineRegisterInfo (const MachineRegisterInfo &)=delete | |
MachineRegisterInfo & | operator= (const MachineRegisterInfo &)=delete |
const TargetRegisterInfo * | getTargetRegisterInfo () const |
void | resetDelegate (Delegate *delegate) |
void | addDelegate (Delegate *delegate) |
void | noteNewVirtualRegister (Register Reg) |
void | noteCloneVirtualRegister (Register NewReg, Register SrcReg) |
bool | isSSA () const |
void | leaveSSA () |
bool | tracksLiveness () const |
tracksLiveness - Returns true when tracking register liveness accurately. | |
void | invalidateLiveness () |
invalidateLiveness - Indicates that register liveness is no longer being tracked accurately. | |
bool | shouldTrackSubRegLiveness (const TargetRegisterClass &RC) const |
Returns true if liveness for register class RC should be tracked at the subregister level. | |
bool | shouldTrackSubRegLiveness (Register VReg) const |
bool | subRegLivenessEnabled () const |
bool | isUpdatedCSRsInitialized () const |
Returns true if the updated CSR list was initialized and false otherwise. | |
bool | isArgumentRegister (const MachineFunction &MF, MCRegister Reg) const |
Returns true if a register can be used as an argument to a function. | |
bool | isFixedRegister (const MachineFunction &MF, MCRegister Reg) const |
Returns true if a register is a fixed register. | |
bool | isGeneralPurposeRegister (const MachineFunction &MF, MCRegister Reg) const |
Returns true if a register is a general purpose register. | |
void | disableCalleeSavedRegister (MCRegister Reg) |
Disables the register from the list of CSRs. | |
const MCPhysReg * | getCalleeSavedRegs () const |
Returns list of callee saved registers. | |
void | setCalleeSavedRegs (ArrayRef< MCPhysReg > CSRs) |
Sets the updated Callee Saved Registers list. | |
void | addRegOperandToUseList (MachineOperand *MO) |
Add MO to the linked list of operands for its register. | |
void | removeRegOperandFromUseList (MachineOperand *MO) |
Remove MO from its use-def list. | |
void | moveOperands (MachineOperand *Dst, MachineOperand *Src, unsigned NumOps) |
Move NumOps operands from Src to Dst, updating use-def lists as needed. | |
void | verifyUseList (Register Reg) const |
Verify the sanity of the use list for Reg. | |
void | verifyUseLists () const |
Verify the use list of all registers. | |
reg_iterator | reg_begin (Register RegNo) const |
iterator_range< reg_iterator > | reg_operands (Register Reg) const |
reg_instr_iterator | reg_instr_begin (Register RegNo) const |
iterator_range< reg_instr_iterator > | reg_instructions (Register Reg) const |
reg_bundle_iterator | reg_bundle_begin (Register RegNo) const |
iterator_range< reg_bundle_iterator > | reg_bundles (Register Reg) const |
bool | reg_empty (Register RegNo) const |
reg_empty - Return true if there are no instructions using or defining the specified register (it may be live-in). | |
reg_nodbg_iterator | reg_nodbg_begin (Register RegNo) const |
iterator_range< reg_nodbg_iterator > | reg_nodbg_operands (Register Reg) const |
reg_instr_nodbg_iterator | reg_instr_nodbg_begin (Register RegNo) const |
iterator_range< reg_instr_nodbg_iterator > | reg_nodbg_instructions (Register Reg) const |
reg_bundle_nodbg_iterator | reg_bundle_nodbg_begin (Register RegNo) const |
iterator_range< reg_bundle_nodbg_iterator > | reg_nodbg_bundles (Register Reg) const |
bool | reg_nodbg_empty (Register RegNo) const |
reg_nodbg_empty - Return true if the only instructions using or defining Reg are Debug instructions. | |
def_iterator | def_begin (Register RegNo) const |
iterator_range< def_iterator > | def_operands (Register Reg) const |
def_instr_iterator | def_instr_begin (Register RegNo) const |
iterator_range< def_instr_iterator > | def_instructions (Register Reg) const |
def_bundle_iterator | def_bundle_begin (Register RegNo) const |
iterator_range< def_bundle_iterator > | def_bundles (Register Reg) const |
bool | def_empty (Register RegNo) const |
def_empty - Return true if there are no instructions defining the specified register (it may be live-in). | |
StringRef | getVRegName (Register Reg) const |
void | insertVRegByName (StringRef Name, Register Reg) |
bool | hasOneDef (Register RegNo) const |
Return true if there is exactly one operand defining the specified register. | |
MachineOperand * | getOneDef (Register Reg) const |
Returns the defining operand if there is exactly one operand defining the specified register, otherwise nullptr. | |
use_iterator | use_begin (Register RegNo) const |
iterator_range< use_iterator > | use_operands (Register Reg) const |
use_instr_iterator | use_instr_begin (Register RegNo) const |
iterator_range< use_instr_iterator > | use_instructions (Register Reg) const |
use_bundle_iterator | use_bundle_begin (Register RegNo) const |
iterator_range< use_bundle_iterator > | use_bundles (Register Reg) const |
bool | use_empty (Register RegNo) const |
use_empty - Return true if there are no instructions using the specified register. | |
bool | hasOneUse (Register RegNo) const |
hasOneUse - Return true if there is exactly one instruction using the specified register. | |
use_nodbg_iterator | use_nodbg_begin (Register RegNo) const |
iterator_range< use_nodbg_iterator > | use_nodbg_operands (Register Reg) const |
use_instr_nodbg_iterator | use_instr_nodbg_begin (Register RegNo) const |
iterator_range< use_instr_nodbg_iterator > | use_nodbg_instructions (Register Reg) const |
use_bundle_nodbg_iterator | use_bundle_nodbg_begin (Register RegNo) const |
iterator_range< use_bundle_nodbg_iterator > | use_nodbg_bundles (Register Reg) const |
bool | use_nodbg_empty (Register RegNo) const |
use_nodbg_empty - Return true if there are no non-Debug instructions using the specified register. | |
bool | hasOneNonDBGUse (Register RegNo) const |
hasOneNonDBGUse - Return true if there is exactly one non-Debug use of the specified register. | |
bool | hasOneNonDBGUser (Register RegNo) const |
hasOneNonDBGUse - Return true if there is exactly one non-Debug instruction using the specified register. | |
bool | hasAtMostUserInstrs (Register Reg, unsigned MaxUsers) const |
hasAtMostUses - Return true if the given register has at most MaxUsers non-debug user instructions. | |
void | replaceRegWith (Register FromReg, Register ToReg) |
replaceRegWith - Replace all instances of FromReg with ToReg in the machine function. | |
MachineInstr * | getVRegDef (Register Reg) const |
getVRegDef - Return the machine instr that defines the specified virtual register or null if none is found. | |
MachineInstr * | getUniqueVRegDef (Register Reg) const |
getUniqueVRegDef - Return the unique machine instr that defines the specified virtual register or null if none is found. | |
void | clearKillFlags (Register Reg) const |
clearKillFlags - Iterate over all the uses of the given register and clear the kill flag from the MachineOperand. | |
void | dumpUses (Register RegNo) const |
bool | isConstantPhysReg (MCRegister PhysReg) const |
Returns true if PhysReg is unallocatable and constant throughout the function. | |
PSetIterator | getPressureSets (Register RegUnit) const |
Get an iterator over the pressure sets affected by the given physical or virtual register. | |
const TargetRegisterClass * | getRegClass (Register Reg) const |
Return the register class of the specified virtual register. | |
const TargetRegisterClass * | getRegClassOrNull (Register Reg) const |
Return the register class of Reg , or null if Reg has not been assigned a register class yet. | |
const RegisterBank * | getRegBankOrNull (Register Reg) const |
Return the register bank of Reg , or null if Reg has not been assigned a register bank or has been assigned a register class. | |
const RegClassOrRegBank & | getRegClassOrRegBank (Register Reg) const |
Return the register bank or register class of Reg . | |
void | setRegClass (Register Reg, const TargetRegisterClass *RC) |
setRegClass - Set the register class of the specified virtual register. | |
void | setRegBank (Register Reg, const RegisterBank &RegBank) |
Set the register bank to RegBank for Reg . | |
void | setRegClassOrRegBank (Register Reg, const RegClassOrRegBank &RCOrRB) |
const TargetRegisterClass * | constrainRegClass (Register Reg, const TargetRegisterClass *RC, unsigned MinNumRegs=0) |
constrainRegClass - Constrain the register class of the specified virtual register to be a common subclass of RC and the current register class, but only if the new class has at least MinNumRegs registers. | |
bool | constrainRegAttrs (Register Reg, Register ConstrainingReg, unsigned MinNumRegs=0) |
Constrain the register class or the register bank of the virtual register Reg (and low-level type) to be a common subclass or a common bank of both registers provided respectively (and a common low-level type). | |
bool | recomputeRegClass (Register Reg) |
recomputeRegClass - Try to find a legal super-class of Reg's register class that still satisfies the constraints from the instructions using Reg. | |
Register | createVirtualRegister (const TargetRegisterClass *RegClass, StringRef Name="") |
createVirtualRegister - Create and return a new virtual register in the function with the specified register class. | |
Register | cloneVirtualRegister (Register VReg, StringRef Name="") |
Create and return a new virtual register in the function with the same attributes as the given register. | |
LLT | getType (Register Reg) const |
Get the low-level type of Reg or LLT{} if Reg is not a generic (target independent) virtual register. | |
void | setType (Register VReg, LLT Ty) |
Set the low-level type of VReg to Ty . | |
Register | createGenericVirtualRegister (LLT Ty, StringRef Name="") |
Create and return a new generic virtual register with low-level type Ty . | |
void | clearVirtRegTypes () |
Remove all types associated to virtual registers (after instruction selection and constraining of all generic virtual registers). | |
Register | createIncompleteVirtualRegister (StringRef Name="") |
Creates a new virtual register that has no register class, register bank or size assigned yet. | |
unsigned | getNumVirtRegs () const |
getNumVirtRegs - Return the number of virtual registers created. | |
void | clearVirtRegs () |
clearVirtRegs - Remove all virtual registers (after physreg assignment). | |
void | setRegAllocationHint (Register VReg, unsigned Type, Register PrefReg) |
setRegAllocationHint - Specify a register allocation hint for the specified virtual register. | |
void | addRegAllocationHint (Register VReg, Register PrefReg) |
addRegAllocationHint - Add a register allocation hint to the hints vector for VReg. | |
void | setSimpleHint (Register VReg, Register PrefReg) |
Specify the preferred (target independent) register allocation hint for the specified virtual register. | |
void | clearSimpleHint (Register VReg) |
std::pair< unsigned, Register > | getRegAllocationHint (Register VReg) const |
getRegAllocationHint - Return the register allocation hint for the specified virtual register. | |
Register | getSimpleHint (Register VReg) const |
getSimpleHint - same as getRegAllocationHint except it will only return a target independent hint. | |
const std::pair< unsigned, SmallVector< Register, 4 > > & | getRegAllocationHints (Register VReg) const |
getRegAllocationHints - Return a reference to the vector of all register allocation hints for VReg. | |
void | markUsesInDebugValueAsUndef (Register Reg) const |
markUsesInDebugValueAsUndef - Mark every DBG_VALUE referencing the specified register as undefined which causes the DBG_VALUE to be deleted during LiveDebugVariables analysis. | |
void | updateDbgUsersToReg (MCRegister OldReg, MCRegister NewReg, ArrayRef< MachineInstr * > Users) const |
updateDbgUsersToReg - Update a collection of debug instructions to refer to the designated register. | |
bool | isPhysRegModified (MCRegister PhysReg, bool SkipNoReturnDef=false) const |
Return true if the specified register is modified in this function. | |
bool | isPhysRegUsed (MCRegister PhysReg, bool SkipRegMaskTest=false) const |
Return true if the specified register is modified or read in this function. | |
void | addPhysRegsUsedFromRegMask (const uint32_t *RegMask) |
addPhysRegsUsedFromRegMask - Mark any registers not in RegMask as used. | |
const BitVector & | getUsedPhysRegsMask () const |
void | freezeReservedRegs (const MachineFunction &) |
freezeReservedRegs - Called by the register allocator to freeze the set of reserved registers before allocation begins. | |
void | reserveReg (MCRegister PhysReg, const TargetRegisterInfo *TRI) |
reserveReg – Mark a register as reserved so checks like isAllocatable will not suggest using it. | |
bool | reservedRegsFrozen () const |
reservedRegsFrozen - Returns true after freezeReservedRegs() was called to ensure the set of reserved registers stays constant. | |
bool | canReserveReg (MCRegister PhysReg) const |
canReserveReg - Returns true if PhysReg can be used as a reserved register. | |
const BitVector & | getReservedRegs () const |
getReservedRegs - Returns a reference to the frozen set of reserved registers. | |
bool | isReserved (MCRegister PhysReg) const |
isReserved - Returns true when PhysReg is a reserved register. | |
bool | isReservedRegUnit (unsigned Unit) const |
Returns true when the given register unit is considered reserved. | |
bool | isAllocatable (MCRegister PhysReg) const |
isAllocatable - Returns true when PhysReg belongs to an allocatable register class and it hasn't been reserved. | |
void | addLiveIn (MCRegister Reg, Register vreg=Register()) |
addLiveIn - Add the specified register as a live-in. | |
livein_iterator | livein_begin () const |
livein_iterator | livein_end () const |
bool | livein_empty () const |
ArrayRef< std::pair< MCRegister, Register > > | liveins () const |
bool | isLiveIn (Register Reg) const |
MCRegister | getLiveInPhysReg (Register VReg) const |
getLiveInPhysReg - If VReg is a live-in virtual register, return the corresponding live-in physical register. | |
Register | getLiveInVirtReg (MCRegister PReg) const |
getLiveInVirtReg - If PReg is a live-in physical register, return the corresponding live-in virtual register. | |
void | EmitLiveInCopies (MachineBasicBlock *EntryMBB, const TargetRegisterInfo &TRI, const TargetInstrInfo &TII) |
EmitLiveInCopies - Emit copies to initialize livein virtual registers into the given entry block. | |
LaneBitmask | getMaxLaneMaskForVReg (Register Reg) const |
Returns a mask covering all bits that can appear in lane masks of subregisters of the virtual register Reg . | |
Static Public Member Functions | |
static reg_iterator | reg_end () |
static reg_instr_iterator | reg_instr_end () |
static reg_bundle_iterator | reg_bundle_end () |
static reg_nodbg_iterator | reg_nodbg_end () |
static reg_instr_nodbg_iterator | reg_instr_nodbg_end () |
static reg_bundle_nodbg_iterator | reg_bundle_nodbg_end () |
static def_iterator | def_end () |
static def_instr_iterator | def_instr_end () |
static def_bundle_iterator | def_bundle_end () |
static use_iterator | use_end () |
static use_instr_iterator | use_instr_end () |
static use_bundle_iterator | use_bundle_end () |
static use_nodbg_iterator | use_nodbg_end () |
static use_instr_nodbg_iterator | use_instr_nodbg_end () |
static use_bundle_nodbg_iterator | use_bundle_nodbg_end () |
Friends | |
template<bool , bool , bool , bool , bool , bool > | |
class | defusechain_iterator |
template<bool , bool , bool , bool , bool , bool > | |
class | defusechain_instr_iterator |
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
Definition at line 51 of file MachineRegisterInfo.h.
using llvm::MachineRegisterInfo::def_bundle_iterator = defusechain_instr_iterator<false, true, false, false, false, true> |
def_bundle_iterator/def_bundle_begin/def_bundle_end - Walk all defs of the specified register, stepping by bundle.
Definition at line 435 of file MachineRegisterInfo.h.
using llvm::MachineRegisterInfo::def_instr_iterator = defusechain_instr_iterator<false, true, false, false, true, false> |
def_instr_iterator/def_instr_begin/def_instr_end - Walk all defs of the specified register, stepping by MachineInst.
Definition at line 419 of file MachineRegisterInfo.h.
using llvm::MachineRegisterInfo::def_iterator = defusechain_iterator<false, true, false, true, false, false> |
def_iterator/def_begin/def_end - Walk all defs of the specified register.
Definition at line 406 of file MachineRegisterInfo.h.
using llvm::MachineRegisterInfo::livein_iterator = std::vector<std::pair<MCRegister,Register> >::const_iterator |
Definition at line 991 of file MachineRegisterInfo.h.
using llvm::MachineRegisterInfo::reg_bundle_iterator = defusechain_instr_iterator<true, true, false, false, false, true> |
reg_bundle_iterator/reg_bundle_begin/reg_bundle_end - Walk all defs and uses of the specified register, stepping by bundle.
Definition at line 332 of file MachineRegisterInfo.h.
using llvm::MachineRegisterInfo::reg_bundle_nodbg_iterator = defusechain_instr_iterator<true, true, true, false, false, true> |
reg_bundle_nodbg_iterator/reg_bundle_nodbg_begin/reg_bundle_nodbg_end - Walk all defs and uses of the specified register, stepping by bundle, skipping those marked as Debug.
Definition at line 385 of file MachineRegisterInfo.h.
using llvm::MachineRegisterInfo::reg_instr_iterator = defusechain_instr_iterator<true, true, false, false, true, false> |
reg_instr_iterator/reg_instr_begin/reg_instr_end - Walk all defs and uses of the specified register, stepping by MachineInstr.
Definition at line 316 of file MachineRegisterInfo.h.
using llvm::MachineRegisterInfo::reg_instr_nodbg_iterator = defusechain_instr_iterator<true, true, true, false, true, false> |
reg_instr_nodbg_iterator/reg_instr_nodbg_begin/reg_instr_nodbg_end - Walk all defs and uses of the specified register, stepping by MachineInstr, skipping those marked as Debug.
Definition at line 368 of file MachineRegisterInfo.h.
using llvm::MachineRegisterInfo::reg_iterator = defusechain_iterator<true, true, false, true, false, false> |
reg_iterator/reg_begin/reg_end - Walk all defs and uses of the specified register.
Definition at line 303 of file MachineRegisterInfo.h.
using llvm::MachineRegisterInfo::reg_nodbg_iterator = defusechain_iterator<true, true, true, true, false, false> |
reg_nodbg_iterator/reg_nodbg_begin/reg_nodbg_end - Walk all defs and uses of the specified register, skipping those marked as Debug.
Definition at line 351 of file MachineRegisterInfo.h.
using llvm::MachineRegisterInfo::use_bundle_iterator = defusechain_instr_iterator<true, false, false, false, false, true> |
use_bundle_iterator/use_bundle_begin/use_bundle_end - Walk all uses of the specified register, stepping by bundle.
Definition at line 515 of file MachineRegisterInfo.h.
using llvm::MachineRegisterInfo::use_bundle_nodbg_iterator = defusechain_instr_iterator<true, false, true, false, false, true> |
use_bundle_nodbg_iterator/use_bundle_nodbg_begin/use_bundle_nodbg_end - Walk all uses of the specified register, stepping by bundle, skipping those marked as Debug.
Definition at line 574 of file MachineRegisterInfo.h.
using llvm::MachineRegisterInfo::use_instr_iterator = defusechain_instr_iterator<true, false, false, false, true, false> |
use_instr_iterator/use_instr_begin/use_instr_end - Walk all uses of the specified register, stepping by MachineInstr.
Definition at line 499 of file MachineRegisterInfo.h.
using llvm::MachineRegisterInfo::use_instr_nodbg_iterator = defusechain_instr_iterator<true, false, true, false, true, false> |
use_instr_nodbg_iterator/use_instr_nodbg_begin/use_instr_nodbg_end - Walk all uses of the specified register, stepping by MachineInstr, skipping those marked as Debug.
Definition at line 557 of file MachineRegisterInfo.h.
using llvm::MachineRegisterInfo::use_iterator = defusechain_iterator<true, false, false, true, false, false> |
use_iterator/use_begin/use_end - Walk all uses of the specified register.
Definition at line 486 of file MachineRegisterInfo.h.
using llvm::MachineRegisterInfo::use_nodbg_iterator = defusechain_iterator<true, false, true, true, false, false> |
use_nodbg_iterator/use_nodbg_begin/use_nodbg_end - Walk all uses of the specified register, skipping those marked as Debug.
Definition at line 540 of file MachineRegisterInfo.h.
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explicit |
Definition at line 43 of file MachineRegisterInfo.cpp.
References llvm::MCRegisterInfo::getNumRegs(), getTargetRegisterInfo(), and llvm::BitVector::resize().
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delete |
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inline |
Definition at line 169 of file MachineRegisterInfo.h.
References assert(), llvm::SmallPtrSetImpl< PtrType >::count(), and llvm::SmallPtrSetImpl< PtrType >::insert().
Referenced by llvm::GCNTargetMachine::registerMachineRegisterInfoCallback().
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inline |
addLiveIn - Add the specified register as a live-in.
Note that it is an error to add the same register to the same set more than once.
Definition at line 985 of file MachineRegisterInfo.h.
References Reg.
Referenced by addLiveIn(), buildGitPtr(), llvm::MipsFunctionInfo::initGlobalBaseReg(), llvm::LoongArchTargetLowering::LowerFormalArguments(), llvm::RISCVTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), and llvm::MIRParserImpl::parseRegisterInfo().
addPhysRegsUsedFromRegMask - Mark any registers not in RegMask as used.
This corresponds to the bit mask attached to register mask operands.
Definition at line 895 of file MachineRegisterInfo.h.
References RegMask.
addRegAllocationHint - Add a register allocation hint to the hints vector for VReg.
Definition at line 803 of file MachineRegisterInfo.h.
References assert(), and llvm::Register::isVirtual().
void MachineRegisterInfo::addRegOperandToUseList | ( | MachineOperand * | MO | ) |
Add MO to the linked list of operands for its register.
Definition at line 265 of file MachineRegisterInfo.cpp.
References assert(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isDef(), and llvm::Last.
Referenced by llvm::MachineOperand::ChangeToRegister().
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inline |
canReserveReg - Returns true if PhysReg can be used as a reserved register.
Any register can be reserved before freezeReservedRegs() is called.
Definition at line 938 of file MachineRegisterInfo.h.
References reservedRegsFrozen().
Referenced by llvm::MipsRegisterInfo::canRealignStack().
void MachineRegisterInfo::clearKillFlags | ( | Register | Reg | ) | const |
clearKillFlags - Iterate over all the uses of the given register and clear the kill flag from the MachineOperand.
This function is used by optimization passes which extend register lifetimes and need only preserve conservative kill flag information.
Definition at line 435 of file MachineRegisterInfo.cpp.
References use_operands().
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inline |
Definition at line 814 of file MachineRegisterInfo.h.
References assert(), and llvm::IndexedMap< T, ToIndexT >::clear().
void MachineRegisterInfo::clearVirtRegs | ( | ) |
clearVirtRegs - Remove all virtual registers (after physreg assignment).
Definition at line 198 of file MachineRegisterInfo.cpp.
References llvm::errs(), getNumVirtRegs(), getTargetRegisterInfo(), I, llvm::Register::index2VirtReg(), MI, llvm::printReg(), reg_instructions(), and verifyUseList().
void MachineRegisterInfo::clearVirtRegTypes | ( | ) |
Remove all types associated to virtual registers (after instruction selection and constraining of all generic virtual registers).
Definition at line 195 of file MachineRegisterInfo.cpp.
References llvm::IndexedMap< T, ToIndexT >::clear().
Create and return a new virtual register in the function with the same attributes as the given register.
Definition at line 170 of file MachineRegisterInfo.cpp.
References createIncompleteVirtualRegister(), getType(), Name, noteCloneVirtualRegister(), and setType().
Referenced by llvm::CombinerHelper::applyCombineConcatVectors(), llvm::CombinerHelper::applyCombineExtendingLoads(), llvm::CombinerHelper::applyCombineShuffleVector(), llvm::LiveRangeEdit::createFrom(), and llvm::CombinerHelper::matchLoadOrCombine().
bool MachineRegisterInfo::constrainRegAttrs | ( | Register | Reg, |
Register | ConstrainingReg, | ||
unsigned | MinNumRegs = 0 |
||
) |
Constrain the register class or the register bank of the virtual register Reg
(and low-level type) to be a common subclass or a common bank of both registers provided respectively (and a common low-level type).
Do nothing if any of the attributes (classes, banks, or low-level types) of the registers are deemed incompatible, or if the resulting register will have a class smaller than before and of size less than MinNumRegs
. Return true if such register attributes exist, false otherwise.
Definition at line 91 of file MachineRegisterInfo.cpp.
References constrainRegClass(), getRegClassOrRegBank(), getType(), llvm::LLT::isValid(), setRegClassOrRegBank(), and setType().
Referenced by llvm::CombinerHelper::replaceRegWith().
const TargetRegisterClass * MachineRegisterInfo::constrainRegClass | ( | Register | Reg, |
const TargetRegisterClass * | RC, | ||
unsigned | MinNumRegs = 0 |
||
) |
constrainRegClass - Constrain the register class of the specified virtual register to be a common subclass of RC and the current register class, but only if the new class has at least MinNumRegs registers.
Return the new register class, or NULL if no such class exists. This should only be used when the constraint is known to be trivial, like GR32 -> GR32_NOSP. Beware of increasing register pressure.
Definition at line 83 of file MachineRegisterInfo.cpp.
References getRegClass().
Referenced by llvm::X86InstrInfo::classifyLEAReg(), llvm::FastISel::constrainOperandRegClass(), constrainRegAttrs(), llvm::X86InstrInfo::convertToThreeAddress(), llvm::FastISel::fastEmitInst_extractsubreg(), llvm::AArch64InstrInfo::foldMemoryOperandImpl(), llvm::AArch64InstrInfo::loadRegFromStackSlot(), llvm::AArch64InstrInfo::storeRegToStackSlot(), and llvm::TailDuplicator::tailDuplicateAndUpdate().
Create and return a new generic virtual register with low-level type Ty
.
Definition at line 185 of file MachineRegisterInfo.cpp.
References createIncompleteVirtualRegister(), Name, noteNewVirtualRegister(), and setType().
Referenced by AMDGPUCombinerHelper::applyFoldableFneg(), llvm::LegalizerHelper::bitcastDst(), llvm::buildBoolRegister(), llvm::MachineIRBuilder::buildMaskLowPtrBits(), llvm::LegalizerHelper::fewerElementsVectorPhi(), llvm::generateImageSizeQueryInst(), llvm::SPIRVGlobalRegistry::getOrCreateConstNullPtr(), llvm::SPIRVGlobalRegistry::getOrCreateUndef(), llvm::AArch64LegalizerInfo::legalizeIntrinsic(), llvm::LegalizerHelper::lower(), llvm::MipsCallLowering::lowerCall(), llvm::LegalizerHelper::lowerLoad(), llvm::LegalizerHelper::lowerMergeValues(), llvm::CombinerHelper::matchCombineFAddFMAFMulToFMadOrFMA(), llvm::CombinerHelper::matchCombineFSubFpExtFNegFMulToFMadOrFMA(), llvm::CombinerHelper::matchHoistLogicOpWithSameOpcodeHands(), llvm::MachineIRBuilder::materializePtrAdd(), llvm::LegalizerHelper::moreElementsVectorDst(), llvm::LegalizerHelper::narrowScalar(), llvm::LegalizerHelper::narrowScalarAddSub(), llvm::LegalizerHelper::narrowScalarDst(), llvm::LegalizerHelper::narrowScalarExtract(), llvm::LegalizerHelper::narrowScalarInsert(), llvm::LegalizerHelper::narrowScalarShift(), llvm::LegalizerHelper::narrowScalarShiftByConstant(), llvm::LegalizerHelper::reduceLoadStoreWidth(), llvm::LegalizerHelper::widenScalar(), and llvm::LegalizerHelper::widenScalarDst().
Creates a new virtual register that has no register class, register bank or size assigned yet.
This is only allowed to be used temporarily while constructing machine instructions. Most operations are undefined on an incomplete register until one of setRegClass(), setRegBank() or setSize() has been called on it.
Definition at line 145 of file MachineRegisterInfo.cpp.
References getNumVirtRegs(), llvm::Register::index2VirtReg(), insertVRegByName(), and Name.
Referenced by cloneVirtualRegister(), createGenericVirtualRegister(), createVirtualRegister(), and llvm::PerFunctionMIParsingState::getVRegInfoNamed().
Register MachineRegisterInfo::createVirtualRegister | ( | const TargetRegisterClass * | RegClass, |
StringRef | Name = "" |
||
) |
createVirtualRegister - Create and return a new virtual register in the function with the specified register class.
Definition at line 157 of file MachineRegisterInfo.cpp.
References assert(), createIncompleteVirtualRegister(), llvm::TargetRegisterClass::isAllocatable(), Name, and noteNewVirtualRegister().
Referenced by addLiveIn(), llvm::buildBuiltinVariableLoad(), llvm::SPIRVGlobalRegistry::buildConstantSampler(), llvm::X86InstrInfo::classifyLEAReg(), llvm::SwiftErrorValueTracking::createEntriesInEntryBlock(), llvm::PeelingModuloScheduleExpander::CreateLCSSAExitingBlock(), llvm::FunctionLoweringInfo::CreateReg(), llvm::FastISel::createResultReg(), llvm::AArch64FrameLowering::eliminateCallFramePseudoInstr(), llvm::AArch64RegisterInfo::eliminateFrameIndex(), llvm::ARMBaseRegisterInfo::eliminateFrameIndex(), llvm::ThumbRegisterInfo::eliminateFrameIndex(), llvm::PPCRegisterInfo::eliminateFrameIndex(), llvm::SystemZRegisterInfo::eliminateFrameIndex(), llvm::PPCTargetLowering::EmitAtomicBinary(), emitFrameOffsetAdj(), llvm::PPCTargetLowering::EmitInstrWithCustomInserter(), llvm::X86TargetLowering::EmitInstrWithCustomInserter(), llvm::PPCTargetLowering::EmitPartwordAtomicBinary(), llvm::CSKYFrameLowering::emitPrologue(), llvm::MipsSEFrameLowering::emitPrologue(), llvm::RISCVFrameLowering::emitPrologue(), llvm::MSP430TargetLowering::EmitShiftInstr(), emitThumbRegPlusImmInReg(), llvm::MipsFunctionInfo::getGlobalBaseReg(), llvm::M68kInstrInfo::getGlobalBaseReg(), llvm::SparcInstrInfo::getGlobalBaseReg(), llvm::X86InstrInfo::getGlobalBaseReg(), llvm::SwiftErrorValueTracking::getOrCreateVReg(), llvm::SwiftErrorValueTracking::getOrCreateVRegDefAt(), llvm::MipsFunctionInfo::initGlobalBaseReg(), llvm::MipsSEInstrInfo::loadImmediate(), llvm::AArch64InstrInfo::loadRegFromStackSlot(), llvm::X86InstrInfo::loadStoreTileReg(), llvm::SPIRV::lowerBuiltin(), llvm::SPIRVCallLowering::lowerCall(), LowerCallResults(), llvm::PPCRegisterInfo::lowerCRBitRestore(), llvm::PPCRegisterInfo::lowerCRBitSpilling(), llvm::PPCRegisterInfo::lowerCRRestore(), llvm::PPCRegisterInfo::lowerCRSpilling(), llvm::PPCRegisterInfo::lowerDynamicAlloc(), llvm::LoongArchTargetLowering::LowerFormalArguments(), llvm::RISCVTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::PPCRegisterInfo::lowerWACCRestore(), llvm::PPCRegisterInfo::lowerWACCSpilling(), llvm::RISCVRegisterInfo::materializeFrameBaseRegister(), llvm::PeelingModuloScheduleExpander::moveStageBetweenBlocks(), llvm::PPCRegisterInfo::prepareDynamicAlloca(), llvm::SwiftErrorValueTracking::propagateVRegs(), llvm::ThumbRegisterInfo::rewriteFrameIndex(), and llvm::AArch64InstrInfo::storeRegToStackSlot().
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Definition at line 408 of file MachineRegisterInfo.h.
Referenced by llvm::DeadLaneDetector::computeSubRegisterLaneBitInfo(), def_empty(), def_operands(), getOneDef(), isPhysRegModified(), and MustSaveLR().
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Definition at line 437 of file MachineRegisterInfo.h.
Referenced by def_bundles().
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Definition at line 440 of file MachineRegisterInfo.h.
Referenced by def_bundles().
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Definition at line 444 of file MachineRegisterInfo.h.
References def_bundle_begin(), def_bundle_end(), llvm::make_range(), and Reg.
def_empty - Return true if there are no instructions defining the specified register (it may be live-in).
Definition at line 450 of file MachineRegisterInfo.h.
References def_begin(), and def_end().
Referenced by getUniqueVRegDef(), and isConstantPhysReg().
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Definition at line 411 of file MachineRegisterInfo.h.
Referenced by def_empty(), def_operands(), getOneDef(), isPhysRegModified(), and MustSaveLR().
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Definition at line 421 of file MachineRegisterInfo.h.
Referenced by def_instructions(), llvm::InstrEmitter::EmitDbgInstrRef(), llvm::MachineFunction::finalizeDebugInstrRefs(), getUniqueVRegDef(), and getVRegDef().
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Definition at line 424 of file MachineRegisterInfo.h.
Referenced by def_instructions(), getUniqueVRegDef(), and getVRegDef().
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Definition at line 429 of file MachineRegisterInfo.h.
References def_instr_begin(), def_instr_end(), llvm::make_range(), and Reg.
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Definition at line 413 of file MachineRegisterInfo.h.
References def_begin(), def_end(), llvm::make_range(), and Reg.
Referenced by hasOneDef(), and hasTiedDef().
void MachineRegisterInfo::disableCalleeSavedRegister | ( | MCRegister | Reg | ) |
Disables the register from the list of CSRs.
I.e. the register will not appear as part of the CSR mask.
Definition at line 602 of file MachineRegisterInfo.cpp.
References assert(), llvm::erase(), getTargetRegisterInfo(), I, llvm::MCRegAliasIterator::isValid(), and TRI.
LLVM_DUMP_METHOD void MachineRegisterInfo::dumpUses | ( | Register | RegNo | ) | const |
Definition at line 505 of file MachineRegisterInfo.cpp.
References I, and use_instructions().
void MachineRegisterInfo::EmitLiveInCopies | ( | MachineBasicBlock * | EntryMBB, |
const TargetRegisterInfo & | TRI, | ||
const TargetInstrInfo & | TII | ||
) |
EmitLiveInCopies - Emit copies to initialize livein virtual registers into the given entry block.
Definition at line 468 of file MachineRegisterInfo.cpp.
References llvm::MachineBasicBlock::addLiveIn(), llvm::MachineInstrBuilder::addReg(), llvm::MachineBasicBlock::begin(), llvm::BuildMI(), TII, and use_nodbg_empty().
Referenced by llvm::SelectionDAGISel::runOnMachineFunction().
void MachineRegisterInfo::freezeReservedRegs | ( | const MachineFunction & | MF | ) |
freezeReservedRegs - Called by the register allocator to freeze the set of reserved registers before allocation begins.
Definition at line 511 of file MachineRegisterInfo.cpp.
References assert(), llvm::TargetRegisterInfo::getReservedRegs(), getTargetRegisterInfo(), and llvm::BitVector::size().
Referenced by createFrameHelperMachineFunction(), llvm::TargetLoweringBase::finalizeLowering(), and llvm::RegAllocBase::init().
Returns list of callee saved registers.
The function returns the updated CSR list (after taking into account registers that are disabled from the CSR list).
Definition at line 625 of file MachineRegisterInfo.cpp.
References llvm::TargetRegisterInfo::getCalleeSavedRegs(), and getTargetRegisterInfo().
Referenced by llvm::MIRPrinter::convert(), llvm::AArch64FrameLowering::determineCalleeSaves(), llvm::CSKYFrameLowering::determineCalleeSaves(), llvm::RISCVFrameLowering::determineCalleeSaves(), llvm::TargetFrameLowering::determineCalleeSaves(), llvm::SIFrameLowering::determinePrologEpilogSGPRSaves(), llvm::VETargetLowering::emitSjLjDispatchBlock(), getLiveRegsForEntryMBB(), isACalleeSavedRegister(), llvm::X86MachineFunctionInfo::setRestoreBasePointer(), llvm::SIMachineFunctionInfo::splitWWMSpillRegisters(), llvm::AggressiveAntiDepBreaker::StartBlock(), and llvm::CriticalAntiDepBreaker::StartBlock().
MCRegister MachineRegisterInfo::getLiveInPhysReg | ( | Register | VReg | ) | const |
getLiveInPhysReg - If VReg is a live-in virtual register, return the corresponding live-in physical register.
Definition at line 449 of file MachineRegisterInfo.cpp.
References liveins().
Register MachineRegisterInfo::getLiveInVirtReg | ( | MCRegister | PReg | ) | const |
getLiveInVirtReg - If PReg is a live-in physical register, return the corresponding live-in virtual register.
getLiveInVirtReg - If PReg is a live-in physical register, return the corresponding live-in physical register.
Definition at line 458 of file MachineRegisterInfo.cpp.
References liveins().
LaneBitmask MachineRegisterInfo::getMaxLaneMaskForVReg | ( | Register | Reg | ) | const |
Returns a mask covering all bits that can appear in lane masks of subregisters of the virtual register Reg
.
Definition at line 497 of file MachineRegisterInfo.cpp.
References assert(), llvm::TargetRegisterClass::getLaneMask(), and getRegClass().
Referenced by llvm::LiveIntervals::addKillFlags(), llvm::LiveRangeEdit::allUsesAvailableAt(), getInstReadLaneMask(), and llvm::DeadLaneDetector::transferDefinedLanes().
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getNumVirtRegs - Return the number of virtual registers created.
Definition at line 786 of file MachineRegisterInfo.h.
Referenced by llvm::LiveIntervals::addKillFlags(), llvm::LiveVariables::addNewBlock(), llvm::ScheduleDAGInstrs::buildSchedGraph(), clearVirtRegs(), llvm::DeadLaneDetector::computeSubRegisterLaneBitInfo(), llvm::MIRPrinter::convert(), createIncompleteVirtualRegister(), llvm::VirtRegMap::grow(), llvm::RegPressureTracker::init(), llvm::ScheduleDAGMILive::initRegPressure(), llvm::SPIRV::lowerBuiltinType(), llvm::LiveIntervals::print(), llvm::VirtRegMap::print(), llvm::LiveIntervals::runOnMachineFunction(), and verifyUseLists().
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Returns the defining operand if there is exactly one operand defining the specified register, otherwise nullptr.
Definition at line 474 of file MachineRegisterInfo.h.
References def_begin(), def_end(), and Reg.
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Get an iterator over the pressure sets affected by the given physical or virtual register.
If RegUnit is physical, it must be a register unit (from MCRegUnitIterator).
Definition at line 1269 of file MachineRegisterInfo.h.
Referenced by llvm::SIScheduleDAGMI::fillVgprSgprCost(), and llvm::RegPressureTracker::increaseRegPressure().
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getRegAllocationHint - Return the register allocation hint for the specified virtual register.
If there are many hints, this returns the one with the greatest weight.
Definition at line 823 of file MachineRegisterInfo.h.
References assert(), llvm::Register::id(), llvm::Register::isVirtual(), Register, and llvm::IndexedMap< T, ToIndexT >::size().
Referenced by getSimpleHint(), and llvm::VirtRegMap::hasKnownPreference().
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getRegAllocationHints - Return a reference to the vector of all register allocation hints for VReg.
Definition at line 841 of file MachineRegisterInfo.h.
References assert(), and llvm::Register::isVirtual().
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Return the register bank of Reg
, or null if Reg has not been assigned a register bank or has been assigned a register class.
Definition at line 689 of file MachineRegisterInfo.h.
References Reg.
Referenced by llvm::printRegClassOrBank().
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Return the register class of the specified virtual register.
This shouldn't be used directly unless Reg
has a register class.
Definition at line 663 of file MachineRegisterInfo.h.
Referenced by llvm::RegAllocBase::allocatePhysRegs(), llvm::VirtRegMap::assignVirt2StackSlot(), llvm::LiveRangeEdit::calculateRegClassAndHint(), constrainRegClass(), llvm::AllocationOrder::create(), llvm::PeelingModuloScheduleExpander::CreateLCSSAExitingBlock(), llvm::PPCTargetLowering::EmitInstrWithCustomInserter(), llvm::RegAllocBase::enqueue(), llvm::HexagonEvaluator::evaluate(), llvm::FastISel::fastEmitInst_extractsubreg(), llvm::SystemZInstrInfo::foldMemoryOperandImpl(), foldPatchpoint(), llvm::BitTracker::MachineEvaluator::getCell(), GetCostForDef(), llvm::ScheduleDAGInstrs::getLaneMaskForMO(), getMaxLaneMaskForVReg(), llvm::RegAllocEvictionAdvisor::getOrderLimit(), llvm::BitTracker::MachineEvaluator::getRegBitWidth(), getRegTy(), llvm::WebAssemblyAsmPrinter::getRegType(), llvm::NVPTXAsmPrinter::getVirtualRegisterName(), llvm::MachineSSAUpdater::Initialize(), isNonFoldablePartialRegisterLoad(), llvm::HexagonEvaluator::mask(), llvm::PeelingModuloScheduleExpander::moveStageBetweenBlocks(), llvm::VirtRegMap::print(), llvm::printRegClassOrBank(), recomputeRegClass(), llvm::PeelingModuloScheduleExpander::rewriteUsesOf(), llvm::TailDuplicator::tailDuplicateAndUpdate(), and llvm::DeadLaneDetector::transferUsedLanes().
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Return the register class of Reg
, or null if Reg has not been assigned a register class yet.
Definition at line 680 of file MachineRegisterInfo.h.
References Reg.
Referenced by getRegClass(), llvm::SPIRV::lowerBuiltin(), llvm::printRegClassOrBank(), and shouldTrackSubRegLiveness().
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Return the register bank or register class of Reg
.
Reg
may not have either. Definition at line 697 of file MachineRegisterInfo.h.
References Reg.
Referenced by llvm::GISelInstProfileBuilder::addNodeIDReg(), llvm::CombinerHelper::applyCombineUnmergeMergeToPlainValues(), and constrainRegAttrs().
getReservedRegs - Returns a reference to the frozen set of reserved registers.
This method should always be preferred to calling TRI::getReservedRegs() when possible.
Definition at line 945 of file MachineRegisterInfo.h.
References assert(), and reservedRegsFrozen().
Referenced by isReserved(), and llvm::RegisterClassInfo::runOnMachineFunction().
getSimpleHint - same as getRegAllocationHint except it will only return a target independent hint.
Definition at line 832 of file MachineRegisterInfo.h.
References assert(), getRegAllocationHint(), llvm::Register::isVirtual(), and Register.
Referenced by llvm::MIRPrinter::convert(), and llvm::VirtRegMap::hasPreferredPhys().
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Definition at line 157 of file MachineRegisterInfo.h.
References llvm::TargetSubtargetInfo::getRegisterInfo(), and llvm::MachineFunction::getSubtarget().
Referenced by llvm::LiveRangeEdit::allUsesAvailableAt(), clearVirtRegs(), llvm::PeelingModuloScheduleExpander::CreateLCSSAExitingBlock(), disableCalleeSavedRegister(), llvm::PeelingModuloScheduleExpander::filterInstructions(), freezeReservedRegs(), getCalleeSavedRegs(), isAllocatable(), isArgumentRegister(), isConstantPhysReg(), isFixedRegister(), isGeneralPurposeRegister(), isPhysRegModified(), isPhysRegUsed(), isReservedRegUnit(), llvm::GCNUpwardRPTracker::isValid(), MachineRegisterInfo(), recomputeRegClass(), replaceRegWith(), llvm::PeelingModuloScheduleExpander::rewriteUsesOf(), llvm::tryFoldSPUpdateIntoPushPop(), updateDbgUsersToReg(), verifyUseList(), and verifyUseLists().
Get the low-level type of Reg
or LLT{} if Reg is not a generic (target independent) virtual register.
Definition at line 761 of file MachineRegisterInfo.h.
References Reg.
Referenced by llvm::GISelInstProfileBuilder::addNodeIDReg(), llvm::CombinerHelper::applyAshShlToSextInreg(), llvm::CombinerHelper::applyCombineAddP2IToPtrAdd(), llvm::CombinerHelper::applyCombineExtendingLoads(), llvm::CombinerHelper::applyCombineIndexedLoadStore(), llvm::CombinerHelper::applyCombineInsertVecElts(), llvm::CombinerHelper::applyCombineMulToShl(), llvm::CombinerHelper::applyCombineShiftToUnmerge(), llvm::CombinerHelper::applyCombineShlOfExtend(), llvm::CombinerHelper::applyCombineTruncOfExt(), llvm::CombinerHelper::applyCombineTruncOfShift(), llvm::CombinerHelper::applyCombineUnmergeMergeToPlainValues(), llvm::CombinerHelper::applyCombineUnmergeWithDeadLanesToTrunc(), llvm::CombinerHelper::applyCombineUnmergeZExtToZExt(), AMDGPUCombinerHelper::applyExpandPromotedF16FMed3(), llvm::CombinerHelper::applyExtendThroughPhis(), llvm::CombinerHelper::applyExtractVecEltBuildVec(), AMDGPUCombinerHelper::applyFoldableFneg(), llvm::CombinerHelper::applyFoldBinOpIntoSelect(), llvm::CombinerHelper::applyFsubToFneg(), llvm::CombinerHelper::applyFunnelShiftConstantModulo(), llvm::CombinerHelper::applyOptBrCondByInvertingCond(), llvm::CombinerHelper::applyPtrAddImmedChain(), llvm::CombinerHelper::applyRotateOutOfRange(), llvm::CombinerHelper::applyShiftImmedChain(), llvm::CombinerHelper::applyShiftOfShiftedLogic(), llvm::CombinerHelper::applyShuffleToExtract(), llvm::CombinerHelper::applySimplifyURemByPow2(), llvm::CombinerHelper::applyUMulHToLShr(), llvm::CombinerHelper::applyXorOfAndWithSameReg(), llvm::LegalizerHelper::bitcast(), llvm::MachineIRBuilder::buildAtomicCmpXchg(), llvm::CSEMIRBuilder::buildFConstant(), llvm::CombinerHelper::buildSDivUsingMul(), llvm::CombinerHelper::buildUDivUsingMul(), llvm::CombinerHelper::canCombineFMadOrFMA(), cloneVirtualRegister(), llvm::LegalizerHelper::coerceToScalar(), llvm::GISelKnownBits::computeKnownBitsImpl(), llvm::RegBankSelect::computeMapping(), llvm::GISelKnownBits::computeNumSignBits(), constrainRegAttrs(), llvm::LegalizerHelper::fewerElementsVector(), llvm::LegalizerHelper::fewerElementsVectorExtractInsertVectorElt(), llvm::LegalizerHelper::fewerElementsVectorMerge(), llvm::LegalizerHelper::fewerElementsVectorMultiEltType(), llvm::LegalizerHelper::fewerElementsVectorPhi(), llvm::LegalizerHelper::fewerElementsVectorUnmergeValues(), llvm::GISelKnownBits::getKnownBits(), llvm::LegalizerHelper::getVectorElementPointer(), llvm::LegalizerHelper::libcall(), llvm::LegalizerHelper::lower(), llvm::LegalizerHelper::lowerAbsToAddXor(), llvm::LegalizerHelper::lowerAbsToMaxNeg(), llvm::LegalizerHelper::lowerAddSubSatToAddoSubo(), llvm::LegalizerHelper::lowerAddSubSatToMinMax(), llvm::LegalizerHelper::lowerBitCount(), llvm::LegalizerHelper::lowerBitreverse(), llvm::LegalizerHelper::lowerBswap(), llvm::LegalizerHelper::lowerDynStackAlloc(), llvm::LegalizerHelper::lowerEXT(), llvm::LegalizerHelper::lowerExtractInsertVectorElt(), llvm::LegalizerHelper::lowerFConstant(), llvm::LegalizerHelper::lowerFFloor(), llvm::LegalizerHelper::lowerFMad(), llvm::LegalizerHelper::lowerFMinNumMaxNum(), llvm::LegalizerHelper::lowerFPOWI(), llvm::LegalizerHelper::lowerFPTRUNC_F64_TO_F16(), llvm::LegalizerHelper::lowerFunnelShift(), llvm::LegalizerHelper::lowerFunnelShiftAsShifts(), llvm::LegalizerHelper::lowerFunnelShiftWithInverse(), llvm::LegalizerHelper::lowerInsert(), llvm::LegalizerHelper::lowerIntrinsicRound(), llvm::LegalizerHelper::lowerLoad(), llvm::LegalizerHelper::lowerMinMax(), llvm::LegalizerHelper::lowerReadWriteRegister(), llvm::LegalizerHelper::lowerShlSat(), llvm::LegalizerHelper::lowerSMULH_UMULH(), llvm::LegalizerHelper::lowerStore(), llvm::LegalizerHelper::lowerU64ToF32BitOps(), llvm::LegalizerHelper::lowerUnmergeValues(), llvm::LegalizerHelper::lowerVAArg(), llvm::LegalizerHelper::lowerVectorReduction(), llvm::CombinerHelper::matchAddOBy0(), llvm::CombinerHelper::matchAndOrDisjointMask(), llvm::CombinerHelper::matchAshrShlToSextInreg(), llvm::CombinerHelper::matchBitfieldExtractFromAnd(), llvm::CombinerHelper::matchBitfieldExtractFromSExtInReg(), llvm::CombinerHelper::matchBitfieldExtractFromShr(), llvm::CombinerHelper::matchBitfieldExtractFromShrAnd(), llvm::CombinerHelper::matchBuildVectorIdentityFold(), llvm::CombinerHelper::matchCombineAddP2IToPtrAdd(), llvm::CombinerHelper::matchCombineAnyExtTrunc(), llvm::CombinerHelper::matchCombineConcatVectors(), llvm::CombinerHelper::matchCombineConstPtrAddToI2P(), llvm::CombinerHelper::matchCombineDivRem(), llvm::CombinerHelper::matchCombineExtendingLoads(), llvm::CombinerHelper::matchCombineExtractedVectorLoad(), llvm::CombinerHelper::matchCombineFAddFMAFMulToFMadOrFMA(), llvm::CombinerHelper::matchCombineFAddFpExtFMulToFMadOrFMA(), llvm::CombinerHelper::matchCombineFAddFpExtFMulToFMadOrFMAAggressive(), llvm::CombinerHelper::matchCombineFSubFMulToFMadOrFMA(), llvm::CombinerHelper::matchCombineFSubFNegFMulToFMadOrFMA(), llvm::CombinerHelper::matchCombineFSubFpExtFMulToFMadOrFMA(), llvm::CombinerHelper::matchCombineFSubFpExtFNegFMulToFMadOrFMA(), llvm::CombinerHelper::matchCombineI2PToP2I(), llvm::CombinerHelper::matchCombineInsertVecElts(), llvm::CombinerHelper::matchCombineLoadWithAndMask(), llvm::CombinerHelper::matchCombineShiftToUnmerge(), llvm::CombinerHelper::matchCombineShlOfExtend(), llvm::CombinerHelper::matchCombineShuffleVector(), llvm::CombinerHelper::matchCombineTruncOfShift(), llvm::CombinerHelper::matchCombineUnmergeConstant(), llvm::CombinerHelper::matchCombineUnmergeMergeToPlainValues(), llvm::CombinerHelper::matchCombineUnmergeZExtToZExt(), llvm::CombinerHelper::matchCombineZextTrunc(), llvm::CombinerHelper::matchCommuteShift(), llvm::CombinerHelper::matchConstantFoldCastOp(), llvm::CombinerHelper::matchConstantLargerBitWidth(), AMDGPUCombinerHelper::matchExpandPromotedF16FMed3(), llvm::CombinerHelper::matchExtendThroughPhis(), llvm::CombinerHelper::matchExtractAllEltsFromBuildVector(), llvm::CombinerHelper::matchExtractVecEltBuildVec(), llvm::CombinerHelper::matchFsubToFneg(), llvm::CombinerHelper::matchFunnelShiftToRotate(), llvm::CombinerHelper::matchHoistLogicOpWithSameOpcodeHands(), llvm::CombinerHelper::matchICmpToLHSKnownBits(), llvm::CombinerHelper::matchICmpToTrueFalseKnownBits(), llvm::CombinerHelper::matchInsertExtractVecEltOutOfBounds(), llvm::CombinerHelper::matchLoadOrCombine(), llvm::CombinerHelper::matchMulOBy0(), llvm::CombinerHelper::matchNarrowBinopFeedingAnd(), llvm::CombinerHelper::matchNotCmp(), llvm::CombinerHelper::matchOrShiftToFunnelShift(), llvm::CombinerHelper::matchOverlappingAnd(), llvm::CombinerHelper::matchPtrAddImmedChain(), llvm::CombinerHelper::matchPtrAddZero(), llvm::CombinerHelper::matchReassocConstantInnerLHS(), llvm::CombinerHelper::matchReassocConstantInnerRHS(), llvm::CombinerHelper::matchReassocFoldConstantsInSubTree(), llvm::CombinerHelper::matchRedundantBinOpInEquality(), llvm::CombinerHelper::matchRedundantNegOperands(), llvm::CombinerHelper::matchRedundantSExtInReg(), llvm::CombinerHelper::matchRotateOutOfRange(), llvm::CombinerHelper::matchSDivByConst(), llvm::CombinerHelper::matchSelectToLogical(), llvm::CombinerHelper::matchSextInRegOfLoad(), llvm::CombinerHelper::matchSextTruncSextLoad(), llvm::CombinerHelper::matchShiftImmedChain(), llvm::CombinerHelper::matchShiftOfShiftedLogic(), llvm::CombinerHelper::matchShiftsTooBig(), llvm::CombinerHelper::matchSubAddSameReg(), llvm::CombinerHelper::matchTruncBuildVectorFold(), llvm::CombinerHelper::matchTruncLshrBuildVectorFold(), llvm::CombinerHelper::matchUDivByConst(), llvm::CombinerHelper::matchUMulHToLShr(), llvm::LegalizerHelper::moreElementsVector(), llvm::LegalizerHelper::narrowScalar(), llvm::LegalizerHelper::narrowScalarAddSub(), llvm::LegalizerHelper::narrowScalarBasic(), llvm::LegalizerHelper::narrowScalarExt(), llvm::LegalizerHelper::narrowScalarExtract(), llvm::LegalizerHelper::narrowScalarFLDEXP(), llvm::LegalizerHelper::narrowScalarFPTOI(), llvm::LegalizerHelper::narrowScalarInsert(), llvm::LegalizerHelper::narrowScalarMul(), llvm::LegalizerHelper::narrowScalarSelect(), llvm::LegalizerHelper::narrowScalarShift(), llvm::LegalizerHelper::reduceLoadStoreWidth(), llvm::RegBankSelect::repairReg(), llvm::GISelKnownBits::signBitIsZero(), llvm::CombinerHelper::tryReassocBinOp(), and llvm::LegalizerHelper::widenScalar().
MachineInstr * MachineRegisterInfo::getUniqueVRegDef | ( | Register | Reg | ) | const |
getUniqueVRegDef - Return the unique machine instr that defines the specified virtual register or null if none is found.
If there are multiple definitions or no definition, return null.
Definition at line 409 of file MachineRegisterInfo.cpp.
References def_empty(), def_instr_begin(), def_instr_end(), and I.
Referenced by llvm::CombinerHelper::applyCombineIndexedLoadStore(), llvm::WebAssemblyRegisterInfo::eliminateFrameIndex(), genIndexedMultiply(), llvm::PeelingModuloScheduleExpander::getEquivalentRegisterIn(), llvm::SPIRVGlobalRegistry::getOrCreateOpTypeByOpcode(), llvm::CombinerHelper::matchShiftImmedChain(), llvm::CombinerHelper::matchShiftOfShiftedLogic(), llvm::PeelingModuloScheduleExpander::moveStageBetweenBlocks(), llvm::PeelingModuloScheduleExpander::peelPrologAndEpilogs(), llvm::LiveVariables::recomputeForSingleDefVirtReg(), and llvm::PeelingModuloScheduleExpander::rewriteUsesOf().
Definition at line 899 of file MachineRegisterInfo.h.
MachineInstr * MachineRegisterInfo::getVRegDef | ( | Register | Reg | ) | const |
getVRegDef - Return the machine instr that defines the specified virtual register or null if none is found.
This assumes that the code is in SSA form, so there should only be one definition.
Definition at line 398 of file MachineRegisterInfo.cpp.
References assert(), def_instr_begin(), def_instr_end(), and I.
Referenced by llvm::CombinerHelper::applyCombineIndexedLoadStore(), llvm::CombinerHelper::applyCombineUnmergeZExtToZExt(), llvm::CombinerHelper::applyExtendThroughPhis(), llvm::CombinerHelper::applyFoldBinOpIntoSelect(), llvm::CombinerHelper::applyNotCmp(), llvm::CombinerHelper::applySextInRegOfLoad(), llvm::GISelKnownBits::computeKnownAlignment(), llvm::GISelKnownBits::computeKnownBitsImpl(), llvm::GISelKnownBits::computeNumSignBits(), llvm::PPCTargetLowering::EmitPartwordAtomicBinary(), llvm::SPIRVGlobalRegistry::getOrCreateOpTypeSampledImage(), llvm::PeelingModuloScheduleExpander::getPhiCanonicalReg(), llvm::LiveVariables::HandleVirtRegUse(), llvm::SwingSchedulerDAG::isLoopCarriedDep(), llvm::CombinerHelper::matchCombineConcatVectors(), llvm::CombinerHelper::matchCombineExtOfExt(), llvm::CombinerHelper::matchCombineFAddFMAFMulToFMadOrFMA(), llvm::CombinerHelper::matchCombineFAddFMulToFMadOrFMA(), llvm::CombinerHelper::matchCombineFAddFpExtFMulToFMadOrFMA(), llvm::CombinerHelper::matchCombineFAddFpExtFMulToFMadOrFMAAggressive(), llvm::CombinerHelper::matchCombineFSubFMulToFMadOrFMA(), llvm::CombinerHelper::matchCombineLoadWithAndMask(), llvm::CombinerHelper::matchCombineShlOfExtend(), llvm::CombinerHelper::matchCombineTruncOfExt(), llvm::CombinerHelper::matchCombineUnmergeConstant(), llvm::CombinerHelper::matchCombineUnmergeUndef(), llvm::CombinerHelper::matchCommuteConstantToRHS(), llvm::CombinerHelper::matchCommuteShift(), llvm::CombinerHelper::matchConstantOp(), llvm::CombinerHelper::matchConstantSelectCmp(), llvm::CombinerHelper::matchExtractVecEltBuildVec(), AMDGPUCombinerHelper::matchFoldableFneg(), llvm::CombinerHelper::matchFoldBinOpIntoSelect(), llvm::CombinerHelper::matchNotCmp(), llvm::CombinerHelper::matchPtrAddImmedChain(), llvm::CombinerHelper::matchPtrAddZero(), llvm::CombinerHelper::matchReassocPtrAdd(), llvm::CombinerHelper::matchUDivByConst(), llvm::PeelingModuloScheduleExpander::moveStageBetweenBlocks(), llvm::LiveVariables::runOnMachineFunction(), llvm::SelectionDAGISel::runOnMachineFunction(), llvm::TailDuplicator::tailDuplicateAndUpdate(), llvm::CombinerHelper::tryReassocBinOp(), and llvm::SSAUpdaterTraits< MachineSSAUpdater >::ValueIsPHI().
Definition at line 452 of file MachineRegisterInfo.h.
References llvm::IndexedMap< T, ToIndexT >::inBounds(), and Reg.
Referenced by llvm::MIRPrinter::convert().
hasAtMostUses - Return true if the given register has at most MaxUsers
non-debug user instructions.
Definition at line 425 of file MachineRegisterInfo.cpp.
References llvm::hasNItemsOrLess(), use_instr_nodbg_begin(), and use_instr_nodbg_end().
Return true if there is exactly one operand defining the specified register.
Definition at line 468 of file MachineRegisterInfo.h.
References def_operands(), and llvm::hasSingleElement().
Referenced by llvm::ScheduleDAGInstrs::addVRegDefDeps(), llvm::InstrEmitter::EmitDbgInstrRef(), and llvm::MachineFunction::finalizeDebugInstrRefs().
hasOneNonDBGUse - Return true if there is exactly one non-Debug use of the specified register.
Definition at line 417 of file MachineRegisterInfo.cpp.
References llvm::hasSingleElement(), and use_nodbg_operands().
Referenced by AMDGPUCombinerHelper::applyFoldableFneg(), llvm::CombinerHelper::matchCombineExtractedVectorLoad(), llvm::CombinerHelper::matchCombineFAddFMAFMulToFMadOrFMA(), llvm::CombinerHelper::matchCombineFAddFMulToFMadOrFMA(), llvm::CombinerHelper::matchCombineFSubFMulToFMadOrFMA(), llvm::CombinerHelper::matchCombineFSubFNegFMulToFMadOrFMA(), llvm::CombinerHelper::matchCombineFSubFpExtFMulToFMadOrFMA(), llvm::CombinerHelper::matchCombineLoadWithAndMask(), llvm::CombinerHelper::matchCombineTruncOfShift(), AMDGPUCombinerHelper::matchExpandPromotedF16FMed3(), llvm::CombinerHelper::matchExtendThroughPhis(), llvm::CombinerHelper::matchExtractVecEltBuildVec(), AMDGPUCombinerHelper::matchFoldableFneg(), llvm::CombinerHelper::matchFoldBinOpIntoSelect(), llvm::CombinerHelper::matchHoistLogicOpWithSameOpcodeHands(), llvm::CombinerHelper::matchNarrowBinopFeedingAnd(), llvm::CombinerHelper::matchNotCmp(), llvm::CombinerHelper::matchSextInRegOfLoad(), llvm::CombinerHelper::matchShiftOfShiftedLogic(), llvm::CombinerHelper::matchXorOfAndWithSameReg(), and llvm::TailDuplicator::tailDuplicateAndUpdate().
hasOneNonDBGUse - Return true if there is exactly one non-Debug instruction using the specified register.
Said instruction may have multiple uses.
Definition at line 421 of file MachineRegisterInfo.cpp.
References llvm::hasSingleElement(), and use_nodbg_instructions().
hasOneUse - Return true if there is exactly one instruction using the specified register.
Definition at line 534 of file MachineRegisterInfo.h.
References llvm::hasSingleElement(), and use_operands().
Referenced by llvm::CombinerHelper::matchCombineInsertVecElts(), and llvm::FastISel::tryToFoldLoad().
Definition at line 456 of file MachineRegisterInfo.h.
References assert(), llvm::StringSet< AllocatorTy >::contains(), llvm::IndexedMap< T, ToIndexT >::grow(), llvm::StringSet< AllocatorTy >::insert(), Name, and Reg.
Referenced by createIncompleteVirtualRegister().
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invalidateLiveness - Indicates that register liveness is no longer being tracked accurately.
This should be called by late passes that invalidate the liveness information.
Definition at line 220 of file MachineRegisterInfo.h.
References llvm::MachineFunction::getProperties(), llvm::MachineFunctionProperties::reset(), and llvm::MachineFunctionProperties::TracksLiveness.
Referenced by llvm::MIRParserImpl::parseRegisterInfo().
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isAllocatable - Returns true when PhysReg belongs to an allocatable register class and it hasn't been reserved.
Allocatable registers may show up in the allocation order of some virtual register, so a register allocator needs to track its liveness and availability.
Definition at line 974 of file MachineRegisterInfo.h.
References getTargetRegisterInfo(), llvm::TargetRegisterInfo::isInAllocatableClass(), and isReserved().
Referenced by llvm::AggressiveAntiDepBreaker::BreakAntiDependencies(), llvm::CriticalAntiDepBreaker::BreakAntiDependencies(), llvm::PPCRegisterInfo::getCalleeSavedRegs(), and isConstantPhysReg().
bool MachineRegisterInfo::isArgumentRegister | ( | const MachineFunction & | MF, |
MCRegister | Reg | ||
) | const |
Returns true if a register can be used as an argument to a function.
Definition at line 654 of file MachineRegisterInfo.cpp.
References getTargetRegisterInfo(), and llvm::TargetRegisterInfo::isArgumentRegister().
bool MachineRegisterInfo::isConstantPhysReg | ( | MCRegister | PhysReg | ) | const |
Returns true if PhysReg is unallocatable and constant throughout the function.
Writing to a constant register has no effect.
Definition at line 517 of file MachineRegisterInfo.cpp.
References assert(), def_empty(), getTargetRegisterInfo(), isAllocatable(), llvm::Register::isPhysicalRegister(), llvm::MCRegAliasIterator::isValid(), and TRI.
Referenced by llvm::ScheduleDAGInstrs::addPhysRegDeps(), and llvm::LiveRangeEdit::allUsesAvailableAt().
bool MachineRegisterInfo::isFixedRegister | ( | const MachineFunction & | MF, |
MCRegister | Reg | ||
) | const |
Returns true if a register is a fixed register.
Definition at line 659 of file MachineRegisterInfo.cpp.
References getTargetRegisterInfo(), and llvm::TargetRegisterInfo::isFixedRegister().
bool MachineRegisterInfo::isGeneralPurposeRegister | ( | const MachineFunction & | MF, |
MCRegister | Reg | ||
) | const |
Returns true if a register is a general purpose register.
Definition at line 664 of file MachineRegisterInfo.cpp.
References getTargetRegisterInfo(), and llvm::TargetRegisterInfo::isGeneralPurposeRegister().
Definition at line 440 of file MachineRegisterInfo.cpp.
References liveins().
Referenced by llvm::X86FrameLowering::adjustForHiPEPrologue(), llvm::X86FrameLowering::adjustForSegmentedStacks(), llvm::ARMFrameLowering::determineCalleeSaves(), getPrologueDeath(), isSignExtendedW(), llvm::PPCInstrInfo::isSignOrZeroExtended(), llvm::Thumb1FrameLowering::spillCalleeSavedRegisters(), and llvm::M68kFrameLowering::spillCalleeSavedRegisters().
bool MachineRegisterInfo::isPhysRegModified | ( | MCRegister | PhysReg, |
bool | SkipNoReturnDef = false |
||
) | const |
Return true if the specified register is modified in this function.
This checks that no defining machine operands exist for the register or any of its aliases. Definitions found on functions marked noreturn are ignored, to consider them pass 'true' for optional parameter SkipNoReturnDef. The register is also considered modified when it is set in the UsedPhysRegMask.
Definition at line 574 of file MachineRegisterInfo.cpp.
References def_begin(), def_end(), getTargetRegisterInfo(), isNoReturnDef(), llvm::MCRegAliasIterator::isValid(), llvm::make_range(), llvm::BitVector::test(), and TRI.
bool MachineRegisterInfo::isPhysRegUsed | ( | MCRegister | PhysReg, |
bool | SkipRegMaskTest = false |
||
) | const |
Return true if the specified register is modified or read in this function.
This checks that no machine operands exist for the register or any of its aliases. If SkipRegMaskTest is false, the register is considered used when it is set in the UsedPhysRegMask.
Definition at line 589 of file MachineRegisterInfo.cpp.
References getTargetRegisterInfo(), llvm::MCRegAliasIterator::isValid(), reg_nodbg_empty(), llvm::BitVector::test(), and TRI.
Referenced by llvm::AArch64FrameLowering::determineCalleeSaves(), and llvm::GCNHazardRecognizer::GCNHazardRecognizer().
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isReserved - Returns true when PhysReg is a reserved register.
Reserved registers may belong to an allocatable register class, but the target has explicitly requested that they are not used.
Definition at line 956 of file MachineRegisterInfo.h.
References getReservedRegs(), llvm::MCRegister::id(), and llvm::BitVector::test().
Referenced by llvm::SIRegisterInfo::buildSpillLoadStore(), llvm::RISCVFrameLowering::emitPrologue(), llvm::X86FrameLowering::emitPrologue(), indirectCopyToAGPR(), isAllocatable(), and llvm::SIRegisterInfo::isAsmClobberable().
Returns true when the given register unit is considered reserved.
Register units are considered reserved when for at least one of their root registers, the root register and all super registers are reserved. This currently iterates the register hierarchy and may be slower than expected.
Definition at line 644 of file MachineRegisterInfo.cpp.
References llvm::all_of(), getTargetRegisterInfo(), llvm::MCRegUnitRootIterator::isValid(), and TRI.
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Definition at line 198 of file MachineRegisterInfo.h.
References llvm::MachineFunction::getProperties(), llvm::MachineFunctionProperties::hasProperty(), and llvm::MachineFunctionProperties::IsSSA.
Referenced by llvm::PPCInstrInfo::materializeImmPostRA(), and llvm::LiveVariables::runOnMachineFunction().
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Returns true if the updated CSR list was initialized and false otherwise.
Definition at line 244 of file MachineRegisterInfo.h.
Referenced by llvm::MIRPrinter::convert().
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Definition at line 204 of file MachineRegisterInfo.h.
References llvm::MachineFunction::getProperties(), llvm::MachineFunctionProperties::IsSSA, and llvm::MachineFunctionProperties::reset().
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Definition at line 993 of file MachineRegisterInfo.h.
Referenced by llvm::MachineFunction::print().
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Definition at line 995 of file MachineRegisterInfo.h.
Referenced by llvm::MachineFunction::print().
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Definition at line 994 of file MachineRegisterInfo.h.
Referenced by llvm::MachineFunction::print().
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Definition at line 997 of file MachineRegisterInfo.h.
Referenced by llvm::MIRPrinter::convert(), getLiveInPhysReg(), getLiveInVirtReg(), isLiveIn(), processIfEntryValueDbgDeclare(), llvm::SelectionDAGISel::runOnMachineFunction(), and llvm::FastISel::selectIntrinsicCall().
void MachineRegisterInfo::markUsesInDebugValueAsUndef | ( | Register | Reg | ) | const |
markUsesInDebugValueAsUndef - Mark every DBG_VALUE referencing the specified register as undefined which causes the DBG_VALUE to be deleted during LiveDebugVariables analysis.
Definition at line 536 of file MachineRegisterInfo.cpp.
References llvm::make_early_inc_range(), use_instructions(), and UseMI.
void MachineRegisterInfo::moveOperands | ( | MachineOperand * | Dst, |
MachineOperand * | Src, | ||
unsigned | NumOps | ||
) |
Move NumOps operands from Src to Dst, updating use-def lists as needed.
The Dst range is assumed to be uninitialized memory. (Or it may contain operands that won't be destroyed, which is OK because the MO destructor is trivial anyway).
The Src and Dst ranges may overlap.
Definition at line 333 of file MachineRegisterInfo.cpp.
References assert().
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Definition at line 182 of file MachineRegisterInfo.h.
Referenced by cloneVirtualRegister().
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Definition at line 177 of file MachineRegisterInfo.h.
References Reg.
Referenced by createGenericVirtualRegister(), and createVirtualRegister().
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recomputeRegClass - Try to find a legal super-class of Reg's register class that still satisfies the constraints from the instructions using Reg.
Returns true if Reg was upgraded.
This method can be used after constraints have been removed from a virtual register, for example after removing instructions or splitting the live range.
Definition at line 121 of file MachineRegisterInfo.cpp.
References llvm::TargetSubtargetInfo::getInstrInfo(), llvm::TargetRegisterInfo::getLargestLegalSuperClass(), getRegClass(), llvm::MachineFunction::getSubtarget(), getTargetRegisterInfo(), MI, reg_nodbg_operands(), setRegClass(), and TII.
Referenced by llvm::LiveRangeEdit::calculateRegClassAndHint().
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Definition at line 305 of file MachineRegisterInfo.h.
Referenced by reg_empty(), reg_operands(), and llvm::FastISel::tryToFoldLoad().
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Definition at line 334 of file MachineRegisterInfo.h.
Referenced by reg_bundles().
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Definition at line 337 of file MachineRegisterInfo.h.
Referenced by reg_bundles().
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Definition at line 387 of file MachineRegisterInfo.h.
Referenced by reg_nodbg_bundles().
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Definition at line 390 of file MachineRegisterInfo.h.
Referenced by reg_nodbg_bundles().
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Definition at line 341 of file MachineRegisterInfo.h.
References llvm::make_range(), Reg, reg_bundle_begin(), and reg_bundle_end().
reg_empty - Return true if there are no instructions using or defining the specified register (it may be live-in).
Definition at line 347 of file MachineRegisterInfo.h.
References reg_begin(), and reg_end().
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Definition at line 308 of file MachineRegisterInfo.h.
Referenced by reg_empty(), and reg_operands().
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Definition at line 318 of file MachineRegisterInfo.h.
Referenced by llvm::RegAllocBase::allocatePhysRegs(), and reg_instructions().
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Definition at line 321 of file MachineRegisterInfo.h.
Referenced by llvm::RegAllocBase::allocatePhysRegs(), and reg_instructions().
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Definition at line 370 of file MachineRegisterInfo.h.
Referenced by reg_nodbg_instructions().
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Definition at line 373 of file MachineRegisterInfo.h.
Referenced by reg_nodbg_instructions().
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Definition at line 326 of file MachineRegisterInfo.h.
References llvm::make_range(), Reg, reg_instr_begin(), and reg_instr_end().
Referenced by clearVirtRegs(), and llvm::LiveIntervals::shrinkToUses().
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Definition at line 353 of file MachineRegisterInfo.h.
Referenced by reg_nodbg_empty(), and reg_nodbg_operands().
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Definition at line 395 of file MachineRegisterInfo.h.
References llvm::make_range(), Reg, reg_bundle_nodbg_begin(), and reg_bundle_nodbg_end().
reg_nodbg_empty - Return true if the only instructions using or defining Reg are Debug instructions.
Definition at line 401 of file MachineRegisterInfo.h.
References reg_nodbg_begin(), and reg_nodbg_end().
Referenced by llvm::LiveIntervals::addKillFlags(), llvm::RegAllocBase::allocatePhysRegs(), and isPhysRegUsed().
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Definition at line 356 of file MachineRegisterInfo.h.
Referenced by reg_nodbg_empty(), and reg_nodbg_operands().
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Definition at line 378 of file MachineRegisterInfo.h.
References llvm::make_range(), Reg, reg_instr_nodbg_begin(), and reg_instr_nodbg_end().
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Definition at line 361 of file MachineRegisterInfo.h.
References llvm::make_range(), Reg, reg_nodbg_begin(), and reg_nodbg_end().
Referenced by recomputeRegClass().
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Definition at line 310 of file MachineRegisterInfo.h.
References llvm::make_range(), Reg, reg_begin(), and reg_end().
Referenced by replaceRegWith(), and verifyUseList().
void MachineRegisterInfo::removeRegOperandFromUseList | ( | MachineOperand * | MO | ) |
Remove MO from its use-def list.
Definition at line 304 of file MachineRegisterInfo.cpp.
References assert(), and llvm::MachineOperand::getReg().
Referenced by llvm::MachineOperand::ChangeToRegister().
replaceRegWith - Replace all instances of FromReg with ToReg in the machine function.
This is like llvm-level X->replaceAllUsesWith(Y), except that it also changes any definitions of the register as well.
Note that it is usually necessary to first constrain ToReg's register class and register bank to match the FromReg constraints using one of the methods:
constrainRegClass(ToReg, getRegClass(FromReg)) constrainRegAttrs(ToReg, FromReg) RegisterBankInfo::constrainGenericRegister(ToReg, *MRI.getRegClass(FromReg), MRI)
These functions will return a falsy result if the virtual registers have incompatible constraints.
Note that if ToReg is a physical register the function will replace and apply sub registers to ToReg in order to obtain a final/proper physical register.
This is like llvm-level X->replaceAllUsesWith(Y), except that it also changes any definitions of the register as well. If ToReg is a physical register we apply the sub register to obtain the final/proper physical register.
Definition at line 380 of file MachineRegisterInfo.cpp.
References assert(), getTargetRegisterInfo(), llvm::Register::isPhysical(), llvm::make_early_inc_range(), reg_operands(), and TRI.
Referenced by llvm::PeelingModuloScheduleExpander::moveStageBetweenBlocks(), llvm::CombinerHelper::replaceRegWith(), llvm::PeelingModuloScheduleExpander::rewriteUsesOf(), and llvm::TailDuplicator::tailDuplicateAndUpdate().
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reservedRegsFrozen - Returns true after freezeReservedRegs() was called to ensure the set of reserved registers stays constant.
Definition at line 931 of file MachineRegisterInfo.h.
Referenced by canReserveReg(), getReservedRegs(), llvm::AArch64InstrInfo::probedStackAlloc(), and reserveReg().
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reserveReg – Mark a register as reserved so checks like isAllocatable will not suggest using it.
This should not be used during the middle of a function walk, or when liveness info is available.
Definition at line 920 of file MachineRegisterInfo.h.
References assert(), reservedRegsFrozen(), and TRI.
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Definition at line 161 of file MachineRegisterInfo.h.
References assert(), llvm::SmallPtrSetImpl< PtrType >::count(), and llvm::SmallPtrSetImpl< PtrType >::erase().
Sets the updated Callee Saved Registers list.
Notice that it will override ant previously disabled/saved CSRs.
Definition at line 632 of file MachineRegisterInfo.cpp.
References llvm::append_range().
Referenced by llvm::MIRParserImpl::parseRegisterInfo(), and llvm::AArch64RegisterInfo::UpdateCustomCalleeSavedRegs().
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setRegAllocationHint - Specify a register allocation hint for the specified virtual register.
This is typically used by target, and in case of an earlier hint it will be overwritten.
Definition at line 794 of file MachineRegisterInfo.h.
References assert(), llvm::IndexedMap< T, ToIndexT >::clear(), llvm::Register::isVirtual(), and Type.
Referenced by setSimpleHint().
void MachineRegisterInfo::setRegBank | ( | Register | Reg, |
const RegisterBank & | RegBank | ||
) |
Set the register bank to RegBank
for Reg
.
Definition at line 62 of file MachineRegisterInfo.cpp.
Referenced by llvm::RegBankSelect::applyMapping(), llvm::RegBankSelect::assignInstr(), and llvm::CombinerHelper::setRegBank().
void MachineRegisterInfo::setRegClass | ( | Register | Reg, |
const TargetRegisterClass * | RC | ||
) |
setRegClass - Set the register class of the specified virtual register.
Definition at line 57 of file MachineRegisterInfo.cpp.
References assert(), and llvm::TargetRegisterClass::isAllocatable().
Referenced by llvm::buildAtomicInitInst(), llvm::buildAtomicLoadInst(), llvm::buildAtomicStoreInst(), llvm::buildBoolRegister(), llvm::generateEnqueueInst(), llvm::generateImageMiscQueryInst(), llvm::generateImageSizeQueryInst(), llvm::generateWriteImageInst(), llvm::SPIRVGlobalRegistry::getOrCreateConstNullPtr(), llvm::SPIRVGlobalRegistry::getOrCreateUndef(), llvm::SPIRV::lowerBuiltin(), recomputeRegClass(), and llvm::PeelingModuloScheduleExpander::rewriteUsesOf().
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Definition at line 707 of file MachineRegisterInfo.h.
References Reg.
Referenced by llvm::CombinerHelper::applyCombineUnmergeMergeToPlainValues(), and constrainRegAttrs().
Specify the preferred (target independent) register allocation hint for the specified virtual register.
Definition at line 810 of file MachineRegisterInfo.h.
References setRegAllocationHint().
Set the low-level type of VReg
to Ty
.
Definition at line 179 of file MachineRegisterInfo.cpp.
References llvm::IndexedMap< T, ToIndexT >::grow().
Referenced by allocateVGPR32Input(), llvm::buildBuiltinVariableLoad(), cloneVirtualRegister(), constrainRegAttrs(), createGenericVirtualRegister(), and llvm::SPIRV::lowerBuiltin().
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Returns true if liveness for register class RC
should be tracked at the subregister level.
Definition at line 227 of file MachineRegisterInfo.h.
References llvm::TargetRegisterClass::HasDisjunctSubRegs, and subRegLivenessEnabled().
Referenced by shouldTrackSubRegLiveness().
Definition at line 230 of file MachineRegisterInfo.h.
References assert(), getRegClassOrNull(), llvm::Register::isVirtual(), LLVM_LIKELY, and shouldTrackSubRegLiveness().
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Definition at line 235 of file MachineRegisterInfo.h.
Referenced by llvm::LiveIntervals::addKillFlags(), and shouldTrackSubRegLiveness().
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tracksLiveness - Returns true when tracking register liveness accurately.
(see MachineFUnctionProperties::Property description for details)
Definition at line 210 of file MachineRegisterInfo.h.
References llvm::MachineFunction::getProperties(), llvm::MachineFunctionProperties::hasProperty(), and llvm::MachineFunctionProperties::TracksLiveness.
Referenced by llvm::MIRPrinter::convert(), findRenameRegForSameLdStRegPair(), llvm::AArch64InstrInfo::getOutlinableRanges(), llvm::ARMBaseInstrInfo::isMBBSafeToOutlineFrom(), and llvm::MIRParserImpl::parseRegisterInfo().
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updateDbgUsersToReg - Update a collection of debug instructions to refer to the designated register.
Definition at line 853 of file MachineRegisterInfo.h.
References assert(), getTargetRegisterInfo(), llvm_unreachable, MI, llvm::TargetRegisterInfo::regsOverlap(), and Users.
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Definition at line 488 of file MachineRegisterInfo.h.
Referenced by use_empty(), and use_operands().
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Definition at line 517 of file MachineRegisterInfo.h.
Referenced by use_bundles().
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Definition at line 520 of file MachineRegisterInfo.h.
Referenced by use_bundles().
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Definition at line 576 of file MachineRegisterInfo.h.
Referenced by use_nodbg_bundles().
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Definition at line 579 of file MachineRegisterInfo.h.
Referenced by use_nodbg_bundles().
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Definition at line 524 of file MachineRegisterInfo.h.
References llvm::make_range(), Reg, use_bundle_begin(), and use_bundle_end().
use_empty - Return true if there are no instructions using the specified register.
Definition at line 530 of file MachineRegisterInfo.h.
References use_begin(), and use_end().
Referenced by llvm::NVPTXFrameLowering::emitPrologue(), and GetInitialOffset().
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Definition at line 491 of file MachineRegisterInfo.h.
Referenced by use_empty(), and use_operands().
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Definition at line 501 of file MachineRegisterInfo.h.
Referenced by llvm::CombinerHelper::matchCombineInsertVecElts(), llvm::SelectionDAGISel::runOnMachineFunction(), and use_instructions().
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Definition at line 504 of file MachineRegisterInfo.h.
Referenced by llvm::SelectionDAGISel::runOnMachineFunction(), and use_instructions().
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Definition at line 559 of file MachineRegisterInfo.h.
Referenced by hasAtMostUserInstrs(), llvm::CombinerHelper::matchExtendThroughPhis(), and use_nodbg_instructions().
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Definition at line 562 of file MachineRegisterInfo.h.
Referenced by hasAtMostUserInstrs(), and use_nodbg_instructions().
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Definition at line 509 of file MachineRegisterInfo.h.
References llvm::make_range(), Reg, use_instr_begin(), and use_instr_end().
Referenced by llvm::PeelingModuloScheduleExpander::CreateLCSSAExitingBlock(), dumpUses(), llvm::PeelingModuloScheduleExpander::filterInstructions(), markUsesInDebugValueAsUndef(), llvm::CombinerHelper::matchCombineTruncOfShift(), and llvm::PeelingModuloScheduleExpander::rewriteUsesOf().
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Definition at line 542 of file MachineRegisterInfo.h.
Referenced by use_nodbg_empty(), and use_nodbg_operands().
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Definition at line 584 of file MachineRegisterInfo.h.
References llvm::make_range(), Reg, use_bundle_nodbg_begin(), and use_bundle_nodbg_end().
use_nodbg_empty - Return true if there are no non-Debug instructions using the specified register.
Definition at line 590 of file MachineRegisterInfo.h.
References use_nodbg_begin(), and use_nodbg_end().
Referenced by EmitLiveInCopies(), and llvm::CombinerHelper::matchCombineUnmergeWithDeadLanesToTrunc().
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Definition at line 545 of file MachineRegisterInfo.h.
Referenced by use_nodbg_empty(), and use_nodbg_operands().
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Definition at line 567 of file MachineRegisterInfo.h.
References llvm::make_range(), Reg, use_instr_nodbg_begin(), and use_instr_nodbg_end().
Referenced by hasOneNonDBGUser(), llvm::CombinerHelper::matchCombineDivRem(), llvm::CombinerHelper::matchCombineExtendingLoads(), llvm::CombinerHelper::matchExtractAllEltsFromBuildVector(), and llvm::CombinerHelper::matchPtrAddImmedChain().
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Definition at line 550 of file MachineRegisterInfo.h.
References llvm::make_range(), Reg, use_nodbg_begin(), and use_nodbg_end().
Referenced by llvm::DeadLaneDetector::computeSubRegisterLaneBitInfo(), hasOneNonDBGUse(), llvm::LiveVariables::recomputeForSingleDefVirtReg(), and llvm::LiveIntervals::shrinkToUses().
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Definition at line 493 of file MachineRegisterInfo.h.
References llvm::make_range(), Reg, use_begin(), and use_end().
Referenced by llvm::CombinerHelper::applyCombineExtendingLoads(), clearKillFlags(), llvm::ModuloScheduleExpander::expand(), hasOneUse(), and llvm::TailDuplicator::tailDuplicateAndUpdate().
void MachineRegisterInfo::verifyUseList | ( | Register | Reg | ) | const |
Verify the sanity of the use list for Reg.
Definition at line 217 of file MachineRegisterInfo.cpp.
References assert(), llvm::errs(), llvm::MachineOperand::getParent(), llvm::MachineOperand::getReg(), getTargetRegisterInfo(), llvm::MachineOperand::isReg(), MI, llvm::printReg(), and reg_operands().
Referenced by clearVirtRegs(), and verifyUseLists().
void MachineRegisterInfo::verifyUseLists | ( | ) | const |
Verify the use list of all registers.
Definition at line 255 of file MachineRegisterInfo.cpp.
References getNumVirtRegs(), getTargetRegisterInfo(), llvm::Register::index2VirtReg(), and verifyUseList().
Definition at line 299 of file MachineRegisterInfo.h.
Definition at line 297 of file MachineRegisterInfo.h.