LLVM  14.0.0git
BPFAsmBackend.cpp
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1 //===-- BPFAsmBackend.cpp - BPF Assembler Backend -------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
10 #include "llvm/ADT/StringRef.h"
11 #include "llvm/MC/MCAsmBackend.h"
12 #include "llvm/MC/MCAssembler.h"
13 #include "llvm/MC/MCContext.h"
14 #include "llvm/MC/MCFixup.h"
15 #include "llvm/MC/MCObjectWriter.h"
17 #include <cassert>
18 #include <cstdint>
19 
20 using namespace llvm;
21 
22 namespace {
23 
24 class BPFAsmBackend : public MCAsmBackend {
25 public:
26  BPFAsmBackend(support::endianness Endian) : MCAsmBackend(Endian) {}
27  ~BPFAsmBackend() override = default;
28 
29  void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
31  uint64_t Value, bool IsResolved,
32  const MCSubtargetInfo *STI) const override;
33 
34  std::unique_ptr<MCObjectTargetWriter>
35  createObjectTargetWriter() const override;
36 
37  // No instruction requires relaxation
38  bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
39  const MCRelaxableFragment *DF,
40  const MCAsmLayout &Layout) const override {
41  return false;
42  }
43 
44  unsigned getNumFixupKinds() const override { return 1; }
45 
46  bool writeNopData(raw_ostream &OS, uint64_t Count,
47  const MCSubtargetInfo *STI) const override;
48 };
49 
50 } // end anonymous namespace
51 
52 bool BPFAsmBackend::writeNopData(raw_ostream &OS, uint64_t Count,
53  const MCSubtargetInfo *STI) const {
54  if ((Count % 8) != 0)
55  return false;
56 
57  for (uint64_t i = 0; i < Count; i += 8)
58  support::endian::write<uint64_t>(OS, 0x15000000, Endian);
59 
60  return true;
61 }
62 
63 void BPFAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
64  const MCValue &Target,
66  bool IsResolved,
67  const MCSubtargetInfo *STI) const {
68  if (Fixup.getKind() == FK_SecRel_8) {
69  // The Value is 0 for global variables, and the in-section offset
70  // for static variables. Write to the immediate field of the inst.
71  assert(Value <= UINT32_MAX);
72  support::endian::write<uint32_t>(&Data[Fixup.getOffset() + 4],
73  static_cast<uint32_t>(Value),
74  Endian);
75  } else if (Fixup.getKind() == FK_Data_4) {
76  support::endian::write<uint32_t>(&Data[Fixup.getOffset()], Value, Endian);
77  } else if (Fixup.getKind() == FK_Data_8) {
78  support::endian::write<uint64_t>(&Data[Fixup.getOffset()], Value, Endian);
79  } else if (Fixup.getKind() == FK_PCRel_4) {
80  Value = (uint32_t)((Value - 8) / 8);
81  if (Endian == support::little) {
82  Data[Fixup.getOffset() + 1] = 0x10;
83  support::endian::write32le(&Data[Fixup.getOffset() + 4], Value);
84  } else {
85  Data[Fixup.getOffset() + 1] = 0x1;
86  support::endian::write32be(&Data[Fixup.getOffset() + 4], Value);
87  }
88  } else {
89  assert(Fixup.getKind() == FK_PCRel_2);
90  Value = (uint16_t)((Value - 8) / 8);
91  support::endian::write<uint16_t>(&Data[Fixup.getOffset() + 2], Value,
92  Endian);
93  }
94 }
95 
96 std::unique_ptr<MCObjectTargetWriter>
97 BPFAsmBackend::createObjectTargetWriter() const {
98  return createBPFELFObjectWriter(0);
99 }
100 
102  const MCSubtargetInfo &STI,
103  const MCRegisterInfo &MRI,
104  const MCTargetOptions &) {
105  return new BPFAsmBackend(support::little);
106 }
107 
109  const MCSubtargetInfo &STI,
110  const MCRegisterInfo &MRI,
111  const MCTargetOptions &) {
112  return new BPFAsmBackend(support::big);
113 }
BPFMCTargetDesc.h
i
i
Definition: README.txt:29
llvm
This file implements support for optimizing divisions by a constant.
Definition: AllocatorList.h:23
llvm::MCRelaxableFragment
A relaxable fragment holds on to its MCInst, since it may need to be relaxed during the assembler lay...
Definition: MCFragment.h:271
llvm::support::endian::write32be
void write32be(void *P, uint32_t V)
Definition: Endian.h:419
T
StringRef.h
llvm::Target
Target - Wrapper for Target specific information.
Definition: TargetRegistry.h:137
llvm::support::endian::write32le
void write32le(void *P, uint32_t V)
Definition: Endian.h:416
MCAssembler.h
llvm::createBPFELFObjectWriter
std::unique_ptr< MCObjectTargetWriter > createBPFELFObjectWriter(uint8_t OSABI)
Definition: BPFELFObjectWriter.cpp:87
llvm::Data
@ Data
Definition: SIMachineScheduler.h:55
llvm::FK_Data_4
@ FK_Data_4
A four-byte fixup.
Definition: MCFixup.h:25
llvm::MCAsmBackend
Generic interface to target specific assembler backends.
Definition: MCAsmBackend.h:36
MCAsmBackend.h
llvm::MutableArrayRef< char >
llvm::support::little
@ little
Definition: Endian.h:27
MCContext.h
llvm::raw_ostream
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:53
DF
static RegisterPass< DebugifyFunctionPass > DF("debugify-function", "Attach debug info to a function")
llvm::MCAssembler
Definition: MCAssembler.h:60
uint64_t
llvm::createBPFAsmBackend
MCAsmBackend * createBPFAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)
Definition: BPFAsmBackend.cpp:101
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::FK_PCRel_2
@ FK_PCRel_2
A two-byte pc relative fixup.
Definition: MCFixup.h:29
llvm::FK_PCRel_4
@ FK_PCRel_4
A four-byte pc relative fixup.
Definition: MCFixup.h:30
llvm::MCTargetOptions
Definition: MCTargetOptions.h:36
Fixup
PowerPC TLS Dynamic Call Fixup
Definition: PPCTLSDynamicCall.cpp:235
uint32_t
MCFixup.h
llvm::MCRegisterInfo
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
Definition: MCRegisterInfo.h:135
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
MCObjectWriter.h
EndianStream.h
uint16_t
llvm::MCAsmLayout
Encapsulates the layout of an assembly file at a particular point in time.
Definition: MCAsmLayout.h:28
llvm::FK_SecRel_8
@ FK_SecRel_8
A eight-byte section relative fixup.
Definition: MCFixup.h:43
llvm::FK_Data_8
@ FK_Data_8
A eight-byte fixup.
Definition: MCFixup.h:26
llvm::support::endianness
endianness
Definition: Endian.h:27
llvm::HexStyle::Asm
@ Asm
0ffh
Definition: MCInstPrinter.h:34
llvm::MCValue
This represents an "assembler immediate".
Definition: MCValue.h:37
llvm::createBPFbeAsmBackend
MCAsmBackend * createBPFbeAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)
Definition: BPFAsmBackend.cpp:108
llvm::MCSubtargetInfo
Generic base class for all target subtargets.
Definition: MCSubtargetInfo.h:75
llvm::MCFixup
Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...
Definition: MCFixup.h:71
llvm::Value
LLVM Value Representation.
Definition: Value.h:74
llvm::support::big
@ big
Definition: Endian.h:27