LLVM 19.0.0git
LoongArchISelDAGToDAG.h
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1//=- LoongArchISelDAGToDAG.h - A dag to dag inst selector for LoongArch ---===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file defines an instruction selector for the LoongArch target.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_LOONGARCH_LOONGARCHISELDAGTODAG_H
14#define LLVM_LIB_TARGET_LOONGARCH_LOONGARCHISELDAGTODAG_H
15
16#include "LoongArch.h"
19
20// LoongArch-specific code to select LoongArch machine instructions for
21// SelectionDAG operations.
22namespace llvm {
24 const LoongArchSubtarget *Subtarget = nullptr;
25
26public:
28
31
33 Subtarget = &MF.getSubtarget<LoongArchSubtarget>();
35 }
36
37 void Select(SDNode *Node) override;
38
40 InlineAsm::ConstraintCode ConstraintID,
41 std::vector<SDValue> &OutOps) override;
42
46
47 bool selectShiftMask(SDValue N, unsigned ShiftWidth, SDValue &ShAmt);
49 return selectShiftMask(N, Subtarget->getGRLen(), ShAmt);
50 }
52 return selectShiftMask(N, 32, ShAmt);
53 }
54
55 bool selectSExti32(SDValue N, SDValue &Val);
56 bool selectZExti32(SDValue N, SDValue &Val);
57
58 bool selectVSplat(SDNode *N, APInt &Imm, unsigned MinSizeInBits) const;
59
60 template <unsigned ImmSize, bool IsSigned = false>
61 bool selectVSplatImm(SDValue N, SDValue &SplatVal);
62
63 bool selectVSplatUimmInvPow2(SDValue N, SDValue &SplatImm) const;
64 bool selectVSplatUimmPow2(SDValue N, SDValue &SplatImm) const;
65
66// Include the pieces autogenerated from the target description.
67#include "LoongArchGenDAGISel.inc"
68};
69
71public:
72 static char ID;
74};
75
76} // end namespace llvm
77
78#endif // LLVM_LIB_TARGET_LOONGARCH_LOONGARCHISELDAGTODAG_H
uint64_t Addr
const char LLVMTargetMachineRef TM
Class for arbitrary precision integers.
Definition: APInt.h:77
This class represents an Operation in the Expression.
bool selectNonFIBaseAddr(SDValue Addr, SDValue &Base)
bool selectShiftMask32(SDValue N, SDValue &ShAmt)
bool selectSExti32(SDValue N, SDValue &Val)
LoongArchDAGToDAGISel(LoongArchTargetMachine &TM)
bool SelectInlineAsmMemoryOperand(const SDValue &Op, InlineAsm::ConstraintCode ConstraintID, std::vector< SDValue > &OutOps) override
SelectInlineAsmMemoryOperand - Select the specified address as a target addressing mode,...
bool selectVSplatUimmPow2(SDValue N, SDValue &SplatImm) const
bool selectShiftMaskGRLen(SDValue N, SDValue &ShAmt)
bool selectShiftMask(SDValue N, unsigned ShiftWidth, SDValue &ShAmt)
bool selectZExti32(SDValue N, SDValue &Val)
bool SelectAddrConstant(SDValue Addr, SDValue &Base, SDValue &Offset)
bool selectVSplat(SDNode *N, APInt &Imm, unsigned MinSizeInBits) const
bool selectVSplatImm(SDValue N, SDValue &SplatVal)
void Select(SDNode *Node) override
Main hook for targets to transform nodes into machine nodes.
bool selectVSplatUimmInvPow2(SDValue N, SDValue &SplatImm) const
bool runOnMachineFunction(MachineFunction &MF) override
bool SelectBaseAddr(SDValue Addr, SDValue &Base)
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Represents one node in the SelectionDAG.
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
SelectionDAGISel - This is the common base class used for SelectionDAG-based pattern-matching instruc...
MachineFunction * MF
virtual bool runOnMachineFunction(MachineFunction &mf)
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
@ Offset
Definition: DWP.cpp:456
#define N