#include "Target/LoongArch/LoongArchISelDAGToDAG.h"

Inheritance diagram for llvm::LoongArchDAGToDAGISel:

[legend]

Public Member Functions
	LoongArchDAGToDAGISel ()=delete

	LoongArchDAGToDAGISel (LoongArchTargetMachine &TM)

bool	runOnMachineFunction (MachineFunction &MF) override
	runOnMachineFunction - This method must be overloaded to perform the desired machine code transformation or analysis.

void	Select (SDNode *Node) override
	Main hook for targets to transform nodes into machine nodes.

bool	SelectInlineAsmMemoryOperand (const SDValue &Op, InlineAsm::ConstraintCode ConstraintID, std::vector< SDValue > &OutOps) override
	SelectInlineAsmMemoryOperand - Select the specified address as a target addressing mode, according to the specified constraint.

bool	SelectBaseAddr (SDValue Addr, SDValue &Base)

bool	SelectAddrConstant (SDValue Addr, SDValue &Base, SDValue &Offset)

bool	selectNonFIBaseAddr (SDValue Addr, SDValue &Base)

bool	selectShiftMask (SDValue N, unsigned ShiftWidth, SDValue &ShAmt)

bool	selectShiftMaskGRLen (SDValue N, SDValue &ShAmt)

bool	selectShiftMask32 (SDValue N, SDValue &ShAmt)

bool	selectSExti32 (SDValue N, SDValue &Val)

bool	selectZExti32 (SDValue N, SDValue &Val)

bool	selectVSplat (SDNode *N, APInt &Imm, unsigned MinSizeInBits) const

template<unsigned ImmSize, bool IsSigned = false>
bool	selectVSplatImm (SDValue N, SDValue &SplatVal)

bool	selectVSplatUimmInvPow2 (SDValue N, SDValue &SplatImm) const

bool	selectVSplatUimmPow2 (SDValue N, SDValue &SplatImm) const

Public Member Functions inherited from llvm::SelectionDAGISel
	SelectionDAGISel (char &ID, TargetMachine &tm, CodeGenOptLevel OL=CodeGenOptLevel::Default)

	~SelectionDAGISel () override

const TargetLowering *	getTargetLowering () const

void	getAnalysisUsage (AnalysisUsage &AU) const override
	getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.

bool	runOnMachineFunction (MachineFunction &MF) override
	runOnMachineFunction - This method must be overloaded to perform the desired machine code transformation or analysis.

virtual void	emitFunctionEntryCode ()

virtual void	PreprocessISelDAG ()
	PreprocessISelDAG - This hook allows targets to hack on the graph before instruction selection starts.

virtual void	PostprocessISelDAG ()
	PostprocessISelDAG() - This hook allows the target to hack on the graph right after selection.

virtual void	Select (SDNode *N)=0
	Main hook for targets to transform nodes into machine nodes.

virtual bool	SelectInlineAsmMemoryOperand (const SDValue &Op, InlineAsm::ConstraintCode ConstraintID, std::vector< SDValue > &OutOps)
	SelectInlineAsmMemoryOperand - Select the specified address as a target addressing mode, according to the specified constraint.

virtual bool	IsProfitableToFold (SDValue N, SDNode U, SDNode Root) const
	IsProfitableToFold - Returns true if it's profitable to fold the specific operand node N of U during instruction selection that starts at Root.

bool	CheckAndMask (SDValue LHS, ConstantSDNode *RHS, int64_t DesiredMaskS) const
	CheckAndMask - The isel is trying to match something like (and X, 255).

bool	CheckOrMask (SDValue LHS, ConstantSDNode *RHS, int64_t DesiredMaskS) const
	CheckOrMask - The isel is trying to match something like (or X, 255).

virtual bool	CheckPatternPredicate (unsigned PredNo) const
	CheckPatternPredicate - This function is generated by tblgen in the target.

virtual bool	CheckNodePredicate (SDNode *N, unsigned PredNo) const
	CheckNodePredicate - This function is generated by tblgen in the target.

virtual bool	CheckNodePredicateWithOperands (SDNode *N, unsigned PredNo, const SmallVectorImpl< SDValue > &Operands) const
	CheckNodePredicateWithOperands - This function is generated by tblgen in the target.

virtual bool	CheckComplexPattern (SDNode Root, SDNode Parent, SDValue N, unsigned PatternNo, SmallVectorImpl< std::pair< SDValue, SDNode * > > &Result)

virtual SDValue	RunSDNodeXForm (SDValue V, unsigned XFormNo)

void	SelectCodeCommon (SDNode NodeToMatch, const unsigned char MatcherTable, unsigned TableSize)

virtual bool	ComplexPatternFuncMutatesDAG () const
	Return true if complex patterns for this target can mutate the DAG.

bool	mayRaiseFPException (SDNode *Node) const
	Return whether the node may raise an FP exception.

bool	isOrEquivalentToAdd (const SDNode *N) const

Public Member Functions inherited from llvm::MachineFunctionPass
bool	doInitialization (Module &) override
	doInitialization - Virtual method overridden by subclasses to do any necessary initialization before any pass is run.

Public Member Functions inherited from llvm::FunctionPass
	FunctionPass (char &pid)

Pass *	createPrinterPass (raw_ostream &OS, const std::string &Banner) const override
	createPrinterPass - Get a function printer pass.

virtual bool	runOnFunction (Function &F)=0
	runOnFunction - Virtual method overriden by subclasses to do the per-function processing of the pass.

void	assignPassManager (PMStack &PMS, PassManagerType T) override
	Find appropriate Function Pass Manager or Call Graph Pass Manager in the PM Stack and add self into that manager.

PassManagerType	getPotentialPassManagerType () const override
	Return what kind of Pass Manager can manage this pass.

Public Member Functions inherited from llvm::Pass
	Pass (PassKind K, char &pid)

	Pass (const Pass &)=delete

Pass &	operator= (const Pass &)=delete

virtual	~Pass ()

PassKind	getPassKind () const

virtual StringRef	getPassName () const
	getPassName - Return a nice clean name for a pass.

AnalysisID	getPassID () const
	getPassID - Return the PassID number that corresponds to this pass.

virtual bool	doInitialization (Module &)
	doInitialization - Virtual method overridden by subclasses to do any necessary initialization before any pass is run.

virtual bool	doFinalization (Module &)
	doFinalization - Virtual method overriden by subclasses to do any necessary clean up after all passes have run.

virtual void	print (raw_ostream &OS, const Module *M) const
	print - Print out the internal state of the pass.

void	dump () const

virtual Pass *	createPrinterPass (raw_ostream &OS, const std::string &Banner) const =0
	createPrinterPass - Get a Pass appropriate to print the IR this pass operates on (Module, Function or MachineFunction).

virtual void	assignPassManager (PMStack &, PassManagerType)
	Each pass is responsible for assigning a pass manager to itself.

virtual void	preparePassManager (PMStack &)
	Check if available pass managers are suitable for this pass or not.

virtual PassManagerType	getPotentialPassManagerType () const
	Return what kind of Pass Manager can manage this pass.

void	setResolver (AnalysisResolver *AR)

AnalysisResolver *	getResolver () const

virtual void	getAnalysisUsage (AnalysisUsage &) const
	getAnalysisUsage - This function should be overriden by passes that need analysis information to do their job.

virtual void	releaseMemory ()
	releaseMemory() - This member can be implemented by a pass if it wants to be able to release its memory when it is no longer needed.

virtual void *	getAdjustedAnalysisPointer (AnalysisID ID)
	getAdjustedAnalysisPointer - This method is used when a pass implements an analysis interface through multiple inheritance.

virtual ImmutablePass *	getAsImmutablePass ()

virtual PMDataManager *	getAsPMDataManager ()

virtual void	verifyAnalysis () const
	verifyAnalysis() - This member can be implemented by a analysis pass to check state of analysis information.

virtual void	dumpPassStructure (unsigned Offset=0)

template<typename AnalysisType >
AnalysisType *	getAnalysisIfAvailable () const
	getAnalysisIfAvailable<AnalysisType>() - Subclasses use this function to get analysis information that might be around, for example to update it.

bool	mustPreserveAnalysisID (char &AID) const
	mustPreserveAnalysisID - This method serves the same function as getAnalysisIfAvailable, but works if you just have an AnalysisID.

template<typename AnalysisType >
AnalysisType &	getAnalysis () const
	getAnalysis<AnalysisType>() - This function is used by subclasses to get to the analysis information that they claim to use by overriding the getAnalysisUsage function.

template<typename AnalysisType >
AnalysisType &	getAnalysis (Function &F, bool *Changed=nullptr)
	getAnalysis<AnalysisType>() - This function is used by subclasses to get to the analysis information that they claim to use by overriding the getAnalysisUsage function.

template<typename AnalysisType >
AnalysisType &	getAnalysisID (AnalysisID PI) const

template<typename AnalysisType >
AnalysisType &	getAnalysisID (AnalysisID PI, Function &F, bool *Changed=nullptr)

Static Public Attributes
static char	ID

Additional Inherited Members
Public Types inherited from llvm::SelectionDAGISel
enum	BuiltinOpcodes { OPC_Scope , OPC_RecordNode , OPC_RecordChild0 , OPC_RecordChild1 , OPC_RecordChild2 , OPC_RecordChild3 , OPC_RecordChild4 , OPC_RecordChild5 , OPC_RecordChild6 , OPC_RecordChild7 , OPC_RecordMemRef , OPC_CaptureGlueInput , OPC_MoveChild , OPC_MoveChild0 , OPC_MoveChild1 , OPC_MoveChild2 , OPC_MoveChild3 , OPC_MoveChild4 , OPC_MoveChild5 , OPC_MoveChild6 , OPC_MoveChild7 , OPC_MoveParent , OPC_CheckSame , OPC_CheckChild0Same , OPC_CheckChild1Same , OPC_CheckChild2Same , OPC_CheckChild3Same , OPC_CheckPatternPredicate , OPC_CheckPatternPredicate2 , OPC_CheckPredicate , OPC_CheckPredicateWithOperands , OPC_CheckOpcode , OPC_SwitchOpcode , OPC_CheckType , OPC_CheckTypeRes , OPC_SwitchType , OPC_CheckChild0Type , OPC_CheckChild1Type , OPC_CheckChild2Type , OPC_CheckChild3Type , OPC_CheckChild4Type , OPC_CheckChild5Type , OPC_CheckChild6Type , OPC_CheckChild7Type , OPC_CheckInteger , OPC_CheckChild0Integer , OPC_CheckChild1Integer , OPC_CheckChild2Integer , OPC_CheckChild3Integer , OPC_CheckChild4Integer , OPC_CheckCondCode , OPC_CheckChild2CondCode , OPC_CheckValueType , OPC_CheckComplexPat , OPC_CheckAndImm , OPC_CheckOrImm , OPC_CheckImmAllOnesV , OPC_CheckImmAllZerosV , OPC_CheckFoldableChainNode , OPC_EmitInteger , OPC_EmitInteger8 , OPC_EmitInteger16 , OPC_EmitInteger32 , OPC_EmitInteger64 , OPC_EmitStringInteger , OPC_EmitStringInteger32 , OPC_EmitRegister , OPC_EmitRegister2 , OPC_EmitConvertToTarget , OPC_EmitMergeInputChains , OPC_EmitMergeInputChains1_0 , OPC_EmitMergeInputChains1_1 , OPC_EmitMergeInputChains1_2 , OPC_EmitCopyToReg , OPC_EmitCopyToReg2 , OPC_EmitNodeXForm , OPC_EmitNode , OPC_EmitNode0 , OPC_EmitNode1 , OPC_EmitNode2 , OPC_MorphNodeTo , OPC_MorphNodeTo0 , OPC_MorphNodeTo1 , OPC_MorphNodeTo2 , OPC_CompleteMatch , OPC_Coverage }

enum	{ OPFL_None = 0 , OPFL_Chain = 1 , OPFL_GlueInput = 2 , OPFL_GlueOutput = 4 , OPFL_MemRefs = 8 , OPFL_Variadic0 = 1<<4 , OPFL_Variadic1 = 2<<4 , OPFL_Variadic2 = 3<<4 , OPFL_Variadic3 = 4<<4 , OPFL_Variadic4 = 5<<4 , OPFL_Variadic5 = 6<<4 , OPFL_Variadic6 = 7<<4 , OPFL_VariadicInfo = OPFL_Variadic6 }

Static Public Member Functions inherited from llvm::SelectionDAGISel
static bool	IsLegalToFold (SDValue N, SDNode U, SDNode Root, CodeGenOptLevel OptLevel, bool IgnoreChains=false)
	IsLegalToFold - Returns true if the specific operand node N of U can be folded during instruction selection that starts at Root.

static void	InvalidateNodeId (SDNode *N)

static int	getUninvalidatedNodeId (SDNode *N)

static void	EnforceNodeIdInvariant (SDNode *N)

static int	getNumFixedFromVariadicInfo (unsigned Flags)
	getNumFixedFromVariadicInfo - Transform an EmitNode flags word into the number of fixed arity values that should be skipped when copying from the root.

Static Public Member Functions inherited from llvm::Pass
static const PassInfo *	lookupPassInfo (const void *TI)

static const PassInfo *	lookupPassInfo (StringRef Arg)

static Pass *	createPass (AnalysisID ID)

Public Attributes inherited from llvm::SelectionDAGISel
TargetMachine &	TM

const TargetLibraryInfo *	LibInfo

std::unique_ptr< FunctionLoweringInfo >	FuncInfo

SwiftErrorValueTracking *	SwiftError

MachineFunction *	MF

MachineRegisterInfo *	RegInfo

SelectionDAG *	CurDAG

std::unique_ptr< SelectionDAGBuilder >	SDB

AAResults *	AA = nullptr

AssumptionCache *	AC = nullptr

GCFunctionInfo *	GFI = nullptr

CodeGenOptLevel	OptLevel

const TargetInstrInfo *	TII

const TargetLowering *	TLI

bool	FastISelFailed

SmallPtrSet< const Instruction *, 4 >	ElidedArgCopyInstrs

std::unique_ptr< OptimizationRemarkEmitter >	ORE
	Current optimization remark emitter.

bool	MatchFilterFuncName = false
	True if the function currently processing is in the function printing list (i.e.

Protected Member Functions inherited from llvm::SelectionDAGISel
void	ReplaceUses (SDValue F, SDValue T)
	ReplaceUses - replace all uses of the old node F with the use of the new node T.

void	ReplaceUses (const SDValue F, const SDValue T, unsigned Num)
	ReplaceUses - replace all uses of the old nodes F with the use of the new nodes T.

void	ReplaceUses (SDNode F, SDNode T)
	ReplaceUses - replace all uses of the old node F with the use of the new node T.

void	ReplaceNode (SDNode F, SDNode T)
	Replace all uses of `F` with `T`, then remove `F` from the DAG.

void	SelectInlineAsmMemoryOperands (std::vector< SDValue > &Ops, const SDLoc &DL)
	SelectInlineAsmMemoryOperands - Calls to this are automatically generated by tblgen.

virtual StringRef	getPatternForIndex (unsigned index)
	getPatternForIndex - Patterns selected by tablegen during ISEL

virtual StringRef	getIncludePathForIndex (unsigned index)
	getIncludePathForIndex - get the td source location of pattern instantiation

bool	shouldOptForSize (const MachineFunction *MF) const

Protected Member Functions inherited from llvm::MachineFunctionPass
	MachineFunctionPass (char &ID)

virtual bool	runOnMachineFunction (MachineFunction &MF)=0
	runOnMachineFunction - This method must be overloaded to perform the desired machine code transformation or analysis.

void	getAnalysisUsage (AnalysisUsage &AU) const override
	getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.

virtual MachineFunctionProperties	getRequiredProperties () const

virtual MachineFunctionProperties	getSetProperties () const

virtual MachineFunctionProperties	getClearedProperties () const

Protected Member Functions inherited from llvm::FunctionPass
bool	skipFunction (const Function &F) const
	Optional passes call this function to check whether the pass should be skipped.

Protected Attributes inherited from llvm::SelectionDAGISel
unsigned	DAGSize = 0
	DAGSize - Size of DAG being instruction selected.

Detailed Description

Definition at line 23 of file LoongArchISelDAGToDAG.h.

Constructor & Destructor Documentation

◆ LoongArchDAGToDAGISel() [1/2]

llvm::LoongArchDAGToDAGISel::LoongArchDAGToDAGISel ( )

delete

◆ LoongArchDAGToDAGISel() [2/2]

llvm::LoongArchDAGToDAGISel::LoongArchDAGToDAGISel ( LoongArchTargetMachine & TM )

inlineexplicit

Definition at line 31 of file LoongArchISelDAGToDAG.h.

Member Function Documentation

◆ runOnMachineFunction()

bool llvm::LoongArchDAGToDAGISel::runOnMachineFunction ( MachineFunction & MF )

inlineoverridevirtual

runOnMachineFunction - This method must be overloaded to perform the desired machine code transformation or analysis.

Reimplemented from llvm::SelectionDAGISel.

Definition at line 34 of file LoongArchISelDAGToDAG.h.

References llvm::MachineFunction::getSubtarget(), llvm::SelectionDAGISel::MF, and llvm::SelectionDAGISel::runOnMachineFunction().

◆ Select()

void LoongArchDAGToDAGISel::Select ( SDNode * N )

overridevirtual

Main hook for targets to transform nodes into machine nodes.

Implements llvm::SelectionDAGISel.

Definition at line 29 of file LoongArchISelDAGToDAG.cpp.

References llvm::ISD::BITCAST, llvm::ISD::Constant, llvm::dbgs(), DL, llvm::ISD::FrameIndex, llvm::LoongArchMatInt::generateInstSeq(), llvm::MVT::is128BitVector(), llvm::MVT::is512BitVector(), LLVM_DEBUG, and Opcode.

◆ SelectAddrConstant()

bool LoongArchDAGToDAGISel::SelectAddrConstant	(	SDValue	Addr,
		SDValue &	Base,
		SDValue &	Offset
	)

Definition at line 151 of file LoongArchISelDAGToDAG.cpp.

References Addr, llvm::sampleprof::Base, llvm::SelectionDAGISel::CurDAG, DL, llvm::SelectionDAG::getRegister(), llvm::SelectionDAG::getTargetConstant(), and llvm::Offset.

◆ SelectBaseAddr()

bool LoongArchDAGToDAGISel::SelectBaseAddr	(	SDValue	Addr,
		SDValue &	Base
	)

Definition at line 139 of file LoongArchISelDAGToDAG.cpp.

References Addr, llvm::sampleprof::Base, llvm::SelectionDAGISel::CurDAG, llvm::LoongArchSubtarget::getGRLenVT(), and llvm::SelectionDAG::getTargetFrameIndex().

◆ SelectInlineAsmMemoryOperand()

bool LoongArchDAGToDAGISel::SelectInlineAsmMemoryOperand	(	const SDValue &	Op,
		InlineAsm::ConstraintCode	ConstraintID,
		std::vector< SDValue > &	OutOps
	)

overridevirtual

SelectInlineAsmMemoryOperand - Select the specified address as a target addressing mode, according to the specified constraint.

If this does not match or is not implemented, return true. The resultant operands (which will appear in the machine instruction) should be added to the OutOps vector.

Reimplemented from llvm::SelectionDAGISel.

Definition at line 93 of file LoongArchISelDAGToDAG.cpp.

References llvm::sampleprof::Base, llvm::SelectionDAGISel::CurDAG, llvm::LoongArchSubtarget::getGRLenVT(), llvm::ConstantSDNode::getSExtValue(), llvm::SelectionDAG::getTargetConstant(), llvm::ConstantSDNode::getZExtValue(), llvm::isAligned(), llvm::SelectionDAG::isBaseWithConstantOffset(), llvm::isIntN(), llvm::InlineAsm::k, llvm_unreachable, llvm::InlineAsm::m, llvm::Offset, llvm::InlineAsm::ZB, and llvm::InlineAsm::ZC.