LLVM  16.0.0git
SelectionDAGISel.h
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1 //===-- llvm/CodeGen/SelectionDAGISel.h - Common Base Class------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the SelectionDAGISel class, which is used as the common
10 // base class for SelectionDAG-based instruction selectors.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_CODEGEN_SELECTIONDAGISEL_H
15 #define LLVM_CODEGEN_SELECTIONDAGISEL_H
16 
19 #include "llvm/IR/BasicBlock.h"
20 #include <memory>
21 
22 namespace llvm {
23 class AAResults;
24 class AssumptionCache;
25 class TargetInstrInfo;
26 class TargetMachine;
27 class SelectionDAGBuilder;
28 class SDValue;
29 class MachineRegisterInfo;
30 class MachineFunction;
31 class OptimizationRemarkEmitter;
32 class TargetLowering;
33 class TargetLibraryInfo;
34 class FunctionLoweringInfo;
35 class SwiftErrorValueTracking;
36 class GCFunctionInfo;
37 class ScheduleDAGSDNodes;
38 
39 /// SelectionDAGISel - This is the common base class used for SelectionDAG-based
40 /// pattern-matching instruction selectors.
42 public:
45  std::unique_ptr<FunctionLoweringInfo> FuncInfo;
50  std::unique_ptr<SelectionDAGBuilder> SDB;
51  AAResults *AA = nullptr;
52  AssumptionCache *AC = nullptr;
53  GCFunctionInfo *GFI = nullptr;
59  bool UseInstrRefDebugInfo = false;
60 
61  /// Current optimization remark emitter.
62  /// Used to report things like combines and FastISel failures.
63  std::unique_ptr<OptimizationRemarkEmitter> ORE;
64 
65  static char ID;
66 
67  explicit SelectionDAGISel(TargetMachine &tm,
69  ~SelectionDAGISel() override;
70 
71  const TargetLowering *getTargetLowering() const { return TLI; }
72 
73  void getAnalysisUsage(AnalysisUsage &AU) const override;
74 
75  bool runOnMachineFunction(MachineFunction &MF) override;
76 
77  virtual void emitFunctionEntryCode() {}
78 
79  /// PreprocessISelDAG - This hook allows targets to hack on the graph before
80  /// instruction selection starts.
81  virtual void PreprocessISelDAG() {}
82 
83  /// PostprocessISelDAG() - This hook allows the target to hack on the graph
84  /// right after selection.
85  virtual void PostprocessISelDAG() {}
86 
87  /// Main hook for targets to transform nodes into machine nodes.
88  virtual void Select(SDNode *N) = 0;
89 
90  /// SelectInlineAsmMemoryOperand - Select the specified address as a target
91  /// addressing mode, according to the specified constraint. If this does
92  /// not match or is not implemented, return true. The resultant operands
93  /// (which will appear in the machine instruction) should be added to the
94  /// OutOps vector.
96  unsigned ConstraintID,
97  std::vector<SDValue> &OutOps) {
98  return true;
99  }
100 
101  /// IsProfitableToFold - Returns true if it's profitable to fold the specific
102  /// operand node N of U during instruction selection that starts at Root.
103  virtual bool IsProfitableToFold(SDValue N, SDNode *U, SDNode *Root) const;
104 
105  /// IsLegalToFold - Returns true if the specific operand node N of
106  /// U can be folded during instruction selection that starts at Root.
107  /// FIXME: This is a static member function because the MSP430/X86
108  /// targets, which uses it during isel. This could become a proper member.
109  static bool IsLegalToFold(SDValue N, SDNode *U, SDNode *Root,
111  bool IgnoreChains = false);
112 
113  static void InvalidateNodeId(SDNode *N);
114  static int getUninvalidatedNodeId(SDNode *N);
115 
116  static void EnforceNodeIdInvariant(SDNode *N);
117 
118  // Opcodes used by the DAG state machine:
154 
168  // Space-optimized forms that implicitly encode number of result VTs.
171  // Space-optimized forms that implicitly encode number of result VTs.
174  // Contains offset in table for pattern being selected
176  };
177 
178  enum {
179  OPFL_None = 0, // Node has no chain or glue input and isn't variadic.
180  OPFL_Chain = 1, // Node has a chain input.
181  OPFL_GlueInput = 2, // Node has a glue input.
182  OPFL_GlueOutput = 4, // Node has a glue output.
183  OPFL_MemRefs = 8, // Node gets accumulated MemRefs.
184  OPFL_Variadic0 = 1<<4, // Node is variadic, root has 0 fixed inputs.
185  OPFL_Variadic1 = 2<<4, // Node is variadic, root has 1 fixed inputs.
186  OPFL_Variadic2 = 3<<4, // Node is variadic, root has 2 fixed inputs.
187  OPFL_Variadic3 = 4<<4, // Node is variadic, root has 3 fixed inputs.
188  OPFL_Variadic4 = 5<<4, // Node is variadic, root has 4 fixed inputs.
189  OPFL_Variadic5 = 6<<4, // Node is variadic, root has 5 fixed inputs.
190  OPFL_Variadic6 = 7<<4, // Node is variadic, root has 6 fixed inputs.
191 
193  };
194 
195  /// getNumFixedFromVariadicInfo - Transform an EmitNode flags word into the
196  /// number of fixed arity values that should be skipped when copying from the
197  /// root.
198  static inline int getNumFixedFromVariadicInfo(unsigned Flags) {
199  return ((Flags&OPFL_VariadicInfo) >> 4)-1;
200  }
201 
202 
203 protected:
204  /// DAGSize - Size of DAG being instruction selected.
205  ///
206  unsigned DAGSize = 0;
207 
208  /// ReplaceUses - replace all uses of the old node F with the use
209  /// of the new node T.
212  EnforceNodeIdInvariant(T.getNode());
213  }
214 
215  /// ReplaceUses - replace all uses of the old nodes F with the use
216  /// of the new nodes T.
217  void ReplaceUses(const SDValue *F, const SDValue *T, unsigned Num) {
219  for (unsigned i = 0; i < Num; ++i)
220  EnforceNodeIdInvariant(T[i].getNode());
221  }
222 
223  /// ReplaceUses - replace all uses of the old node F with the use
224  /// of the new node T.
225  void ReplaceUses(SDNode *F, SDNode *T) {
228  }
229 
230  /// Replace all uses of \c F with \c T, then remove \c F from the DAG.
231  void ReplaceNode(SDNode *F, SDNode *T) {
235  }
236 
237  /// SelectInlineAsmMemoryOperands - Calls to this are automatically generated
238  /// by tblgen. Others should not call it.
239  void SelectInlineAsmMemoryOperands(std::vector<SDValue> &Ops,
240  const SDLoc &DL);
241 
242  /// getPatternForIndex - Patterns selected by tablegen during ISEL
243  virtual StringRef getPatternForIndex(unsigned index) {
244  llvm_unreachable("Tblgen should generate the implementation of this!");
245  }
246 
247  /// getIncludePathForIndex - get the td source location of pattern instantiation
249  llvm_unreachable("Tblgen should generate the implementation of this!");
250  }
251 
252  bool shouldOptForSize(const MachineFunction *MF) const {
253  return CurDAG->shouldOptForSize();
254  }
255 
256 public:
257  // Calls to these predicates are generated by tblgen.
259  int64_t DesiredMaskS) const;
261  int64_t DesiredMaskS) const;
262 
263 
264  /// CheckPatternPredicate - This function is generated by tblgen in the
265  /// target. It runs the specified pattern predicate and returns true if it
266  /// succeeds or false if it fails. The number is a private implementation
267  /// detail to the code tblgen produces.
268  virtual bool CheckPatternPredicate(unsigned PredNo) const {
269  llvm_unreachable("Tblgen should generate the implementation of this!");
270  }
271 
272  /// CheckNodePredicate - This function is generated by tblgen in the target.
273  /// It runs node predicate number PredNo and returns true if it succeeds or
274  /// false if it fails. The number is a private implementation
275  /// detail to the code tblgen produces.
276  virtual bool CheckNodePredicate(SDNode *N, unsigned PredNo) const {
277  llvm_unreachable("Tblgen should generate the implementation of this!");
278  }
279 
280  /// CheckNodePredicateWithOperands - This function is generated by tblgen in
281  /// the target.
282  /// It runs node predicate number PredNo and returns true if it succeeds or
283  /// false if it fails. The number is a private implementation detail to the
284  /// code tblgen produces.
286  SDNode *N, unsigned PredNo,
287  const SmallVectorImpl<SDValue> &Operands) const {
288  llvm_unreachable("Tblgen should generate the implementation of this!");
289  }
290 
291  virtual bool CheckComplexPattern(SDNode *Root, SDNode *Parent, SDValue N,
292  unsigned PatternNo,
293  SmallVectorImpl<std::pair<SDValue, SDNode*> > &Result) {
294  llvm_unreachable("Tblgen should generate the implementation of this!");
295  }
296 
297  virtual SDValue RunSDNodeXForm(SDValue V, unsigned XFormNo) {
298  llvm_unreachable("Tblgen should generate this!");
299  }
300 
301  void SelectCodeCommon(SDNode *NodeToMatch, const unsigned char *MatcherTable,
302  unsigned TableSize);
303 
304  /// Return true if complex patterns for this target can mutate the
305  /// DAG.
306  virtual bool ComplexPatternFuncMutatesDAG() const {
307  return false;
308  }
309 
310  /// Return whether the node may raise an FP exception.
311  bool mayRaiseFPException(SDNode *Node) const;
312 
313  bool isOrEquivalentToAdd(const SDNode *N) const;
314 
315 private:
316 
317  // Calls to these functions are generated by tblgen.
318  void Select_INLINEASM(SDNode *N);
319  void Select_READ_REGISTER(SDNode *Op);
320  void Select_WRITE_REGISTER(SDNode *Op);
321  void Select_UNDEF(SDNode *N);
322  void CannotYetSelect(SDNode *N);
323 
324  void Select_FREEZE(SDNode *N);
325  void Select_ARITH_FENCE(SDNode *N);
326 
327  void pushStackMapLiveVariable(SmallVectorImpl<SDValue> &Ops, SDValue Operand,
328  SDLoc DL);
329  void Select_STACKMAP(SDNode *N);
330  void Select_PATCHPOINT(SDNode *N);
331 
332 private:
333  void DoInstructionSelection();
334  SDNode *MorphNode(SDNode *Node, unsigned TargetOpc, SDVTList VTList,
335  ArrayRef<SDValue> Ops, unsigned EmitNodeInfo);
336 
337  /// Prepares the landing pad to take incoming values or do other EH
338  /// personality specific tasks. Returns true if the block should be
339  /// instruction selected, false if no code should be emitted for it.
340  bool PrepareEHLandingPad();
341 
342  /// Perform instruction selection on all basic blocks in the function.
343  void SelectAllBasicBlocks(const Function &Fn);
344 
345  /// Perform instruction selection on a single basic block, for
346  /// instructions between \p Begin and \p End. \p HadTailCall will be set
347  /// to true if a call in the block was translated as a tail call.
348  void SelectBasicBlock(BasicBlock::const_iterator Begin,
350  bool &HadTailCall);
351  void FinishBasicBlock();
352 
353  void CodeGenAndEmitDAG();
354 
355  /// Generate instructions for lowering the incoming arguments of the
356  /// given function.
357  void LowerArguments(const Function &F);
358 
359  void ComputeLiveOutVRegInfo();
360 
361  /// Create the scheduler. If a specific scheduler was specified
362  /// via the SchedulerRegistry, use it, otherwise select the
363  /// one preferred by the target.
364  ///
365  ScheduleDAGSDNodes *CreateScheduler();
366 
367  /// OpcodeOffset - This is a cache used to dispatch efficiently into isel
368  /// state machines that start with a OPC_SwitchOpcode node.
369  std::vector<unsigned> OpcodeOffset;
370 
371  void UpdateChains(SDNode *NodeToMatch, SDValue InputChain,
372  SmallVectorImpl<SDNode *> &ChainNodesMatched,
373  bool isMorphNodeTo);
374 };
375 
376 }
377 
378 #endif /* LLVM_CODEGEN_SELECTIONDAGISEL_H */
llvm::SelectionDAGISel::OPC_MoveChild2
@ OPC_MoveChild2
Definition: SelectionDAGISel.h:127
i
i
Definition: README.txt:29
llvm::SelectionDAGISel::FastISelFailed
bool FastISelFailed
Definition: SelectionDAGISel.h:57
llvm::ConstantSDNode
Definition: SelectionDAGNodes.h:1581
llvm::SelectionDAGISel::OPC_CheckComplexPat
@ OPC_CheckComplexPat
Definition: SelectionDAGISel.h:149
llvm::SelectionDAGISel::OPC_EmitInteger
@ OPC_EmitInteger
Definition: SelectionDAGISel.h:155
llvm::SelectionDAGISel::getTargetLowering
const TargetLowering * getTargetLowering() const
Definition: SelectionDAGISel.h:71
llvm::SelectionDAGISel::OPC_CheckChild2Integer
@ OPC_CheckChild2Integer
Definition: SelectionDAGISel.h:145
llvm::SelectionDAGISel::UseInstrRefDebugInfo
bool UseInstrRefDebugInfo
Definition: SelectionDAGISel.h:59
llvm::SelectionDAGISel::TLI
const TargetLowering * TLI
Definition: SelectionDAGISel.h:56
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
llvm::SelectionDAGISel::getIncludePathForIndex
virtual StringRef getIncludePathForIndex(unsigned index)
getIncludePathForIndex - get the td source location of pattern instantiation
Definition: SelectionDAGISel.h:248
llvm::SelectionDAGISel::TM
TargetMachine & TM
Definition: SelectionDAGISel.h:43
llvm::SelectionDAGISel::isOrEquivalentToAdd
bool isOrEquivalentToAdd(const SDNode *N) const
Definition: SelectionDAGISel.cpp:3738
llvm::ScheduleDAGSDNodes
ScheduleDAGSDNodes - A ScheduleDAG for scheduling SDNode-based DAGs.
Definition: ScheduleDAGSDNodes.h:46
llvm::SelectionDAGISel::OPFL_GlueOutput
@ OPFL_GlueOutput
Definition: SelectionDAGISel.h:182
llvm::SDLoc
Wrapper class for IR location info (IR ordering and DebugLoc) to be passed into SDNode creation funct...
Definition: SelectionDAGNodes.h:1103
llvm::SelectionDAGISel::OPC_EmitMergeInputChains1_2
@ OPC_EmitMergeInputChains1_2
Definition: SelectionDAGISel.h:163
llvm::SelectionDAGISel::EnforceNodeIdInvariant
static void EnforceNodeIdInvariant(SDNode *N)
Definition: SelectionDAGISel.cpp:1036
llvm::SelectionDAGISel::CheckComplexPattern
virtual bool CheckComplexPattern(SDNode *Root, SDNode *Parent, SDValue N, unsigned PatternNo, SmallVectorImpl< std::pair< SDValue, SDNode * > > &Result)
Definition: SelectionDAGISel.h:291
llvm::SelectionDAGISel::OPC_RecordChild7
@ OPC_RecordChild7
Definition: SelectionDAGISel.h:123
llvm::SelectionDAGISel::PostprocessISelDAG
virtual void PostprocessISelDAG()
PostprocessISelDAG() - This hook allows the target to hack on the graph right after selection.
Definition: SelectionDAGISel.h:85
llvm::SelectionDAGISel::DAGSize
unsigned DAGSize
DAGSize - Size of DAG being instruction selected.
Definition: SelectionDAGISel.h:206
llvm::MachineRegisterInfo
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Definition: MachineRegisterInfo.h:50
llvm::SelectionDAGISel::OPC_EmitNode
@ OPC_EmitNode
Definition: SelectionDAGISel.h:167
llvm::Function
Definition: Function.h:60
llvm::SelectionDAGISel::emitFunctionEntryCode
virtual void emitFunctionEntryCode()
Definition: SelectionDAGISel.h:77
llvm::SelectionDAGISel::SelectInlineAsmMemoryOperands
void SelectInlineAsmMemoryOperands(std::vector< SDValue > &Ops, const SDLoc &DL)
SelectInlineAsmMemoryOperands - Calls to this are automatically generated by tblgen.
Definition: SelectionDAGISel.cpp:1956
llvm::SelectionDAGISel::OPFL_Variadic0
@ OPFL_Variadic0
Definition: SelectionDAGISel.h:184
llvm::SelectionDAGISel::OPC_CheckOrImm
@ OPC_CheckOrImm
Definition: SelectionDAGISel.h:150
llvm::SelectionDAGISel::OPC_RecordChild3
@ OPC_RecordChild3
Definition: SelectionDAGISel.h:122
llvm::SelectionDAGISel::AC
AssumptionCache * AC
Definition: SelectionDAGISel.h:52
llvm::SelectionDAGISel::OPC_EmitNode1
@ OPC_EmitNode1
Definition: SelectionDAGISel.h:169
llvm::SelectionDAGISel::OPC_CheckChild1Integer
@ OPC_CheckChild1Integer
Definition: SelectionDAGISel.h:145
llvm::SelectionDAGISel::OPC_CheckFoldableChainNode
@ OPC_CheckFoldableChainNode
Definition: SelectionDAGISel.h:153
llvm::MachineFunctionPass
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
Definition: MachineFunctionPass.h:30
llvm::SelectionDAGISel::OPC_CheckChild1Same
@ OPC_CheckChild1Same
Definition: SelectionDAGISel.h:131
llvm::GCFunctionInfo
Garbage collection metadata for a single function.
Definition: GCMetadata.h:77
llvm::SDNode
Represents one node in the SelectionDAG.
Definition: SelectionDAGNodes.h:462
llvm::SelectionDAG::ReplaceAllUsesWith
void ReplaceAllUsesWith(SDValue From, SDValue To)
Modify anything using 'From' to use 'To' instead.
Definition: SelectionDAG.cpp:10176
llvm::SelectionDAGISel::OPFL_Variadic2
@ OPFL_Variadic2
Definition: SelectionDAGISel.h:186
llvm::SelectionDAGISel::OPC_MorphNodeTo2
@ OPC_MorphNodeTo2
Definition: SelectionDAGISel.h:172
llvm::SelectionDAGISel::OPC_MoveChild7
@ OPC_MoveChild7
Definition: SelectionDAGISel.h:128
llvm::SelectionDAGISel::CheckPatternPredicate
virtual bool CheckPatternPredicate(unsigned PredNo) const
CheckPatternPredicate - This function is generated by tblgen in the target.
Definition: SelectionDAGISel.h:268
llvm::SelectionDAGISel::OPC_CaptureGlueInput
@ OPC_CaptureGlueInput
Definition: SelectionDAGISel.h:125
llvm::SelectionDAGISel::OPC_EmitNodeXForm
@ OPC_EmitNodeXForm
Definition: SelectionDAGISel.h:166
llvm::SelectionDAGISel::OPC_CheckChild0Same
@ OPC_CheckChild0Same
Definition: SelectionDAGISel.h:131
T
#define T
Definition: Mips16ISelLowering.cpp:341
llvm::SelectionDAGISel::OPC_CheckPredicate
@ OPC_CheckPredicate
Definition: SelectionDAGISel.h:134
llvm::SmallPtrSet
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
Definition: SmallPtrSet.h:450
llvm::SelectionDAGISel::OPC_Coverage
@ OPC_Coverage
Definition: SelectionDAGISel.h:175
RHS
Value * RHS
Definition: X86PartialReduction.cpp:76
llvm::SelectionDAGISel::OPC_CheckAndImm
@ OPC_CheckAndImm
Definition: SelectionDAGISel.h:150
llvm::SelectionDAGISel::OPC_EmitCopyToReg
@ OPC_EmitCopyToReg
Definition: SelectionDAGISel.h:164
llvm::SelectionDAGISel::OPC_SwitchType
@ OPC_SwitchType
Definition: SelectionDAGISel.h:140
llvm::SelectionDAGISel::OPC_CheckChild0Type
@ OPC_CheckChild0Type
Definition: SelectionDAGISel.h:141
llvm::SelectionDAGISel::OPFL_Variadic6
@ OPFL_Variadic6
Definition: SelectionDAGISel.h:190
llvm::SelectionDAGISel::OPFL_VariadicInfo
@ OPFL_VariadicInfo
Definition: SelectionDAGISel.h:192
llvm::SelectionDAGISel::OPC_CheckCondCode
@ OPC_CheckCondCode
Definition: SelectionDAGISel.h:147
SelectionDAG.h
llvm::SelectionDAGISel::OPC_CheckChild7Type
@ OPC_CheckChild7Type
Definition: SelectionDAGISel.h:143
llvm::SelectionDAGISel::OPC_CheckChild1Type
@ OPC_CheckChild1Type
Definition: SelectionDAGISel.h:141
llvm::SelectionDAGISel::OPC_EmitStringInteger
@ OPC_EmitStringInteger
Definition: SelectionDAGISel.h:156
llvm::SelectionDAG::ReplaceAllUsesOfValuesWith
void ReplaceAllUsesOfValuesWith(const SDValue *From, const SDValue *To, unsigned Num)
Like ReplaceAllUsesOfValueWith, but for multiple values at once.
Definition: SelectionDAG.cpp:10495
F
#define F(x, y, z)
Definition: MD5.cpp:55
llvm::SelectionDAGISel::OPFL_Variadic1
@ OPFL_Variadic1
Definition: SelectionDAGISel.h:185
llvm::SelectionDAGISel::PreprocessISelDAG
virtual void PreprocessISelDAG()
PreprocessISelDAG - This hook allows targets to hack on the graph before instruction selection starts...
Definition: SelectionDAGISel.h:81
llvm::SelectionDAGISel::OPC_EmitMergeInputChains1_0
@ OPC_EmitMergeInputChains1_0
Definition: SelectionDAGISel.h:161
llvm::SelectionDAGISel::ElidedArgCopyInstrs
SmallPtrSet< const Instruction *, 4 > ElidedArgCopyInstrs
Definition: SelectionDAGISel.h:58
llvm::SelectionDAGISel::OPC_MoveChild5
@ OPC_MoveChild5
Definition: SelectionDAGISel.h:128
LHS
Value * LHS
Definition: X86PartialReduction.cpp:75
llvm::SelectionDAGISel::OPFL_GlueInput
@ OPFL_GlueInput
Definition: SelectionDAGISel.h:181
llvm::SelectionDAGISel::OPC_RecordChild6
@ OPC_RecordChild6
Definition: SelectionDAGISel.h:123
llvm::TargetInstrInfo
TargetInstrInfo - Interface to description of machine instruction set.
Definition: TargetInstrInfo.h:98
llvm::SelectionDAGISel::OPC_RecordChild1
@ OPC_RecordChild1
Definition: SelectionDAGISel.h:122
llvm::SelectionDAGISel::OPC_EmitNode0
@ OPC_EmitNode0
Definition: SelectionDAGISel.h:169
llvm::SelectionDAG
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
Definition: SelectionDAG.h:220
llvm::SelectionDAGISel::RunSDNodeXForm
virtual SDValue RunSDNodeXForm(SDValue V, unsigned XFormNo)
Definition: SelectionDAGISel.h:297
llvm::SelectionDAGISel::SDB
std::unique_ptr< SelectionDAGBuilder > SDB
Definition: SelectionDAGISel.h:50
llvm::SelectionDAGISel::OPC_CheckOpcode
@ OPC_CheckOpcode
Definition: SelectionDAGISel.h:136
llvm::AAResults
Definition: AliasAnalysis.h:518
llvm::SelectionDAGISel::OPC_CheckPatternPredicate
@ OPC_CheckPatternPredicate
Definition: SelectionDAGISel.h:133
llvm::SelectionDAGISel::ReplaceUses
void ReplaceUses(SDNode *F, SDNode *T)
ReplaceUses - replace all uses of the old node F with the use of the new node T.
Definition: SelectionDAGISel.h:225
llvm::SelectionDAGISel::OPC_MoveChild
@ OPC_MoveChild
Definition: SelectionDAGISel.h:126
llvm::SelectionDAGISel::RegInfo
MachineRegisterInfo * RegInfo
Definition: SelectionDAGISel.h:48
llvm::SelectionDAGISel::OptLevel
CodeGenOpt::Level OptLevel
Definition: SelectionDAGISel.h:54
llvm::SelectionDAGISel::CheckNodePredicate
virtual bool CheckNodePredicate(SDNode *N, unsigned PredNo) const
CheckNodePredicate - This function is generated by tblgen in the target.
Definition: SelectionDAGISel.h:276
llvm::TargetLowering
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
Definition: TargetLowering.h:3434
llvm::SelectionDAGISel::ComplexPatternFuncMutatesDAG
virtual bool ComplexPatternFuncMutatesDAG() const
Return true if complex patterns for this target can mutate the DAG.
Definition: SelectionDAGISel.h:306
llvm::AnalysisUsage
Represent the analysis usage information of a pass.
Definition: PassAnalysisSupport.h:47
llvm::SelectionDAGISel::ReplaceNode
void ReplaceNode(SDNode *F, SDNode *T)
Replace all uses of F with T, then remove F from the DAG.
Definition: SelectionDAGISel.h:231
llvm::SelectionDAGISel::ORE
std::unique_ptr< OptimizationRemarkEmitter > ORE
Current optimization remark emitter.
Definition: SelectionDAGISel.h:63
llvm::SelectionDAGISel::OPC_MorphNodeTo1
@ OPC_MorphNodeTo1
Definition: SelectionDAGISel.h:172
llvm::SelectionDAGISel::ID
static char ID
Definition: SelectionDAGISel.h:65
llvm::SelectionDAGISel::OPC_CheckSame
@ OPC_CheckSame
Definition: SelectionDAGISel.h:130
Operands
mir Rename Register Operands
Definition: MIRNamerPass.cpp:74
llvm::SelectionDAGISel::OPFL_None
@ OPFL_None
Definition: SelectionDAGISel.h:179
llvm::SelectionDAGISel::InvalidateNodeId
static void InvalidateNodeId(SDNode *N)
Definition: SelectionDAGISel.cpp:1055
llvm::SelectionDAGISel::OPFL_MemRefs
@ OPFL_MemRefs
Definition: SelectionDAGISel.h:183
BasicBlock.h
llvm::SelectionDAGISel::OPC_CheckChild4Integer
@ OPC_CheckChild4Integer
Definition: SelectionDAGISel.h:146
llvm::SelectionDAGISel::OPC_CheckValueType
@ OPC_CheckValueType
Definition: SelectionDAGISel.h:148
llvm::SelectionDAG::RemoveDeadNode
void RemoveDeadNode(SDNode *N)
Remove the specified node from the system.
Definition: SelectionDAG.cpp:984
llvm::SelectionDAGISel::OPC_CheckImmAllZerosV
@ OPC_CheckImmAllZerosV
Definition: SelectionDAGISel.h:152
llvm::CodeGenOpt::Default
@ Default
Definition: CodeGen.h:55
llvm::SelectionDAGISel::OPC_CheckInteger
@ OPC_CheckInteger
Definition: SelectionDAGISel.h:144
llvm::SelectionDAGISel::IsProfitableToFold
virtual bool IsProfitableToFold(SDValue N, SDNode *U, SDNode *Root) const
IsProfitableToFold - Returns true if it's profitable to fold the specific operand node N of U during ...
Definition: SelectionDAGISel.cpp:2069
index
splat index
Definition: README_ALTIVEC.txt:181
llvm::SelectionDAGISel::OPC_RecordMemRef
@ OPC_RecordMemRef
Definition: SelectionDAGISel.h:124
llvm::SelectionDAGISel::getAnalysisUsage
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
Definition: SelectionDAGISel.cpp:332
llvm::SelectionDAGISel::TII
const TargetInstrInfo * TII
Definition: SelectionDAGISel.h:55
llvm::SelectionDAGISel::OPC_RecordChild0
@ OPC_RecordChild0
Definition: SelectionDAGISel.h:122
llvm::SelectionDAGISel::FuncInfo
std::unique_ptr< FunctionLoweringInfo > FuncInfo
Definition: SelectionDAGISel.h:45
llvm::SelectionDAGISel::IsLegalToFold
static bool IsLegalToFold(SDValue N, SDNode *U, SDNode *Root, CodeGenOpt::Level OptLevel, bool IgnoreChains=false)
IsLegalToFold - Returns true if the specific operand node N of U can be folded during instruction sel...
Definition: SelectionDAGISel.cpp:2077
llvm::SelectionDAGISel::mayRaiseFPException
bool mayRaiseFPException(SDNode *Node) const
Return whether the node may raise an FP exception.
Definition: SelectionDAGISel.cpp:3724
llvm::SelectionDAGISel::OPC_CheckChild2Same
@ OPC_CheckChild2Same
Definition: SelectionDAGISel.h:132
llvm::SelectionDAG::shouldOptForSize
bool shouldOptForSize() const
Definition: SelectionDAG.cpp:1297
llvm::SwiftErrorValueTracking
Definition: SwiftErrorValueTracking.h:34
llvm::SelectionDAGISel::OPC_CheckChild4Type
@ OPC_CheckChild4Type
Definition: SelectionDAGISel.h:142
llvm::SelectionDAGISel::OPFL_Chain
@ OPFL_Chain
Definition: SelectionDAGISel.h:180
llvm::SelectionDAGISel::getPatternForIndex
virtual StringRef getPatternForIndex(unsigned index)
getPatternForIndex - Patterns selected by tablegen during ISEL
Definition: SelectionDAGISel.h:243
MachineFunctionPass.h
llvm::SelectionDAGISel::OPC_CheckImmAllOnesV
@ OPC_CheckImmAllOnesV
Definition: SelectionDAGISel.h:151
llvm::SelectionDAGISel::OPC_SwitchOpcode
@ OPC_SwitchOpcode
Definition: SelectionDAGISel.h:137
llvm::SelectionDAGISel::OPC_CheckChild3Integer
@ OPC_CheckChild3Integer
Definition: SelectionDAGISel.h:146
llvm::SelectionDAGISel::CheckOrMask
bool CheckOrMask(SDValue LHS, ConstantSDNode *RHS, int64_t DesiredMaskS) const
CheckOrMask - The isel is trying to match something like (or X, 255).
Definition: SelectionDAGISel.cpp:1926
llvm::TargetMachine
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:77
llvm::SelectionDAGISel::~SelectionDAGISel
~SelectionDAGISel() override
Definition: SelectionDAGISel.cpp:327
llvm::SelectionDAGISel::OPC_EmitMergeInputChains
@ OPC_EmitMergeInputChains
Definition: SelectionDAGISel.h:160
llvm::SelectionDAGISel::CurDAG
SelectionDAG * CurDAG
Definition: SelectionDAGISel.h:49
llvm::SelectionDAGISel::getUninvalidatedNodeId
static int getUninvalidatedNodeId(SDNode *N)
Definition: SelectionDAGISel.cpp:1061
llvm::SelectionDAGISel::SelectionDAGISel
SelectionDAGISel(TargetMachine &tm, CodeGenOpt::Level OL=CodeGenOpt::Default)
Definition: SelectionDAGISel.cpp:313
llvm::SelectionDAGISel::OPC_CheckPredicateWithOperands
@ OPC_CheckPredicateWithOperands
Definition: SelectionDAGISel.h:135
llvm::MachineFunction
Definition: MachineFunction.h:257
llvm::SelectionDAGISel::CheckNodePredicateWithOperands
virtual bool CheckNodePredicateWithOperands(SDNode *N, unsigned PredNo, const SmallVectorImpl< SDValue > &Operands) const
CheckNodePredicateWithOperands - This function is generated by tblgen in the target.
Definition: SelectionDAGISel.h:285
llvm::ArrayRef
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: APInt.h:32
llvm::SelectionDAGISel::OPC_CheckChild3Type
@ OPC_CheckChild3Type
Definition: SelectionDAGISel.h:142
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
llvm::SelectionDAGISel::SelectInlineAsmMemoryOperand
virtual bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, std::vector< SDValue > &OutOps)
SelectInlineAsmMemoryOperand - Select the specified address as a target addressing mode,...
Definition: SelectionDAGISel.h:95
llvm::AssumptionCache
A cache of @llvm.assume calls within a function.
Definition: AssumptionCache.h:42
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:143
llvm::SelectionDAG::ReplaceAllUsesOfValueWith
void ReplaceAllUsesOfValueWith(SDValue From, SDValue To)
Replace any uses of From with To, leaving uses of other values produced by From.getNode() alone.
Definition: SelectionDAG.cpp:10337
DL
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Definition: AArch64SLSHardening.cpp:76
llvm::SelectionDAGISel::OPC_MoveChild3
@ OPC_MoveChild3
Definition: SelectionDAGISel.h:127
llvm::SelectionDAGISel::OPC_MoveChild6
@ OPC_MoveChild6
Definition: SelectionDAGISel.h:128
Node
Definition: ItaniumDemangle.h:155
llvm::CodeGenOpt::Level
Level
Definition: CodeGen.h:52
llvm::SelectionDAGISel::OPC_EmitNode2
@ OPC_EmitNode2
Definition: SelectionDAGISel.h:169
llvm::SDVTList
This represents a list of ValueType's that has been intern'd by a SelectionDAG.
Definition: SelectionDAGNodes.h:79
llvm::SelectionDAGISel::SwiftError
SwiftErrorValueTracking * SwiftError
Definition: SelectionDAGISel.h:46
llvm::SelectionDAGISel::OPC_CheckChild3Same
@ OPC_CheckChild3Same
Definition: SelectionDAGISel.h:132
llvm::SelectionDAGISel::ReplaceUses
void ReplaceUses(const SDValue *F, const SDValue *T, unsigned Num)
ReplaceUses - replace all uses of the old nodes F with the use of the new nodes T.
Definition: SelectionDAGISel.h:217
llvm::SelectionDAGISel::BuiltinOpcodes
BuiltinOpcodes
Definition: SelectionDAGISel.h:119
llvm::SelectionDAGISel::MF
MachineFunction * MF
Definition: SelectionDAGISel.h:47
llvm::SelectionDAGISel::shouldOptForSize
bool shouldOptForSize(const MachineFunction *MF) const
Definition: SelectionDAGISel.h:252
llvm::SelectionDAGISel::OPC_EmitMergeInputChains1_1
@ OPC_EmitMergeInputChains1_1
Definition: SelectionDAGISel.h:162
llvm::SelectionDAGISel::OPC_RecordChild2
@ OPC_RecordChild2
Definition: SelectionDAGISel.h:122
llvm::SelectionDAGISel::OPFL_Variadic5
@ OPFL_Variadic5
Definition: SelectionDAGISel.h:189
llvm::AMDGPU::SendMsg::Op
Op
Definition: SIDefines.h:348
llvm::SelectionDAGISel::getNumFixedFromVariadicInfo
static int getNumFixedFromVariadicInfo(unsigned Flags)
getNumFixedFromVariadicInfo - Transform an EmitNode flags word into the number of fixed arity values ...
Definition: SelectionDAGISel.h:198
llvm::SelectionDAGISel::ReplaceUses
void ReplaceUses(SDValue F, SDValue T)
ReplaceUses - replace all uses of the old node F with the use of the new node T.
Definition: SelectionDAGISel.h:210
llvm::SelectionDAGISel::OPC_CompleteMatch
@ OPC_CompleteMatch
Definition: SelectionDAGISel.h:173
llvm::SelectionDAGISel::OPC_CheckChild6Type
@ OPC_CheckChild6Type
Definition: SelectionDAGISel.h:143
llvm::TargetLibraryInfo
Provides information about what library functions are available for the current target.
Definition: TargetLibraryInfo.h:222
llvm::SDValue
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
Definition: SelectionDAGNodes.h:145
llvm::SelectionDAGISel::GFI
GCFunctionInfo * GFI
Definition: SelectionDAGISel.h:53
llvm::SelectionDAGISel::OPC_EmitRegister2
@ OPC_EmitRegister2
Definition: SelectionDAGISel.h:158
llvm::SelectionDAGISel::OPC_CheckChild2Type
@ OPC_CheckChild2Type
Definition: SelectionDAGISel.h:141
llvm::SelectionDAGISel::OPC_EmitConvertToTarget
@ OPC_EmitConvertToTarget
Definition: SelectionDAGISel.h:159
AA
llvm::SelectionDAGISel::OPC_MoveChild0
@ OPC_MoveChild0
Definition: SelectionDAGISel.h:127
llvm::SelectionDAGISel::LibInfo
const TargetLibraryInfo * LibInfo
Definition: SelectionDAGISel.h:44
llvm::SelectionDAGISel
SelectionDAGISel - This is the common base class used for SelectionDAG-based pattern-matching instruc...
Definition: SelectionDAGISel.h:41
llvm::SelectionDAGISel::OPC_CheckChild2CondCode
@ OPC_CheckChild2CondCode
Definition: SelectionDAGISel.h:147
llvm::SelectionDAGISel::OPC_RecordNode
@ OPC_RecordNode
Definition: SelectionDAGISel.h:121
N
#define N
llvm::SelectionDAGISel::OPC_MorphNodeTo
@ OPC_MorphNodeTo
Definition: SelectionDAGISel.h:170
llvm::SelectionDAGISel::OPC_CheckTypeRes
@ OPC_CheckTypeRes
Definition: SelectionDAGISel.h:139
llvm::SelectionDAGISel::OPC_MoveParent
@ OPC_MoveParent
Definition: SelectionDAGISel.h:129
llvm::SmallVectorImpl
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:42
llvm::SelectionDAGISel::OPFL_Variadic3
@ OPFL_Variadic3
Definition: SelectionDAGISel.h:187
llvm::SelectionDAGISel::SelectCodeCommon
void SelectCodeCommon(SDNode *NodeToMatch, const unsigned char *MatcherTable, unsigned TableSize)
Definition: SelectionDAGISel.cpp:2804
llvm::SelectionDAGISel::OPC_MorphNodeTo0
@ OPC_MorphNodeTo0
Definition: SelectionDAGISel.h:172
llvm::SelectionDAGISel::OPC_CheckChild5Type
@ OPC_CheckChild5Type
Definition: SelectionDAGISel.h:142
llvm::SelectionDAGISel::OPC_RecordChild4
@ OPC_RecordChild4
Definition: SelectionDAGISel.h:123
llvm::SelectionDAGISel::Select
virtual void Select(SDNode *N)=0
Main hook for targets to transform nodes into machine nodes.
llvm::SelectionDAGISel::OPC_RecordChild5
@ OPC_RecordChild5
Definition: SelectionDAGISel.h:123
llvm::SelectionDAGISel::runOnMachineFunction
bool runOnMachineFunction(MachineFunction &MF) override
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
Definition: SelectionDAGISel.cpp:373
llvm::SelectionDAGISel::OPC_CheckType
@ OPC_CheckType
Definition: SelectionDAGISel.h:138
llvm::SelectionDAGISel::OPFL_Variadic4
@ OPFL_Variadic4
Definition: SelectionDAGISel.h:188
llvm::SelectionDAGISel::CheckAndMask
bool CheckAndMask(SDValue LHS, ConstantSDNode *RHS, int64_t DesiredMaskS) const
CheckAndMask - The isel is trying to match something like (and X, 255).
Definition: SelectionDAGISel.cpp:1897
llvm::SelectionDAGISel::OPC_MoveChild1
@ OPC_MoveChild1
Definition: SelectionDAGISel.h:127
llvm::SelectionDAGISel::OPC_MoveChild4
@ OPC_MoveChild4
Definition: SelectionDAGISel.h:128
llvm::SelectionDAGISel::OPC_EmitRegister
@ OPC_EmitRegister
Definition: SelectionDAGISel.h:157
llvm::SelectionDAGISel::OPC_CheckChild0Integer
@ OPC_CheckChild0Integer
Definition: SelectionDAGISel.h:145
llvm::SelectionDAGISel::OPC_Scope
@ OPC_Scope
Definition: SelectionDAGISel.h:120
llvm::BasicBlock::const_iterator
InstListType::const_iterator const_iterator
Definition: BasicBlock.h:88
llvm::SelectionDAGISel::OPC_EmitCopyToReg2
@ OPC_EmitCopyToReg2
Definition: SelectionDAGISel.h:165