LLVM  15.0.0git
SelectionDAGISel.h
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1 //===-- llvm/CodeGen/SelectionDAGISel.h - Common Base Class------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the SelectionDAGISel class, which is used as the common
10 // base class for SelectionDAG-based instruction selectors.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_CODEGEN_SELECTIONDAGISEL_H
15 #define LLVM_CODEGEN_SELECTIONDAGISEL_H
16 
19 #include "llvm/IR/BasicBlock.h"
20 #include <memory>
21 
22 namespace llvm {
23 class AAResults;
24 class TargetInstrInfo;
25 class TargetMachine;
26 class SelectionDAGBuilder;
27 class SDValue;
28 class MachineRegisterInfo;
29 class MachineFunction;
30 class OptimizationRemarkEmitter;
31 class TargetLowering;
32 class TargetLibraryInfo;
33 class FunctionLoweringInfo;
34 class SwiftErrorValueTracking;
35 class GCFunctionInfo;
36 class ScheduleDAGSDNodes;
37 
38 /// SelectionDAGISel - This is the common base class used for SelectionDAG-based
39 /// pattern-matching instruction selectors.
41 public:
44  std::unique_ptr<FunctionLoweringInfo> FuncInfo;
49  std::unique_ptr<SelectionDAGBuilder> SDB;
50  AAResults *AA = nullptr;
51  GCFunctionInfo *GFI = nullptr;
57  bool UseInstrRefDebugInfo = false;
58 
59  /// Current optimization remark emitter.
60  /// Used to report things like combines and FastISel failures.
61  std::unique_ptr<OptimizationRemarkEmitter> ORE;
62 
63  static char ID;
64 
65  explicit SelectionDAGISel(TargetMachine &tm,
67  ~SelectionDAGISel() override;
68 
69  const TargetLowering *getTargetLowering() const { return TLI; }
70 
71  void getAnalysisUsage(AnalysisUsage &AU) const override;
72 
73  bool runOnMachineFunction(MachineFunction &MF) override;
74 
75  virtual void emitFunctionEntryCode() {}
76 
77  /// PreprocessISelDAG - This hook allows targets to hack on the graph before
78  /// instruction selection starts.
79  virtual void PreprocessISelDAG() {}
80 
81  /// PostprocessISelDAG() - This hook allows the target to hack on the graph
82  /// right after selection.
83  virtual void PostprocessISelDAG() {}
84 
85  /// Main hook for targets to transform nodes into machine nodes.
86  virtual void Select(SDNode *N) = 0;
87 
88  /// SelectInlineAsmMemoryOperand - Select the specified address as a target
89  /// addressing mode, according to the specified constraint. If this does
90  /// not match or is not implemented, return true. The resultant operands
91  /// (which will appear in the machine instruction) should be added to the
92  /// OutOps vector.
94  unsigned ConstraintID,
95  std::vector<SDValue> &OutOps) {
96  return true;
97  }
98 
99  /// IsProfitableToFold - Returns true if it's profitable to fold the specific
100  /// operand node N of U during instruction selection that starts at Root.
101  virtual bool IsProfitableToFold(SDValue N, SDNode *U, SDNode *Root) const;
102 
103  /// IsLegalToFold - Returns true if the specific operand node N of
104  /// U can be folded during instruction selection that starts at Root.
105  /// FIXME: This is a static member function because the MSP430/X86
106  /// targets, which uses it during isel. This could become a proper member.
107  static bool IsLegalToFold(SDValue N, SDNode *U, SDNode *Root,
109  bool IgnoreChains = false);
110 
111  static void InvalidateNodeId(SDNode *N);
112  static int getUninvalidatedNodeId(SDNode *N);
113 
114  static void EnforceNodeIdInvariant(SDNode *N);
115 
116  // Opcodes used by the DAG state machine:
152 
166  // Space-optimized forms that implicitly encode number of result VTs.
169  // Space-optimized forms that implicitly encode number of result VTs.
172  // Contains offset in table for pattern being selected
174  };
175 
176  enum {
177  OPFL_None = 0, // Node has no chain or glue input and isn't variadic.
178  OPFL_Chain = 1, // Node has a chain input.
179  OPFL_GlueInput = 2, // Node has a glue input.
180  OPFL_GlueOutput = 4, // Node has a glue output.
181  OPFL_MemRefs = 8, // Node gets accumulated MemRefs.
182  OPFL_Variadic0 = 1<<4, // Node is variadic, root has 0 fixed inputs.
183  OPFL_Variadic1 = 2<<4, // Node is variadic, root has 1 fixed inputs.
184  OPFL_Variadic2 = 3<<4, // Node is variadic, root has 2 fixed inputs.
185  OPFL_Variadic3 = 4<<4, // Node is variadic, root has 3 fixed inputs.
186  OPFL_Variadic4 = 5<<4, // Node is variadic, root has 4 fixed inputs.
187  OPFL_Variadic5 = 6<<4, // Node is variadic, root has 5 fixed inputs.
188  OPFL_Variadic6 = 7<<4, // Node is variadic, root has 6 fixed inputs.
189 
191  };
192 
193  /// getNumFixedFromVariadicInfo - Transform an EmitNode flags word into the
194  /// number of fixed arity values that should be skipped when copying from the
195  /// root.
196  static inline int getNumFixedFromVariadicInfo(unsigned Flags) {
197  return ((Flags&OPFL_VariadicInfo) >> 4)-1;
198  }
199 
200 
201 protected:
202  /// DAGSize - Size of DAG being instruction selected.
203  ///
204  unsigned DAGSize = 0;
205 
206  /// ReplaceUses - replace all uses of the old node F with the use
207  /// of the new node T.
210  EnforceNodeIdInvariant(T.getNode());
211  }
212 
213  /// ReplaceUses - replace all uses of the old nodes F with the use
214  /// of the new nodes T.
215  void ReplaceUses(const SDValue *F, const SDValue *T, unsigned Num) {
217  for (unsigned i = 0; i < Num; ++i)
218  EnforceNodeIdInvariant(T[i].getNode());
219  }
220 
221  /// ReplaceUses - replace all uses of the old node F with the use
222  /// of the new node T.
223  void ReplaceUses(SDNode *F, SDNode *T) {
226  }
227 
228  /// Replace all uses of \c F with \c T, then remove \c F from the DAG.
229  void ReplaceNode(SDNode *F, SDNode *T) {
233  }
234 
235  /// SelectInlineAsmMemoryOperands - Calls to this are automatically generated
236  /// by tblgen. Others should not call it.
237  void SelectInlineAsmMemoryOperands(std::vector<SDValue> &Ops,
238  const SDLoc &DL);
239 
240  /// getPatternForIndex - Patterns selected by tablegen during ISEL
241  virtual StringRef getPatternForIndex(unsigned index) {
242  llvm_unreachable("Tblgen should generate the implementation of this!");
243  }
244 
245  /// getIncludePathForIndex - get the td source location of pattern instantiation
247  llvm_unreachable("Tblgen should generate the implementation of this!");
248  }
249 
250  bool shouldOptForSize(const MachineFunction *MF) const {
251  return CurDAG->shouldOptForSize();
252  }
253 
254 public:
255  // Calls to these predicates are generated by tblgen.
257  int64_t DesiredMaskS) const;
259  int64_t DesiredMaskS) const;
260 
261 
262  /// CheckPatternPredicate - This function is generated by tblgen in the
263  /// target. It runs the specified pattern predicate and returns true if it
264  /// succeeds or false if it fails. The number is a private implementation
265  /// detail to the code tblgen produces.
266  virtual bool CheckPatternPredicate(unsigned PredNo) const {
267  llvm_unreachable("Tblgen should generate the implementation of this!");
268  }
269 
270  /// CheckNodePredicate - This function is generated by tblgen in the target.
271  /// It runs node predicate number PredNo and returns true if it succeeds or
272  /// false if it fails. The number is a private implementation
273  /// detail to the code tblgen produces.
274  virtual bool CheckNodePredicate(SDNode *N, unsigned PredNo) const {
275  llvm_unreachable("Tblgen should generate the implementation of this!");
276  }
277 
278  /// CheckNodePredicateWithOperands - This function is generated by tblgen in
279  /// the target.
280  /// It runs node predicate number PredNo and returns true if it succeeds or
281  /// false if it fails. The number is a private implementation detail to the
282  /// code tblgen produces.
284  SDNode *N, unsigned PredNo,
285  const SmallVectorImpl<SDValue> &Operands) const {
286  llvm_unreachable("Tblgen should generate the implementation of this!");
287  }
288 
289  virtual bool CheckComplexPattern(SDNode *Root, SDNode *Parent, SDValue N,
290  unsigned PatternNo,
291  SmallVectorImpl<std::pair<SDValue, SDNode*> > &Result) {
292  llvm_unreachable("Tblgen should generate the implementation of this!");
293  }
294 
295  virtual SDValue RunSDNodeXForm(SDValue V, unsigned XFormNo) {
296  llvm_unreachable("Tblgen should generate this!");
297  }
298 
299  void SelectCodeCommon(SDNode *NodeToMatch, const unsigned char *MatcherTable,
300  unsigned TableSize);
301 
302  /// Return true if complex patterns for this target can mutate the
303  /// DAG.
304  virtual bool ComplexPatternFuncMutatesDAG() const {
305  return false;
306  }
307 
308  /// Return whether the node may raise an FP exception.
309  bool mayRaiseFPException(SDNode *Node) const;
310 
311  bool isOrEquivalentToAdd(const SDNode *N) const;
312 
313 private:
314 
315  // Calls to these functions are generated by tblgen.
316  void Select_INLINEASM(SDNode *N);
317  void Select_READ_REGISTER(SDNode *Op);
318  void Select_WRITE_REGISTER(SDNode *Op);
319  void Select_UNDEF(SDNode *N);
320  void CannotYetSelect(SDNode *N);
321 
322  void Select_FREEZE(SDNode *N);
323  void Select_ARITH_FENCE(SDNode *N);
324 
325 private:
326  void DoInstructionSelection();
327  SDNode *MorphNode(SDNode *Node, unsigned TargetOpc, SDVTList VTList,
328  ArrayRef<SDValue> Ops, unsigned EmitNodeInfo);
329 
330  /// Prepares the landing pad to take incoming values or do other EH
331  /// personality specific tasks. Returns true if the block should be
332  /// instruction selected, false if no code should be emitted for it.
333  bool PrepareEHLandingPad();
334 
335  /// Perform instruction selection on all basic blocks in the function.
336  void SelectAllBasicBlocks(const Function &Fn);
337 
338  /// Perform instruction selection on a single basic block, for
339  /// instructions between \p Begin and \p End. \p HadTailCall will be set
340  /// to true if a call in the block was translated as a tail call.
341  void SelectBasicBlock(BasicBlock::const_iterator Begin,
343  bool &HadTailCall);
344  void FinishBasicBlock();
345 
346  void CodeGenAndEmitDAG();
347 
348  /// Generate instructions for lowering the incoming arguments of the
349  /// given function.
350  void LowerArguments(const Function &F);
351 
352  void ComputeLiveOutVRegInfo();
353 
354  /// Create the scheduler. If a specific scheduler was specified
355  /// via the SchedulerRegistry, use it, otherwise select the
356  /// one preferred by the target.
357  ///
358  ScheduleDAGSDNodes *CreateScheduler();
359 
360  /// OpcodeOffset - This is a cache used to dispatch efficiently into isel
361  /// state machines that start with a OPC_SwitchOpcode node.
362  std::vector<unsigned> OpcodeOffset;
363 
364  void UpdateChains(SDNode *NodeToMatch, SDValue InputChain,
365  SmallVectorImpl<SDNode *> &ChainNodesMatched,
366  bool isMorphNodeTo);
367 };
368 
369 }
370 
371 #endif /* LLVM_CODEGEN_SELECTIONDAGISEL_H */
llvm::SelectionDAGISel::OPC_MoveChild2
@ OPC_MoveChild2
Definition: SelectionDAGISel.h:125
i
i
Definition: README.txt:29
llvm::SelectionDAGISel::FastISelFailed
bool FastISelFailed
Definition: SelectionDAGISel.h:55
llvm::ConstantSDNode
Definition: SelectionDAGNodes.h:1564
llvm::SelectionDAGISel::OPC_CheckComplexPat
@ OPC_CheckComplexPat
Definition: SelectionDAGISel.h:147
llvm::SelectionDAGISel::OPC_EmitInteger
@ OPC_EmitInteger
Definition: SelectionDAGISel.h:153
llvm::SelectionDAGISel::getTargetLowering
const TargetLowering * getTargetLowering() const
Definition: SelectionDAGISel.h:69
llvm::SelectionDAGISel::OPC_CheckChild2Integer
@ OPC_CheckChild2Integer
Definition: SelectionDAGISel.h:143
llvm::SelectionDAGISel::UseInstrRefDebugInfo
bool UseInstrRefDebugInfo
Definition: SelectionDAGISel.h:57
llvm::SelectionDAGISel::TLI
const TargetLowering * TLI
Definition: SelectionDAGISel.h:54
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:17
llvm::SelectionDAGISel::getIncludePathForIndex
virtual StringRef getIncludePathForIndex(unsigned index)
getIncludePathForIndex - get the td source location of pattern instantiation
Definition: SelectionDAGISel.h:246
llvm::SelectionDAGISel::TM
TargetMachine & TM
Definition: SelectionDAGISel.h:42
llvm::SelectionDAGISel::isOrEquivalentToAdd
bool isOrEquivalentToAdd(const SDNode *N) const
Definition: SelectionDAGISel.cpp:3668
llvm::ScheduleDAGSDNodes
ScheduleDAGSDNodes - A ScheduleDAG for scheduling SDNode-based DAGs.
Definition: ScheduleDAGSDNodes.h:46
llvm::SDLoc
Wrapper class for IR location info (IR ordering and DebugLoc) to be passed into SDNode creation funct...
Definition: SelectionDAGNodes.h:1090
llvm::SelectionDAGISel::OPC_EmitMergeInputChains1_2
@ OPC_EmitMergeInputChains1_2
Definition: SelectionDAGISel.h:161
llvm::SelectionDAGISel::EnforceNodeIdInvariant
static void EnforceNodeIdInvariant(SDNode *N)
Definition: SelectionDAGISel.cpp:1072
llvm::SelectionDAGISel::CheckComplexPattern
virtual bool CheckComplexPattern(SDNode *Root, SDNode *Parent, SDValue N, unsigned PatternNo, SmallVectorImpl< std::pair< SDValue, SDNode * > > &Result)
Definition: SelectionDAGISel.h:289
llvm::SelectionDAGISel::OPC_RecordChild7
@ OPC_RecordChild7
Definition: SelectionDAGISel.h:121
llvm::SelectionDAGISel::PostprocessISelDAG
virtual void PostprocessISelDAG()
PostprocessISelDAG() - This hook allows the target to hack on the graph right after selection.
Definition: SelectionDAGISel.h:83
llvm::SelectionDAGISel::DAGSize
unsigned DAGSize
DAGSize - Size of DAG being instruction selected.
Definition: SelectionDAGISel.h:204
llvm::MachineRegisterInfo
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Definition: MachineRegisterInfo.h:50
llvm::SelectionDAGISel::OPC_EmitNode
@ OPC_EmitNode
Definition: SelectionDAGISel.h:165
llvm::Function
Definition: Function.h:60
llvm::SelectionDAGISel::emitFunctionEntryCode
virtual void emitFunctionEntryCode()
Definition: SelectionDAGISel.h:75
llvm::SelectionDAGISel::SelectInlineAsmMemoryOperands
void SelectInlineAsmMemoryOperands(std::vector< SDValue > &Ops, const SDLoc &DL)
SelectInlineAsmMemoryOperands - Calls to this are automatically generated by tblgen.
Definition: SelectionDAGISel.cpp:1992
llvm::SelectionDAGISel::OPFL_Variadic4
@ OPFL_Variadic4
Definition: SelectionDAGISel.h:186
llvm::SelectionDAGISel::OPC_CheckOrImm
@ OPC_CheckOrImm
Definition: SelectionDAGISel.h:148
llvm::SelectionDAGISel::OPC_RecordChild3
@ OPC_RecordChild3
Definition: SelectionDAGISel.h:120
llvm::SelectionDAGISel::OPC_EmitNode1
@ OPC_EmitNode1
Definition: SelectionDAGISel.h:167
llvm::SelectionDAGISel::OPC_CheckChild1Integer
@ OPC_CheckChild1Integer
Definition: SelectionDAGISel.h:143
llvm::SelectionDAGISel::OPC_CheckFoldableChainNode
@ OPC_CheckFoldableChainNode
Definition: SelectionDAGISel.h:151
llvm::MachineFunctionPass
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
Definition: MachineFunctionPass.h:30
llvm::SelectionDAGISel::OPC_CheckChild1Same
@ OPC_CheckChild1Same
Definition: SelectionDAGISel.h:129
llvm::GCFunctionInfo
Garbage collection metadata for a single function.
Definition: GCMetadata.h:77
llvm::SDNode
Represents one node in the SelectionDAG.
Definition: SelectionDAGNodes.h:454
llvm::SelectionDAG::ReplaceAllUsesWith
void ReplaceAllUsesWith(SDValue From, SDValue To)
Modify anything using 'From' to use 'To' instead.
Definition: SelectionDAG.cpp:9980
llvm::SelectionDAGISel::OPC_MorphNodeTo2
@ OPC_MorphNodeTo2
Definition: SelectionDAGISel.h:170
llvm::SelectionDAGISel::OPC_MoveChild7
@ OPC_MoveChild7
Definition: SelectionDAGISel.h:126
llvm::SelectionDAGISel::CheckPatternPredicate
virtual bool CheckPatternPredicate(unsigned PredNo) const
CheckPatternPredicate - This function is generated by tblgen in the target.
Definition: SelectionDAGISel.h:266
llvm::SelectionDAGISel::OPC_CaptureGlueInput
@ OPC_CaptureGlueInput
Definition: SelectionDAGISel.h:123
llvm::SelectionDAGISel::OPC_EmitNodeXForm
@ OPC_EmitNodeXForm
Definition: SelectionDAGISel.h:164
llvm::SelectionDAGISel::OPC_CheckChild0Same
@ OPC_CheckChild0Same
Definition: SelectionDAGISel.h:129
T
#define T
Definition: Mips16ISelLowering.cpp:341
llvm::SelectionDAGISel::OPC_CheckPredicate
@ OPC_CheckPredicate
Definition: SelectionDAGISel.h:132
llvm::SmallPtrSet
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
Definition: SmallPtrSet.h:450
llvm::SelectionDAGISel::OPC_Coverage
@ OPC_Coverage
Definition: SelectionDAGISel.h:173
RHS
Value * RHS
Definition: X86PartialReduction.cpp:76
llvm::SelectionDAGISel::OPC_CheckAndImm
@ OPC_CheckAndImm
Definition: SelectionDAGISel.h:148
llvm::SelectionDAGISel::OPC_EmitCopyToReg
@ OPC_EmitCopyToReg
Definition: SelectionDAGISel.h:162
llvm::SelectionDAGISel::OPC_SwitchType
@ OPC_SwitchType
Definition: SelectionDAGISel.h:138
llvm::SelectionDAGISel::OPC_CheckChild0Type
@ OPC_CheckChild0Type
Definition: SelectionDAGISel.h:139
llvm::SelectionDAGISel::OPC_CheckCondCode
@ OPC_CheckCondCode
Definition: SelectionDAGISel.h:145
SelectionDAG.h
llvm::SelectionDAGISel::OPC_CheckChild7Type
@ OPC_CheckChild7Type
Definition: SelectionDAGISel.h:141
llvm::SelectionDAGISel::OPFL_None
@ OPFL_None
Definition: SelectionDAGISel.h:177
llvm::SelectionDAGISel::OPC_CheckChild1Type
@ OPC_CheckChild1Type
Definition: SelectionDAGISel.h:139
llvm::SelectionDAGISel::OPC_EmitStringInteger
@ OPC_EmitStringInteger
Definition: SelectionDAGISel.h:154
llvm::SelectionDAG::ReplaceAllUsesOfValuesWith
void ReplaceAllUsesOfValuesWith(const SDValue *From, const SDValue *To, unsigned Num)
Like ReplaceAllUsesOfValueWith, but for multiple values at once.
Definition: SelectionDAG.cpp:10291
F
#define F(x, y, z)
Definition: MD5.cpp:55
llvm::SelectionDAGISel::PreprocessISelDAG
virtual void PreprocessISelDAG()
PreprocessISelDAG - This hook allows targets to hack on the graph before instruction selection starts...
Definition: SelectionDAGISel.h:79
llvm::SelectionDAGISel::OPC_EmitMergeInputChains1_0
@ OPC_EmitMergeInputChains1_0
Definition: SelectionDAGISel.h:159
llvm::SelectionDAGISel::ElidedArgCopyInstrs
SmallPtrSet< const Instruction *, 4 > ElidedArgCopyInstrs
Definition: SelectionDAGISel.h:56
llvm::SelectionDAGISel::OPC_MoveChild5
@ OPC_MoveChild5
Definition: SelectionDAGISel.h:126
LHS
Value * LHS
Definition: X86PartialReduction.cpp:75
llvm::SelectionDAGISel::OPC_RecordChild6
@ OPC_RecordChild6
Definition: SelectionDAGISel.h:121
llvm::TargetInstrInfo
TargetInstrInfo - Interface to description of machine instruction set.
Definition: TargetInstrInfo.h:97
llvm::SelectionDAGISel::OPC_RecordChild1
@ OPC_RecordChild1
Definition: SelectionDAGISel.h:120
llvm::SelectionDAGISel::OPFL_VariadicInfo
@ OPFL_VariadicInfo
Definition: SelectionDAGISel.h:190
llvm::SelectionDAGISel::OPC_EmitNode0
@ OPC_EmitNode0
Definition: SelectionDAGISel.h:167
llvm::SelectionDAG
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
Definition: SelectionDAG.h:220
llvm::SelectionDAGISel::RunSDNodeXForm
virtual SDValue RunSDNodeXForm(SDValue V, unsigned XFormNo)
Definition: SelectionDAGISel.h:295
llvm::SelectionDAGISel::SDB
std::unique_ptr< SelectionDAGBuilder > SDB
Definition: SelectionDAGISel.h:49
llvm::SelectionDAGISel::OPC_CheckOpcode
@ OPC_CheckOpcode
Definition: SelectionDAGISel.h:134
llvm::AAResults
Definition: AliasAnalysis.h:511
llvm::SelectionDAGISel::OPC_CheckPatternPredicate
@ OPC_CheckPatternPredicate
Definition: SelectionDAGISel.h:131
llvm::SelectionDAGISel::ReplaceUses
void ReplaceUses(SDNode *F, SDNode *T)
ReplaceUses - replace all uses of the old node F with the use of the new node T.
Definition: SelectionDAGISel.h:223
llvm::SelectionDAGISel::OPC_MoveChild
@ OPC_MoveChild
Definition: SelectionDAGISel.h:124
llvm::SelectionDAGISel::OPFL_Variadic5
@ OPFL_Variadic5
Definition: SelectionDAGISel.h:187
llvm::SelectionDAGISel::RegInfo
MachineRegisterInfo * RegInfo
Definition: SelectionDAGISel.h:47
llvm::SelectionDAGISel::OptLevel
CodeGenOpt::Level OptLevel
Definition: SelectionDAGISel.h:52
llvm::SelectionDAGISel::CheckNodePredicate
virtual bool CheckNodePredicate(SDNode *N, unsigned PredNo) const
CheckNodePredicate - This function is generated by tblgen in the target.
Definition: SelectionDAGISel.h:274
llvm::TargetLowering
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
Definition: TargetLowering.h:3412
llvm::SelectionDAGISel::ComplexPatternFuncMutatesDAG
virtual bool ComplexPatternFuncMutatesDAG() const
Return true if complex patterns for this target can mutate the DAG.
Definition: SelectionDAGISel.h:304
llvm::AnalysisUsage
Represent the analysis usage information of a pass.
Definition: PassAnalysisSupport.h:47
llvm::SelectionDAGISel::OPFL_Variadic3
@ OPFL_Variadic3
Definition: SelectionDAGISel.h:185
llvm::SelectionDAGISel::ReplaceNode
void ReplaceNode(SDNode *F, SDNode *T)
Replace all uses of F with T, then remove F from the DAG.
Definition: SelectionDAGISel.h:229
llvm::SelectionDAGISel::ORE
std::unique_ptr< OptimizationRemarkEmitter > ORE
Current optimization remark emitter.
Definition: SelectionDAGISel.h:61
llvm::SelectionDAGISel::OPC_MorphNodeTo1
@ OPC_MorphNodeTo1
Definition: SelectionDAGISel.h:170
llvm::SelectionDAGISel::ID
static char ID
Definition: SelectionDAGISel.h:63
llvm::SelectionDAGISel::OPC_CheckSame
@ OPC_CheckSame
Definition: SelectionDAGISel.h:128
llvm::SelectionDAGISel::OPFL_Variadic6
@ OPFL_Variadic6
Definition: SelectionDAGISel.h:188
Operands
mir Rename Register Operands
Definition: MIRNamerPass.cpp:74
llvm::SelectionDAGISel::OPFL_GlueInput
@ OPFL_GlueInput
Definition: SelectionDAGISel.h:179
llvm::SelectionDAGISel::InvalidateNodeId
static void InvalidateNodeId(SDNode *N)
Definition: SelectionDAGISel.cpp:1091
llvm::SelectionDAGISel::OPFL_Variadic2
@ OPFL_Variadic2
Definition: SelectionDAGISel.h:184
BasicBlock.h
llvm::SelectionDAGISel::OPC_CheckChild4Integer
@ OPC_CheckChild4Integer
Definition: SelectionDAGISel.h:144
llvm::SelectionDAGISel::OPC_CheckValueType
@ OPC_CheckValueType
Definition: SelectionDAGISel.h:146
llvm::SelectionDAG::RemoveDeadNode
void RemoveDeadNode(SDNode *N)
Remove the specified node from the system.
Definition: SelectionDAG.cpp:954
llvm::SelectionDAGISel::OPC_CheckImmAllZerosV
@ OPC_CheckImmAllZerosV
Definition: SelectionDAGISel.h:150
llvm::CodeGenOpt::Default
@ Default
Definition: CodeGen.h:55
llvm::SelectionDAGISel::OPC_CheckInteger
@ OPC_CheckInteger
Definition: SelectionDAGISel.h:142
llvm::SelectionDAGISel::IsProfitableToFold
virtual bool IsProfitableToFold(SDValue N, SDNode *U, SDNode *Root) const
IsProfitableToFold - Returns true if it's profitable to fold the specific operand node N of U during ...
Definition: SelectionDAGISel.cpp:2105
index
splat index
Definition: README_ALTIVEC.txt:181
llvm::SelectionDAGISel::OPC_RecordMemRef
@ OPC_RecordMemRef
Definition: SelectionDAGISel.h:122
llvm::SelectionDAGISel::getAnalysisUsage
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
Definition: SelectionDAGISel.cpp:332
llvm::SelectionDAGISel::TII
const TargetInstrInfo * TII
Definition: SelectionDAGISel.h:53
llvm::SelectionDAGISel::OPC_RecordChild0
@ OPC_RecordChild0
Definition: SelectionDAGISel.h:120
llvm::SelectionDAGISel::FuncInfo
std::unique_ptr< FunctionLoweringInfo > FuncInfo
Definition: SelectionDAGISel.h:44
llvm::SelectionDAGISel::IsLegalToFold
static bool IsLegalToFold(SDValue N, SDNode *U, SDNode *Root, CodeGenOpt::Level OptLevel, bool IgnoreChains=false)
IsLegalToFold - Returns true if the specific operand node N of U can be folded during instruction sel...
Definition: SelectionDAGISel.cpp:2113
llvm::SelectionDAGISel::mayRaiseFPException
bool mayRaiseFPException(SDNode *Node) const
Return whether the node may raise an FP exception.
Definition: SelectionDAGISel.cpp:3654
llvm::SelectionDAGISel::OPC_CheckChild2Same
@ OPC_CheckChild2Same
Definition: SelectionDAGISel.h:130
llvm::SelectionDAG::shouldOptForSize
bool shouldOptForSize() const
Definition: SelectionDAG.cpp:1264
llvm::SwiftErrorValueTracking
Definition: SwiftErrorValueTracking.h:34
llvm::SelectionDAGISel::OPFL_Chain
@ OPFL_Chain
Definition: SelectionDAGISel.h:178
llvm::SelectionDAGISel::OPC_CheckChild4Type
@ OPC_CheckChild4Type
Definition: SelectionDAGISel.h:140
llvm::SelectionDAGISel::getPatternForIndex
virtual StringRef getPatternForIndex(unsigned index)
getPatternForIndex - Patterns selected by tablegen during ISEL
Definition: SelectionDAGISel.h:241
MachineFunctionPass.h
llvm::SelectionDAGISel::OPC_CheckImmAllOnesV
@ OPC_CheckImmAllOnesV
Definition: SelectionDAGISel.h:149
llvm::SelectionDAGISel::OPC_SwitchOpcode
@ OPC_SwitchOpcode
Definition: SelectionDAGISel.h:135
llvm::SelectionDAGISel::OPC_CheckChild3Integer
@ OPC_CheckChild3Integer
Definition: SelectionDAGISel.h:144
llvm::SelectionDAGISel::CheckOrMask
bool CheckOrMask(SDValue LHS, ConstantSDNode *RHS, int64_t DesiredMaskS) const
CheckOrMask - The isel is trying to match something like (or X, 255).
Definition: SelectionDAGISel.cpp:1962
llvm::TargetMachine
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:77
llvm::SelectionDAGISel::~SelectionDAGISel
~SelectionDAGISel() override
Definition: SelectionDAGISel.cpp:327
llvm::SelectionDAGISel::OPC_EmitMergeInputChains
@ OPC_EmitMergeInputChains
Definition: SelectionDAGISel.h:158
llvm::SelectionDAGISel::CurDAG
SelectionDAG * CurDAG
Definition: SelectionDAGISel.h:48
llvm::SelectionDAGISel::getUninvalidatedNodeId
static int getUninvalidatedNodeId(SDNode *N)
Definition: SelectionDAGISel.cpp:1097
llvm::SelectionDAGISel::SelectionDAGISel
SelectionDAGISel(TargetMachine &tm, CodeGenOpt::Level OL=CodeGenOpt::Default)
Definition: SelectionDAGISel.cpp:313
llvm::SelectionDAGISel::OPC_CheckPredicateWithOperands
@ OPC_CheckPredicateWithOperands
Definition: SelectionDAGISel.h:133
llvm::MachineFunction
Definition: MachineFunction.h:257
llvm::SelectionDAGISel::CheckNodePredicateWithOperands
virtual bool CheckNodePredicateWithOperands(SDNode *N, unsigned PredNo, const SmallVectorImpl< SDValue > &Operands) const
CheckNodePredicateWithOperands - This function is generated by tblgen in the target.
Definition: SelectionDAGISel.h:283
llvm::ArrayRef
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: APInt.h:32
llvm::SelectionDAGISel::OPFL_Variadic1
@ OPFL_Variadic1
Definition: SelectionDAGISel.h:183
llvm::SelectionDAGISel::OPC_CheckChild3Type
@ OPC_CheckChild3Type
Definition: SelectionDAGISel.h:140
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:58
llvm::SelectionDAGISel::SelectInlineAsmMemoryOperand
virtual bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, std::vector< SDValue > &OutOps)
SelectInlineAsmMemoryOperand - Select the specified address as a target addressing mode,...
Definition: SelectionDAGISel.h:93
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:143
llvm::SelectionDAG::ReplaceAllUsesOfValueWith
void ReplaceAllUsesOfValueWith(SDValue From, SDValue To)
Replace any uses of From with To, leaving uses of other values produced by From.getNode() alone.
Definition: SelectionDAG.cpp:10134
DL
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Definition: AArch64SLSHardening.cpp:76
llvm::SelectionDAGISel::OPC_MoveChild3
@ OPC_MoveChild3
Definition: SelectionDAGISel.h:125
llvm::SelectionDAGISel::OPC_MoveChild6
@ OPC_MoveChild6
Definition: SelectionDAGISel.h:126
Node
Definition: ItaniumDemangle.h:155
llvm::CodeGenOpt::Level
Level
Definition: CodeGen.h:52
llvm::SelectionDAGISel::OPC_EmitNode2
@ OPC_EmitNode2
Definition: SelectionDAGISel.h:167
llvm::SDVTList
This represents a list of ValueType's that has been intern'd by a SelectionDAG.
Definition: SelectionDAGNodes.h:78
llvm::SelectionDAGISel::SwiftError
SwiftErrorValueTracking * SwiftError
Definition: SelectionDAGISel.h:45
llvm::SelectionDAGISel::OPC_CheckChild3Same
@ OPC_CheckChild3Same
Definition: SelectionDAGISel.h:130
llvm::SelectionDAGISel::ReplaceUses
void ReplaceUses(const SDValue *F, const SDValue *T, unsigned Num)
ReplaceUses - replace all uses of the old nodes F with the use of the new nodes T.
Definition: SelectionDAGISel.h:215
llvm::SelectionDAGISel::BuiltinOpcodes
BuiltinOpcodes
Definition: SelectionDAGISel.h:117
llvm::SelectionDAGISel::MF
MachineFunction * MF
Definition: SelectionDAGISel.h:46
llvm::SelectionDAGISel::shouldOptForSize
bool shouldOptForSize(const MachineFunction *MF) const
Definition: SelectionDAGISel.h:250
llvm::SelectionDAGISel::OPC_EmitMergeInputChains1_1
@ OPC_EmitMergeInputChains1_1
Definition: SelectionDAGISel.h:160
llvm::SelectionDAGISel::OPC_RecordChild2
@ OPC_RecordChild2
Definition: SelectionDAGISel.h:120
llvm::AMDGPU::SendMsg::Op
Op
Definition: SIDefines.h:345
llvm::SelectionDAGISel::getNumFixedFromVariadicInfo
static int getNumFixedFromVariadicInfo(unsigned Flags)
getNumFixedFromVariadicInfo - Transform an EmitNode flags word into the number of fixed arity values ...
Definition: SelectionDAGISel.h:196
llvm::SelectionDAGISel::ReplaceUses
void ReplaceUses(SDValue F, SDValue T)
ReplaceUses - replace all uses of the old node F with the use of the new node T.
Definition: SelectionDAGISel.h:208
llvm::SelectionDAGISel::OPC_CompleteMatch
@ OPC_CompleteMatch
Definition: SelectionDAGISel.h:171
llvm::SelectionDAGISel::OPC_CheckChild6Type
@ OPC_CheckChild6Type
Definition: SelectionDAGISel.h:141
llvm::TargetLibraryInfo
Provides information about what library functions are available for the current target.
Definition: TargetLibraryInfo.h:222
llvm::SDValue
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
Definition: SelectionDAGNodes.h:137
llvm::SelectionDAGISel::GFI
GCFunctionInfo * GFI
Definition: SelectionDAGISel.h:51
llvm::SelectionDAGISel::OPC_EmitRegister2
@ OPC_EmitRegister2
Definition: SelectionDAGISel.h:156
llvm::SelectionDAGISel::OPFL_Variadic0
@ OPFL_Variadic0
Definition: SelectionDAGISel.h:182
llvm::SelectionDAGISel::OPC_CheckChild2Type
@ OPC_CheckChild2Type
Definition: SelectionDAGISel.h:139
llvm::SelectionDAGISel::OPFL_MemRefs
@ OPFL_MemRefs
Definition: SelectionDAGISel.h:181
llvm::SelectionDAGISel::OPC_EmitConvertToTarget
@ OPC_EmitConvertToTarget
Definition: SelectionDAGISel.h:157
AA
llvm::SelectionDAGISel::OPC_MoveChild0
@ OPC_MoveChild0
Definition: SelectionDAGISel.h:125
llvm::SelectionDAGISel::OPFL_GlueOutput
@ OPFL_GlueOutput
Definition: SelectionDAGISel.h:180
llvm::SelectionDAGISel::LibInfo
const TargetLibraryInfo * LibInfo
Definition: SelectionDAGISel.h:43
llvm::SelectionDAGISel
SelectionDAGISel - This is the common base class used for SelectionDAG-based pattern-matching instruc...
Definition: SelectionDAGISel.h:40
llvm::SelectionDAGISel::OPC_CheckChild2CondCode
@ OPC_CheckChild2CondCode
Definition: SelectionDAGISel.h:145
llvm::SelectionDAGISel::OPC_RecordNode
@ OPC_RecordNode
Definition: SelectionDAGISel.h:119
N
#define N
llvm::SelectionDAGISel::OPC_MorphNodeTo
@ OPC_MorphNodeTo
Definition: SelectionDAGISel.h:168
llvm::SelectionDAGISel::OPC_CheckTypeRes
@ OPC_CheckTypeRes
Definition: SelectionDAGISel.h:137
llvm::SelectionDAGISel::OPC_MoveParent
@ OPC_MoveParent
Definition: SelectionDAGISel.h:127
llvm::SmallVectorImpl
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:42
llvm::SelectionDAGISel::SelectCodeCommon
void SelectCodeCommon(SDNode *NodeToMatch, const unsigned char *MatcherTable, unsigned TableSize)
Definition: SelectionDAGISel.cpp:2740
llvm::SelectionDAGISel::OPC_MorphNodeTo0
@ OPC_MorphNodeTo0
Definition: SelectionDAGISel.h:170
llvm::SelectionDAGISel::OPC_CheckChild5Type
@ OPC_CheckChild5Type
Definition: SelectionDAGISel.h:140
llvm::SelectionDAGISel::OPC_RecordChild4
@ OPC_RecordChild4
Definition: SelectionDAGISel.h:121
llvm::SelectionDAGISel::Select
virtual void Select(SDNode *N)=0
Main hook for targets to transform nodes into machine nodes.
llvm::SelectionDAGISel::OPC_RecordChild5
@ OPC_RecordChild5
Definition: SelectionDAGISel.h:121
llvm::SelectionDAGISel::runOnMachineFunction
bool runOnMachineFunction(MachineFunction &MF) override
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
Definition: SelectionDAGISel.cpp:413
llvm::SelectionDAGISel::OPC_CheckType
@ OPC_CheckType
Definition: SelectionDAGISel.h:136
llvm::SelectionDAGISel::CheckAndMask
bool CheckAndMask(SDValue LHS, ConstantSDNode *RHS, int64_t DesiredMaskS) const
CheckAndMask - The isel is trying to match something like (and X, 255).
Definition: SelectionDAGISel.cpp:1933
llvm::SelectionDAGISel::OPC_MoveChild1
@ OPC_MoveChild1
Definition: SelectionDAGISel.h:125
llvm::SelectionDAGISel::OPC_MoveChild4
@ OPC_MoveChild4
Definition: SelectionDAGISel.h:126
llvm::SelectionDAGISel::OPC_EmitRegister
@ OPC_EmitRegister
Definition: SelectionDAGISel.h:155
llvm::SelectionDAGISel::OPC_CheckChild0Integer
@ OPC_CheckChild0Integer
Definition: SelectionDAGISel.h:143
llvm::SelectionDAGISel::OPC_Scope
@ OPC_Scope
Definition: SelectionDAGISel.h:118
llvm::BasicBlock::const_iterator
InstListType::const_iterator const_iterator
Definition: BasicBlock.h:88
llvm::SelectionDAGISel::OPC_EmitCopyToReg2
@ OPC_EmitCopyToReg2
Definition: SelectionDAGISel.h:163