Go to the documentation of this file.
16 #ifndef LLVM_LIB_TARGET_X86_MCTARGETDESC_X86BASEINFO_H
17 #define LLVM_LIB_TARGET_X86_MCTARGETDESC_X86BASEINFO_H
155 case X86::TEST64ri32:
167 case X86::AND16rr_REV:
173 case X86::AND32rr_REV:
179 case X86::AND64rr_REV:
185 case X86::AND8rr_REV:
195 case X86::CMP16rr_REV:
202 case X86::CMP32rr_REV:
209 case X86::CMP64rr_REV:
216 case X86::CMP8rr_REV:
224 case X86::ADD16rr_REV:
230 case X86::ADD32rr_REV:
236 case X86::ADD64rr_REV:
242 case X86::ADD8rr_REV:
249 case X86::SUB16rr_REV:
255 case X86::SUB32rr_REV:
261 case X86::SUB64rr_REV:
267 case X86::SUB8rr_REV:
271 case X86::INC16r_alt:
273 case X86::INC32r_alt:
278 case X86::DEC16r_alt:
280 case X86::DEC32r_alt:
1091 default:
llvm_unreachable(
"Unknown FormMask value in getMemoryOperandNo!");
1111 return 1 + HasVEX_4V + HasEVEX_K;
1114 return 1 + HasEVEX_K;
1147 return 0 + HasVEX_4V + HasEVEX_K;
1177 if ((RegNo >= X86::XMM8 && RegNo <= X86::XMM31) ||
1178 (RegNo >= X86::YMM8 && RegNo <= X86::YMM31) ||
1179 (RegNo >= X86::ZMM8 && RegNo <= X86::ZMM31))
1184 case X86::R8:
case X86::R9:
case X86::R10:
case X86::R11:
1185 case X86::R12:
case X86::R13:
case X86::R14:
case X86::R15:
1186 case X86::R8D:
case X86::R9D:
case X86::R10D:
case X86::R11D:
1187 case X86::R12D:
case X86::R13D:
case X86::R14D:
case X86::R15D:
1188 case X86::R8W:
case X86::R9W:
case X86::R10W:
case X86::R11W:
1189 case X86::R12W:
case X86::R13W:
case X86::R14W:
case X86::R15W:
1190 case X86::R8B:
case X86::R9B:
case X86::R10B:
case X86::R11B:
1191 case X86::R12B:
case X86::R13B:
case X86::R14B:
case X86::R15B:
1192 case X86::CR8:
case X86::CR9:
case X86::CR10:
case X86::CR11:
1193 case X86::CR12:
case X86::CR13:
case X86::CR14:
case X86::CR15:
1194 case X86::DR8:
case X86::DR9:
case X86::DR10:
case X86::DR11:
1195 case X86::DR12:
case X86::DR13:
case X86::DR14:
case X86::DR15:
1204 return ((RegNo >= X86::XMM16 && RegNo <= X86::XMM31) ||
1205 (RegNo >= X86::YMM16 && RegNo <= X86::YMM31) ||
1206 (RegNo >= X86::ZMM16 && RegNo <= X86::ZMM31));
1211 return (reg == X86::SPL || reg == X86::BPL ||
1212 reg == X86::SIL || reg == X86::DIL);
@ RawFrmImm8
RawFrmImm8 - This is used for the ENTER instruction, which has two immediates, the first of which is ...
@ MO_TLVP
MO_TLVP - On a symbol operand this indicates that the immediate is some TLS offset.
@ MO_DARWIN_NONLAZY
MO_DARWIN_NONLAZY - On a symbol operand "FOO", this indicates that the reference is actually to the "...
unsigned getNumDefs() const
Return the number of MachineOperands that are register definitions.
@ MO_GOTTPOFF
MO_GOTTPOFF - On a symbol operand this indicates that the immediate is the offset of the GOT entry wi...
@ RawFrmDst
RawFrmDst - This form is for instructions that use the destination index register DI/EDI/RDI.
@ MRMSrcReg
MRMSrcReg - This form is used for instructions that use the Mod/RM byte to specify a source,...
@ RawFrm
Raw - This form is for instructions that don't have any operands, so they are just a fixed opcode val...
int getMemoryOperandNo(uint64_t TSFlags)
The function returns the MCInst operand # for the first field of the memory operand.
bool isImmPCRel(uint64_t TSFlags)
@ AddRegFrm
AddRegFrm - This form is used for instructions like 'push r32' that have their one register operand a...
@ MO_INDNTPOFF
MO_INDNTPOFF - On a symbol operand this indicates that the immediate is the absolute address of the G...
@ RawFrmImm16
RawFrmImm16 - This is used for CALL FAR instructions, which have two immediates, the first of which i...
@ MO_GOT_ABSOLUTE_ADDRESS
MO_GOT_ABSOLUTE_ADDRESS - On a symbol operand, this represents a relocation of: SYMBOL_LABEL + [.
@ MO_TLSGD
MO_TLSGD - On a symbol operand this indicates that the immediate is the offset of the GOT entry with ...
@ EVEX_RCShift
Explicitly specified rounding control.
@ MO_TLSLDM
MO_TLSLDM - On a symbol operand this indicates that the immediate is the offset of the GOT entry with...
uint8_t getBaseOpcodeFor(uint64_t TSFlags)
@ MO_SECREL
MO_SECREL - On a symbol operand this indicates that the immediate is the offset from beginning of sec...
@ MO_TPOFF
MO_TPOFF - On a symbol operand this indicates that the immediate is the thread-pointer offset for the...
@ PrefixByte
PrefixByte - This form is used for instructions that represent a prefix byte like data16 or rep.
@ AddCCFrm
AddCCFrm - This form is used for Jcc that encode the condition code in the lower 4 bits of the opcode...
@ MO_GOTOFF
MO_GOTOFF - On a symbol operand this indicates that the immediate is the offset to the location of th...
@ VEX_WShift
VEX_W - Has a opcode specific functionality, but is used in the same way as REX_W is for regular SSE ...
@ RawFrmSrc
RawFrmSrc - This form is for instructions that use the source index register SI/ESI/RSI with a possib...
@ MO_GOT
MO_GOT - On a symbol operand this indicates that the immediate is the offset to the GOT entry for the...
@ MRMXmCC
MRMXm - This form is used for instructions that use the Mod/RM byte to specify a memory source,...
@ MO_COFFSTUB
MO_COFFSTUB - On a symbol operand "FOO", this indicates that the reference is actually to the "....
@ AddrNumOperands
AddrNumOperands - Total number of operands in a memory reference.
@ MRMXm
MRMXm - This form is used for instructions that use the Mod/RM byte to specify a memory source,...
@ MRMSrcRegOp4
MRMSrcRegOp4 - This form is used for instructions that use the Mod/RM byte to specify the fourth sour...
bool hasImm(uint64_t TSFlags)
@ MO_PLT
MO_PLT - On a symbol operand this indicates that the immediate is offset to the PLT entry of symbol n...
@ MO_GOTPCREL
MO_GOTPCREL - On a symbol operand this indicates that the immediate is offset to the GOT entry for th...
bool isX86_64ExtendedReg(unsigned RegNo)
Describe properties that are true of each instruction in the target description file.
@ MRMSrcMemOp4
MRMSrcMemOp4 - This form is used for instructions that use the Mod/RM byte to specify the fourth sour...
@ XOP
XOP - Opcode prefix used by XOP instructions.
@ ThreeDNow
ThreeDNow - This indicates that the instruction uses the wacky 0x0F 0x0F prefix for 3DNow!...
@ MO_TLVP_PIC_BASE
MO_TLVP_PIC_BASE - On a symbol operand this indicates that the immediate is some TLS offset from the ...
FirstMacroFusionInstKind classifyFirstOpcodeInMacroFusion(unsigned Opcode)
@ VEX_LShift
VEX_L - Stands for a bit in the VEX opcode prefix meaning the current instruction uses 256-bit wide r...
@ MRMDestReg
MRMDestReg - This form is used for instructions that use the Mod/RM byte to specify a destination,...
bool isImmSigned(uint64_t TSFlags)
@ MO_DARWIN_NONLAZY_PIC_BASE
MO_DARWIN_NONLAZY_PIC_BASE - On a symbol operand "FOO", this indicates that the reference is actually...
unsigned getOperandBias(const MCInstrDesc &Desc)
Compute whether all of the def operands are repeated in the uses and therefore should be skipped.
IPREFIXES
The constants to describe instr prefixes if there are.
@ MO_GOTNTPOFF
MO_GOTNTPOFF - On a symbol operand this indicates that the immediate is the offset of the GOT entry w...
@ MO_PIC_BASE_OFFSET
MO_PIC_BASE_OFFSET - On a symbol operand this indicates that the immediate should get the value of th...
@ VEX_4VShift
VEX_4V - Used to specify an additional AVX/SSE register.
@ MO_DTPOFF
MO_DTPOFF - On a symbol operand this indicates that the immediate is the offset of the GOT entry with...
@ MRMSrcMemCC
MRMSrcMemCC - This form is used for instructions that use the Mod/RM byte to specify the operands and...
@ AddrSegmentReg
AddrSegmentReg - The operand # of the segment in the memory operand.
@ MRM_C0
MRM_XX - A mod/rm byte of exactly 0xXX.
@ MRMXr
MRMXr - This form is used for instructions that use the Mod/RM byte to specify a register source,...
@ MRMSrcMem
MRMSrcMem - This form is used for instructions that use the Mod/RM byte to specify a source,...
@ RawFrmMemOffs
RawFrmMemOffs - This form is for instructions that store an absolute memory offset as an immediate wi...
STATIC_ROUNDING
AVX512 static rounding constants.
@ MRMSrcMemFSIB
MRMSrcMem - But force to use the SIB field.
@ MO_DLLIMPORT
MO_DLLIMPORT - On a symbol operand "FOO", this indicates that the reference is actually to the "__imp...
bool isPrefix(uint64_t TSFlags)
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
SecondMacroFusionInstKind classifySecondCondCodeInMacroFusion(X86::CondCode CC)
AlignBranchBoundaryKind
Defines the possible values of the branch boundary alignment mask.
static bool is32ExtendedReg(unsigned RegNo)
bool isPseudo(uint64_t TSFlags)
bool isMacroFused(FirstMacroFusionInstKind FirstKind, SecondMacroFusionInstKind SecondKind)
@ MRMXrCC
MRMXCCr - This form is used for instructions that use the Mod/RM byte to specify a register source,...
unsigned getSizeOfImm(uint64_t TSFlags)
Decode the "size of immediate" field from the TSFlags field of the specified instruction.
@ MRMSrcRegCC
MRMSrcRegCC - This form is used for instructions that use the Mod/RM byte to specify the operands and...
TOF
Target Operand Flag enum.
@ MRMDestMem
MRMDestMem - This form is used for instructions that use the Mod/RM byte to specify a destination,...
bool isKMasked(uint64_t TSFlags)
@ MO_TLSLD
MO_TLSLD - On a symbol operand this indicates that the immediate is the offset of the GOT entry with ...
SecondMacroFusionInstKind
EncodingOfSegmentOverridePrefix getSegmentOverridePrefixForReg(unsigned Reg)
Given a segment register, return the encoding of the segment override prefix for it.
EncodingOfSegmentOverridePrefix
Defines the encoding values for segment override prefix.
bool isKMergeMasked(uint64_t TSFlags)
@ MRMDestMemFSIB
MRMDestMem - But force to use the SIB field.
@ MRMr0
MRM[0-7][rm] - These forms are used to represent instructions that use a Mod/RM byte,...
@ MRMSrcReg4VOp3
MRMSrcReg4VOp3 - This form is used for instructions that encode operand 3 with VEX....
@ RawFrmDstSrc
RawFrmDstSrc - This form is for instructions that use the source index register SI/ESI/RSI with a pos...
bool isX86_64NonExtLowByteReg(unsigned reg)
@ MO_ABS8
MO_ABS8 - On a symbol operand this indicates that the symbol is known to be an absolute symbol in ran...
@ MO_NTPOFF
MO_NTPOFF - On a symbol operand this indicates that the immediate is the negative thread-pointer offs...
Unrolling by would eliminate the &in both leading to a net reduction in code size The resultant code would then also be suitable for exit value computation We miss a bunch of rotate opportunities on various including etc On X86
int getOperandConstraint(unsigned OpNum, MCOI::OperandConstraint Constraint) const
Returns the value of the specified operand constraint if it is present.
unsigned getNumOperands() const
Return the number of declared MachineOperands for this MachineInstruction.
@ OPERAND_ROUNDING_CONTROL
AVX512 embedded rounding control. This should only have values 0-3.
@ MRMSrcMem4VOp3
MRMSrcMem4VOp3 - This form is used for instructions that encode operand 3 with VEX....