LLVM 19.0.0git
X86ELFObjectWriter.cpp
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1//===-- X86ELFObjectWriter.cpp - X86 ELF Writer ---------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
12#include "llvm/MC/MCAsmInfo.h"
13#include "llvm/MC/MCContext.h"
15#include "llvm/MC/MCExpr.h"
16#include "llvm/MC/MCFixup.h"
18#include "llvm/MC/MCValue.h"
20#include <cassert>
21#include <cstdint>
22
23using namespace llvm;
24
25namespace {
26
27class X86ELFObjectWriter : public MCELFObjectTargetWriter {
28public:
29 X86ELFObjectWriter(bool IsELF64, uint8_t OSABI, uint16_t EMachine);
30 ~X86ELFObjectWriter() override = default;
31
32protected:
33 unsigned getRelocType(MCContext &Ctx, const MCValue &Target,
34 const MCFixup &Fixup, bool IsPCRel) const override;
35};
36
37} // end anonymous namespace
38
39X86ELFObjectWriter::X86ELFObjectWriter(bool IsELF64, uint8_t OSABI,
40 uint16_t EMachine)
41 : MCELFObjectTargetWriter(IsELF64, OSABI, EMachine,
42 // Only i386 and IAMCU use Rel instead of RelA.
43 /*HasRelocationAddend*/
44 (EMachine != ELF::EM_386) &&
45 (EMachine != ELF::EM_IAMCU)) {}
46
48
51 bool &IsPCRel) {
52 switch (unsigned(Kind)) {
53 default:
54 llvm_unreachable("Unimplemented");
55 case FK_NONE:
56 return RT64_NONE;
58 Modifier = MCSymbolRefExpr::VK_GOT;
59 IsPCRel = true;
60 return RT64_64;
61 case FK_Data_8:
62 return RT64_64;
65 if (Modifier == MCSymbolRefExpr::VK_None && !IsPCRel)
66 return RT64_32S;
67 return RT64_32;
69 Modifier = MCSymbolRefExpr::VK_GOT;
70 IsPCRel = true;
71 return RT64_32;
72 case FK_Data_4:
73 case FK_PCRel_4:
78 return RT64_32;
80 Modifier = MCSymbolRefExpr::VK_PLT;
81 return RT64_32;
82 case FK_PCRel_2:
83 case FK_Data_2:
84 return RT64_16;
85 case FK_PCRel_1:
86 case FK_Data_1:
87 return RT64_8;
88 }
89}
90
91static void checkIs32(MCContext &Ctx, SMLoc Loc, X86_64RelType Type) {
92 if (Type != RT64_32)
93 Ctx.reportError(Loc,
94 "32 bit reloc applied to a field with a different size");
95}
96
97static void checkIs64(MCContext &Ctx, SMLoc Loc, X86_64RelType Type) {
98 if (Type != RT64_64)
99 Ctx.reportError(Loc,
100 "64 bit reloc applied to a field with a different size");
101}
102
103static unsigned getRelocType64(MCContext &Ctx, SMLoc Loc,
105 X86_64RelType Type, bool IsPCRel,
106 MCFixupKind Kind) {
107 switch (Modifier) {
108 default:
109 llvm_unreachable("Unimplemented");
112 switch (Type) {
113 case RT64_NONE:
114 if (Modifier == MCSymbolRefExpr::VK_None)
115 return ELF::R_X86_64_NONE;
116 llvm_unreachable("Unimplemented");
117 case RT64_64:
118 return IsPCRel ? ELF::R_X86_64_PC64 : ELF::R_X86_64_64;
119 case RT64_32:
120 return IsPCRel ? ELF::R_X86_64_PC32 : ELF::R_X86_64_32;
121 case RT64_32S:
122 return ELF::R_X86_64_32S;
123 case RT64_16:
124 return IsPCRel ? ELF::R_X86_64_PC16 : ELF::R_X86_64_16;
125 case RT64_8:
126 return IsPCRel ? ELF::R_X86_64_PC8 : ELF::R_X86_64_8;
127 }
128 llvm_unreachable("unexpected relocation type!");
130 switch (Type) {
131 case RT64_64:
132 return IsPCRel ? ELF::R_X86_64_GOTPC64 : ELF::R_X86_64_GOT64;
133 case RT64_32:
134 return IsPCRel ? ELF::R_X86_64_GOTPC32 : ELF::R_X86_64_GOT32;
135 case RT64_32S:
136 case RT64_16:
137 case RT64_8:
138 case RT64_NONE:
139 llvm_unreachable("Unimplemented");
140 }
141 llvm_unreachable("unexpected relocation type!");
143 assert(!IsPCRel);
144 if (Type != RT64_64)
145 Ctx.reportError(Loc, "unsupported relocation type");
146 return ELF::R_X86_64_GOTOFF64;
148 assert(!IsPCRel);
149 switch (Type) {
150 case RT64_64:
151 return ELF::R_X86_64_TPOFF64;
152 case RT64_32:
153 return ELF::R_X86_64_TPOFF32;
154 case RT64_32S:
155 case RT64_16:
156 case RT64_8:
157 case RT64_NONE:
158 llvm_unreachable("Unimplemented");
159 }
160 llvm_unreachable("unexpected relocation type!");
162 assert(!IsPCRel);
163 switch (Type) {
164 case RT64_64:
165 return ELF::R_X86_64_DTPOFF64;
166 case RT64_32:
167 return ELF::R_X86_64_DTPOFF32;
168 case RT64_32S:
169 case RT64_16:
170 case RT64_8:
171 case RT64_NONE:
172 llvm_unreachable("Unimplemented");
173 }
174 llvm_unreachable("unexpected relocation type!");
176 assert(!IsPCRel);
177 switch (Type) {
178 case RT64_64:
179 return ELF::R_X86_64_SIZE64;
180 case RT64_32:
181 return ELF::R_X86_64_SIZE32;
182 case RT64_32S:
183 case RT64_16:
184 case RT64_8:
185 case RT64_NONE:
186 llvm_unreachable("Unimplemented");
187 }
188 llvm_unreachable("unexpected relocation type!");
190 return ELF::R_X86_64_TLSDESC_CALL;
192 return ELF::R_X86_64_GOTPC32_TLSDESC;
194 checkIs32(Ctx, Loc, Type);
195 return ELF::R_X86_64_TLSGD;
197 checkIs32(Ctx, Loc, Type);
198 return ELF::R_X86_64_GOTTPOFF;
200 checkIs32(Ctx, Loc, Type);
201 return ELF::R_X86_64_TLSLD;
203 checkIs32(Ctx, Loc, Type);
204 return ELF::R_X86_64_PLT32;
206 checkIs32(Ctx, Loc, Type);
207 // Older versions of ld.bfd/ld.gold/lld
208 // do not support GOTPCRELX/REX_GOTPCRELX,
209 // and we want to keep back-compatibility.
210 if (!Ctx.getAsmInfo()->canRelaxRelocations())
211 return ELF::R_X86_64_GOTPCREL;
212 switch (unsigned(Kind)) {
213 default:
214 return ELF::R_X86_64_GOTPCREL;
216 return ELF::R_X86_64_GOTPCRELX;
219 return ELF::R_X86_64_REX_GOTPCRELX;
220 }
221 llvm_unreachable("unexpected relocation type!");
223 checkIs32(Ctx, Loc, Type);
224 return ELF::R_X86_64_GOTPCREL;
226 checkIs64(Ctx, Loc, Type);
227 return ELF::R_X86_64_PLTOFF64;
228 }
229}
230
232
233static unsigned getRelocType32(MCContext &Ctx, SMLoc Loc,
235 X86_32RelType Type, bool IsPCRel,
236 MCFixupKind Kind) {
237 switch (Modifier) {
238 default:
239 llvm_unreachable("Unimplemented");
242 switch (Type) {
243 case RT32_NONE:
244 if (Modifier == MCSymbolRefExpr::VK_None)
245 return ELF::R_386_NONE;
246 llvm_unreachable("Unimplemented");
247 case RT32_32:
248 return IsPCRel ? ELF::R_386_PC32 : ELF::R_386_32;
249 case RT32_16:
250 return IsPCRel ? ELF::R_386_PC16 : ELF::R_386_16;
251 case RT32_8:
252 return IsPCRel ? ELF::R_386_PC8 : ELF::R_386_8;
253 }
254 llvm_unreachable("unexpected relocation type!");
256 if (Type != RT32_32)
257 break;
258 if (IsPCRel)
259 return ELF::R_386_GOTPC;
260 // Older versions of ld.bfd/ld.gold/lld do not support R_386_GOT32X and we
261 // want to maintain compatibility.
262 if (!Ctx.getAsmInfo()->canRelaxRelocations())
263 return ELF::R_386_GOT32;
264
266 ? ELF::R_386_GOT32X
267 : ELF::R_386_GOT32;
269 assert(!IsPCRel);
270 if (Type != RT32_32)
271 break;
272 return ELF::R_386_GOTOFF;
274 return ELF::R_386_TLS_DESC_CALL;
276 return ELF::R_386_TLS_GOTDESC;
278 if (Type != RT32_32)
279 break;
280 assert(!IsPCRel);
281 return ELF::R_386_TLS_LE_32;
283 if (Type != RT32_32)
284 break;
285 assert(!IsPCRel);
286 return ELF::R_386_TLS_LDO_32;
288 if (Type != RT32_32)
289 break;
290 assert(!IsPCRel);
291 return ELF::R_386_TLS_GD;
293 if (Type != RT32_32)
294 break;
295 assert(!IsPCRel);
296 return ELF::R_386_TLS_IE_32;
298 if (Type != RT32_32)
299 break;
300 return ELF::R_386_PLT32;
302 if (Type != RT32_32)
303 break;
304 assert(!IsPCRel);
305 return ELF::R_386_TLS_IE;
307 if (Type != RT32_32)
308 break;
309 assert(!IsPCRel);
310 return ELF::R_386_TLS_LE;
312 if (Type != RT32_32)
313 break;
314 assert(!IsPCRel);
315 return ELF::R_386_TLS_GOTIE;
317 if (Type != RT32_32)
318 break;
319 assert(!IsPCRel);
320 return ELF::R_386_TLS_LDM;
321 }
322 Ctx.reportError(Loc, "unsupported relocation type");
323 return ELF::R_386_NONE;
324}
325
326unsigned X86ELFObjectWriter::getRelocType(MCContext &Ctx, const MCValue &Target,
327 const MCFixup &Fixup,
328 bool IsPCRel) const {
329 MCFixupKind Kind = Fixup.getKind();
330 if (Kind >= FirstLiteralRelocationKind)
332 MCSymbolRefExpr::VariantKind Modifier = Target.getAccessVariant();
333 X86_64RelType Type = getType64(Kind, Modifier, IsPCRel);
334 if (getEMachine() == ELF::EM_X86_64)
335 return getRelocType64(Ctx, Fixup.getLoc(), Modifier, Type, IsPCRel, Kind);
336
337 assert((getEMachine() == ELF::EM_386 || getEMachine() == ELF::EM_IAMCU) &&
338 "Unsupported ELF machine type.");
339
340 X86_32RelType RelType = RT32_NONE;
341 switch (Type) {
342 case RT64_NONE:
343 break;
344 case RT64_64:
345 Ctx.reportError(Fixup.getLoc(), "unsupported relocation type");
346 return ELF::R_386_NONE;
347 case RT64_32:
348 case RT64_32S:
349 RelType = RT32_32;
350 break;
351 case RT64_16:
352 RelType = RT32_16;
353 break;
354 case RT64_8:
355 RelType = RT32_8;
356 break;
357 }
358 return getRelocType32(Ctx, Fixup.getLoc(), Modifier, RelType, IsPCRel, Kind);
359}
360
361std::unique_ptr<MCObjectTargetWriter>
362llvm::createX86ELFObjectWriter(bool IsELF64, uint8_t OSABI, uint16_t EMachine) {
363 return std::make_unique<X86ELFObjectWriter>(IsELF64, OSABI, EMachine);
364}
PowerPC TLS Dynamic Call Fixup
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
@ RT64_NONE
@ RT64_32S
static void checkIs64(MCContext &Ctx, SMLoc Loc, X86_64RelType Type)
static X86_64RelType getType64(MCFixupKind Kind, MCSymbolRefExpr::VariantKind &Modifier, bool &IsPCRel)
static void checkIs32(MCContext &Ctx, SMLoc Loc, X86_64RelType Type)
static unsigned getRelocType32(MCContext &Ctx, SMLoc Loc, MCSymbolRefExpr::VariantKind Modifier, X86_32RelType Type, bool IsPCRel, MCFixupKind Kind)
static unsigned getRelocType64(MCContext &Ctx, SMLoc Loc, MCSymbolRefExpr::VariantKind Modifier, X86_64RelType Type, bool IsPCRel, MCFixupKind Kind)
bool canRelaxRelocations() const
Definition: MCAsmInfo.h:888
Context object for machine code objects.
Definition: MCContext.h:76
const MCAsmInfo * getAsmInfo() const
Definition: MCContext.h:446
void reportError(SMLoc L, const Twine &Msg)
Definition: MCContext.cpp:1064
virtual unsigned getRelocType(MCContext &Ctx, const MCValue &Target, const MCFixup &Fixup, bool IsPCRel) const =0
Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...
Definition: MCFixup.h:71
This represents an "assembler immediate".
Definition: MCValue.h:36
Represents a location in source code.
Definition: SMLoc.h:23
Target - Wrapper for Target specific information.
The instances of the Type class are immutable: once they are created, they are never changed.
Definition: Type.h:45
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
@ EM_386
Definition: ELF.h:136
@ EM_X86_64
Definition: ELF.h:178
@ EM_IAMCU
Definition: ELF.h:139
@ reloc_global_offset_table8
Definition: X86FixupKinds.h:31
@ reloc_signed_4byte_relax
Definition: X86FixupKinds.h:26
@ reloc_branch_4byte_pcrel
Definition: X86FixupKinds.h:32
@ reloc_riprel_4byte_relax
Definition: X86FixupKinds.h:19
@ reloc_signed_4byte
Definition: X86FixupKinds.h:23
@ reloc_riprel_4byte_relax_rex
Definition: X86FixupKinds.h:21
@ reloc_global_offset_table
Definition: X86FixupKinds.h:28
@ reloc_riprel_4byte_movq_load
Definition: X86FixupKinds.h:18
@ reloc_riprel_4byte
Definition: X86FixupKinds.h:17
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
MCFixupKind
Extensible enumeration to represent the type of a fixup.
Definition: MCFixup.h:21
@ FK_PCRel_4
A four-byte pc relative fixup.
Definition: MCFixup.h:30
@ FK_PCRel_2
A two-byte pc relative fixup.
Definition: MCFixup.h:29
@ FirstLiteralRelocationKind
The range [FirstLiteralRelocationKind, MaxTargetFixupKind) is used for relocations coming from ....
Definition: MCFixup.h:50
@ FK_Data_8
A eight-byte fixup.
Definition: MCFixup.h:26
@ FK_Data_1
A one-byte fixup.
Definition: MCFixup.h:23
@ FK_Data_4
A four-byte fixup.
Definition: MCFixup.h:25
@ FK_NONE
A no-op fixup.
Definition: MCFixup.h:22
@ FK_PCRel_1
A one-byte pc relative fixup.
Definition: MCFixup.h:28
@ FK_Data_2
A two-byte fixup.
Definition: MCFixup.h:24
std::unique_ptr< MCObjectTargetWriter > createX86ELFObjectWriter(bool IsELF64, uint8_t OSABI, uint16_t EMachine)
Construct an X86 ELF object writer.