LLVM 23.0.0git
X86InsertX87Wait.cpp
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1// X86InsertX87Wait.cpp - Strict-Fp:Insert wait instruction X87 instructions //
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file defines the pass which insert x86 wait instructions after each
10// X87 instructions when strict float is enabled.
11//
12// The logic to insert a wait instruction after an X87 instruction is as below:
13// 1. If the X87 instruction don't raise float exception nor is a load/store
14// instruction, or is a x87 control instruction, don't insert wait.
15// 2. If the X87 instruction is an instruction which the following instruction
16// is an X87 exception synchronizing X87 instruction, don't insert wait.
17// 3. For other situations, insert wait instruction.
18//
19//===----------------------------------------------------------------------===//
20
21#include "X86.h"
22#include "X86InstrInfo.h"
23#include "X86Subtarget.h"
30#include "llvm/IR/DebugLoc.h"
31#include "llvm/Support/Debug.h"
32
33using namespace llvm;
34
35#define DEBUG_TYPE "x86-insert-x87-wait"
36
37namespace {
38
39class X86InsertX87WaitLegacy : public MachineFunctionPass {
40public:
41 static char ID;
42
43 X86InsertX87WaitLegacy() : MachineFunctionPass(ID) {}
44
45 bool runOnMachineFunction(MachineFunction &MF) override;
46
47 StringRef getPassName() const override {
48 return "X86 insert wait instruction";
49 }
50};
51} // end anonymous namespace
52
53char X86InsertX87WaitLegacy::ID = 0;
54
56 return new X86InsertX87WaitLegacy();
57}
58
60 switch (MI.getOpcode()) {
61 case X86::FNINIT:
62 case X86::FLDCW16m:
63 case X86::FNSTCW16m:
64 case X86::FNSTSW16r:
65 case X86::FNSTSWm:
66 case X86::FNCLEX:
67 case X86::FLDENVm:
68 case X86::FSTENVm:
69 case X86::FRSTORm:
70 case X86::FSAVEm:
71 case X86::FINCSTP:
72 case X86::FDECSTP:
73 case X86::FFREE:
74 case X86::FFREEP:
75 case X86::FNOP:
76 case X86::WAIT:
77 return true;
78 default:
79 return false;
80 }
81}
82
84 // a few special control instructions don't perform a wait operation
85 switch (MI.getOpcode()) {
86 case X86::FNINIT:
87 case X86::FNSTSW16r:
88 case X86::FNSTSWm:
89 case X86::FNSTCW16m:
90 case X86::FNCLEX:
91 return true;
92 default:
93 return false;
94 }
95}
96
98 if (!MF.getFunction().hasFnAttribute(Attribute::StrictFP))
99 return false;
100
101 const X86Subtarget &ST = MF.getSubtarget<X86Subtarget>();
102 const X86InstrInfo *TII = ST.getInstrInfo();
103 bool Changed = false;
104
105 for (MachineBasicBlock &MBB : MF) {
106 for (MachineBasicBlock::iterator MI = MBB.begin(); MI != MBB.end(); ++MI) {
107 // Jump non X87 instruction.
109 continue;
110 // If the instruction instruction neither has float exception nor is
111 // a load/store instruction, or the instruction is x87 control
112 // instruction, do not insert wait.
113 if (!(MI->mayRaiseFPException() || MI->mayLoadOrStore()) ||
115 continue;
116 // If the following instruction is an X87 instruction and isn't an X87
117 // non-waiting control instruction, we can omit insert wait instruction.
118 MachineBasicBlock::iterator AfterMI = std::next(MI);
119 if (AfterMI != MBB.end() && X86::isX87Instruction(*AfterMI) &&
121 continue;
122
123 BuildMI(MBB, AfterMI, MI->getDebugLoc(), TII->get(X86::WAIT));
124 LLVM_DEBUG(dbgs() << "\nInsert wait after:\t" << *MI);
125 // Jump the newly inserting wait
126 ++MI;
127 Changed = true;
128 }
129 }
130 return Changed;
131}
132
133bool X86InsertX87WaitLegacy::runOnMachineFunction(MachineFunction &MF) {
134 return insertWaitInstruction(MF);
135}
136
MachineBasicBlock & MBB
const HexagonInstrInfo * TII
IRTranslator LLVM IR MI
#define LLVM_DEBUG(...)
Definition Debug.h:114
static bool isX87ControlInstruction(MachineInstr &MI)
static bool insertWaitInstruction(MachineFunction &MF)
static bool isX87NonWaitingControlInstruction(MachineInstr &MI)
Represents analyses that only rely on functions' control flow.
Definition Analysis.h:73
FunctionPass class - This class is used to implement most global optimizations.
Definition Pass.h:314
bool hasFnAttribute(Attribute::AttrKind Kind) const
Return true if the function has the attribute.
Definition Function.cpp:729
MachineInstrBundleIterator< MachineInstr > iterator
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Function & getFunction()
Return the LLVM function that this machine code represents.
Representation of each machine instruction.
A set of analyses that are preserved following a run of a transformation pass.
Definition Analysis.h:112
static PreservedAnalyses all()
Construct a special preserved set that preserves all passes.
Definition Analysis.h:118
PreservedAnalyses & preserveSet()
Mark an analysis set as preserved.
Definition Analysis.h:151
StringRef - Represent a constant reference to a string, i.e.
Definition StringRef.h:55
PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &)
Changed
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition CallingConv.h:24
bool isX87Instruction(MachineInstr &MI)
Check if the instruction is X87 instruction.
This is an optimization pass for GlobalISel generic memory operations.
Definition Types.h:26
MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
FunctionPass * createX86InsertX87WaitLegacyPass()
AnalysisManager< MachineFunction > MachineFunctionAnalysisManager
LLVM_ABI PreservedAnalyses getMachineFunctionPassPreservedAnalyses()
Returns the minimum set of Analyses that all machine function passes must preserve.
LLVM_ABI raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition Debug.cpp:207