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LLVM 23.0.0git
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#include "AArch64Disassembler.h"#include "AArch64ExternalSymbolizer.h"#include "MCTargetDesc/AArch64AddressingModes.h"#include "MCTargetDesc/AArch64MCTargetDesc.h"#include "TargetInfo/AArch64TargetInfo.h"#include "Utils/AArch64BaseInfo.h"#include "llvm/MC/MCDecoder.h"#include "llvm/MC/MCDecoderOps.h"#include "llvm/MC/MCDisassembler/MCRelocationInfo.h"#include "llvm/MC/MCInst.h"#include "llvm/MC/MCInstrDesc.h"#include "llvm/MC/MCRegisterInfo.h"#include "llvm/MC/MCSubtargetInfo.h"#include "llvm/MC/TargetRegistry.h"#include "llvm/Support/Compiler.h"#include "llvm/Support/Debug.h"#include <memory>#include "AArch64GenDisassemblerTables.inc"#include "AArch64GenInstrInfo.inc"Go to the source code of this file.
Macros | |
| #define | DEBUG_TYPE "aarch64-disassembler" |
| #define | Success MCDisassembler::Success |
| #define | Fail MCDisassembler::Fail |
| #define | SoftFail MCDisassembler::SoftFail |
Typedefs | |
| using | DecodeStatus = MCDisassembler::DecodeStatus |
| #define DEBUG_TYPE "aarch64-disassembler" |
Definition at line 33 of file AArch64Disassembler.cpp.
| #define Fail MCDisassembler::Fail |
Definition at line 46 of file AArch64Disassembler.cpp.
Referenced by checkedGetHex(), DecodeAddSubERegInstruction(), DecodeAddSubImmShift(), DecodeAdrInstruction(), DecodeAuthLoadInstruction(), DecodeExclusiveLdStInstruction(), DecodeGPR64x8ClassRegisterClass(), DecodeGPRSeqPairsClassRegisterClass(), DecodeHinteUImm16(), DecodeImm8OptLsl(), DecodeLogicalImmInstruction(), DecodeMatrixTileListRegisterClass(), DecodeMoveImmInstruction(), DecodeMulMinMaxRegisterClass(), DecodePairLdStInstruction(), DecodePCRelLabel16(), DecodePPR2Mul2RegisterClass(), DecodePRFMRegInstruction(), DecodeSignedLdStInstruction(), DecodeSImm(), DecodeSimpleRegisterClass(), DecodeSVCROp(), DecodeSVELogicalImmInstruction(), DecodeSyspXzrInstruction(), DecodeSystemPStateImm0_15Instruction(), DecodeSystemPStateImm0_1Instruction(), DecodeThreeAddrSRegInstruction(), DecodeUImm(), DecodeUnsignedLdStInstruction(), DecodeZK(), DecodeZPR2Mul2RegisterClass(), DecodeZPR4Mul4RegisterClass(), llvm::object::MachOObjectFile::getChainedFixupsSegments(), parseThunkName(), NodeArray::printAsString(), llvm::orc::detail::WaitingOnGraphOpReplay< ContainerIdT, ElementIdT >::Replayer::replay(), llvm::sys::RetryAfterSignal(), safeToMergeTerminators(), and llvm::BTFParser::symbolize().
| #define SoftFail MCDisassembler::SoftFail |
Definition at line 47 of file AArch64Disassembler.cpp.
Referenced by DecodeAuthLoadInstruction(), DecodeExclusiveLdStInstruction(), DecodePairLdStInstruction(), and DecodeSignedLdStInstruction().
| #define Success MCDisassembler::Success |
Definition at line 45 of file AArch64Disassembler.cpp.
Referenced by canRenameUntilSecondLoad(), collectMetadataInfo(), combineIRFlags(), computeLabelDiff(), createCmpXchgInstFun(), DecodeAddSubERegInstruction(), DecodeAddSubImmShift(), DecodeAdrInstruction(), DecodeAuthLoadInstruction(), DecodeExclusiveLdStInstruction(), DecodeFixedPointScaleImm32(), DecodeFixedPointScaleImm64(), DecodeFMOVLaneInstruction(), DecodeGPR64x8ClassRegisterClass(), DecodeGPRSeqPairsClassRegisterClass(), DecodeHinteUImm16(), DecodeImm8OptLsl(), DecodeLogicalImmInstruction(), DecodeMatrixTileListRegisterClass(), DecodeMemExtend(), DecodeModImmInstruction(), DecodeModImmTiedInstruction(), DecodeMoveImmInstruction(), DecodeMPR128RegisterClass(), DecodeMPR16RegisterClass(), DecodeMPR32RegisterClass(), DecodeMPR64RegisterClass(), DecodeMPR8RegisterClass(), DecodeMPRRegisterClass(), DecodeMRSSystemRegister(), DecodeMSRSystemRegister(), DecodeMulMinMaxRegisterClass(), DecodePairLdStInstruction(), DecodePCRelLabel16(), DecodePCRelLabel19(), DecodePCRelLabel9(), DecodePPR2Mul2RegisterClass(), DecodePRFMRegInstruction(), DecodeSignedLdStInstruction(), DecodeSImm(), DecodeSimpleRegisterClass(), DecodeSMESpillFillInstruction(), DecodeSVCROp(), DecodeSVEIncDecImm(), DecodeSVELogicalImmInstruction(), DecodeSyspXzrInstruction(), DecodeSystemPStateImm0_15Instruction(), DecodeSystemPStateImm0_1Instruction(), DecodeTestAndBranch(), DecodeThreeAddrSRegInstruction(), DecodeUImm(), DecodeUnconditionalBranch(), DecodeUnsignedLdStInstruction(), DecodeVecShiftLImm(), DecodeVecShiftRImm(), DecodeZeroImm(), DecodeZK(), DecodeZPR2Mul2RegisterClass(), DecodeZPR4Mul4RegisterClass(), DecodeZTRRegisterClass(), emitLoad(), emitStore(), getCompoundInsn(), insertCSRSaves(), LowerCMP_SWAP(), mergeCompatibleInvokesImpl(), and sinkLastInstruction().
Definition at line 36 of file AArch64Disassembler.cpp.
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Definition at line 1643 of file AArch64Disassembler.cpp.
References T.
Referenced by LLVMInitializeAArch64Disassembler().
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Definition at line 1687 of file AArch64Disassembler.cpp.
Referenced by LLVMInitializeAArch64Disassembler().
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Definition at line 1052 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), Fail, llvm::MCD::fieldFromInstruction(), llvm::MCInst::getOpcode(), and Success.
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Definition at line 1240 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), Fail, llvm::MCD::fieldFromInstruction(), Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
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Definition at line 1225 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), Fail, llvm::MCD::fieldFromInstruction(), llvm::SignExtend64(), Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
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Definition at line 1017 of file AArch64Disassembler.cpp.
References DecodeSImm(), DecodeSimpleRegisterClass(), Fail, llvm::MCD::fieldFromInstruction(), llvm::MCInst::getOpcode(), SoftFail, and Success.
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Definition at line 1497 of file AArch64Disassembler.cpp.
References DecodeSimpleRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCD::fieldFromInstruction(), and llvm::MCDisassembler::Success.
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Definition at line 759 of file AArch64Disassembler.cpp.
References DecodeSimpleRegisterClass(), Fail, llvm::MCD::fieldFromInstruction(), llvm::MCInst::getOpcode(), SoftFail, and Success.
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Definition at line 200 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and Success.
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Definition at line 209 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and Success.
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Definition at line 278 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), llvm::MCD::fieldFromInstruction(), and Success.
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Definition at line 63 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
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Definition at line 1363 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, Reg, and Success.
Referenced by DecodeWSeqPairsClassRegisterClass(), and DecodeXSeqPairsClassRegisterClass().
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Definition at line 1470 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Fail, and Success.
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Definition at line 1459 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Fail, and Success.
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Definition at line 1127 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), Fail, llvm::MCD::fieldFromInstruction(), llvm::MCInst::getOpcode(), llvm::AArch64_AM::isValidDecodeLogicalImmediate(), and Success.
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Definition at line 126 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Fail, and Success.
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Definition at line 252 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and Success.
Referenced by DecodePRFMRegInstruction().
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Definition at line 1164 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), llvm::MCD::fieldFromInstruction(), llvm::MCInst::getOpcode(), and Success.
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Definition at line 1205 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), llvm::MCD::fieldFromInstruction(), and Success.
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Definition at line 451 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), Fail, llvm::MCD::fieldFromInstruction(), llvm::MCInst::getOpcode(), llvm::MCInst::getOperand(), Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
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Definition at line 180 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Reg, and Success.
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Definition at line 153 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Reg, and Success.
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Definition at line 162 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Reg, and Success.
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Definition at line 171 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Reg, and Success.
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Definition at line 147 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), and Success.
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Definition at line 141 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), and Success.
Referenced by DecodeSMESpillFillInstruction().
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Definition at line 260 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and Success.
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Definition at line 270 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and Success.
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Definition at line 79 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, Reg, and Success.
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Definition at line 852 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), Fail, llvm::MCD::fieldFromInstruction(), llvm::MCInst::getOpcode(), llvm::SignExtend64(), SoftFail, and Success.
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Definition at line 216 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Fail, Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
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Definition at line 231 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCInst::getOpcode(), llvm::SignExtend64(), Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
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Definition at line 242 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::SignExtend64(), Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
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Definition at line 189 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
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Definition at line 1583 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeMemExtend(), DecodeSimpleRegisterClass(), Fail, llvm::MCD::fieldFromInstruction(), llvm::MCInst::getOpcode(), and Success.
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Definition at line 1557 of file AArch64Disassembler.cpp.
References DecodeSimpleRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCD::fieldFromInstruction(), and llvm::MCDisassembler::Success.
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Definition at line 1528 of file AArch64Disassembler.cpp.
References DecodeSimpleRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCD::fieldFromInstruction(), and llvm::MCDisassembler::Success.
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Definition at line 556 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), Fail, llvm::MCD::fieldFromInstruction(), llvm::MCInst::getOpcode(), llvm::SignExtend64(), SoftFail, and Success.
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Definition at line 1434 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Fail, and Success.
Referenced by DecodeAuthLoadInstruction().
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Definition at line 50 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
Referenced by DecodeAddSubERegInstruction(), DecodeAddSubImmShift(), DecodeAdrInstruction(), DecodeAuthLoadInstruction(), DecodeCPYMemOpInstruction(), DecodeExclusiveLdStInstruction(), DecodeFMOVLaneInstruction(), DecodeLogicalImmInstruction(), DecodeModImmInstruction(), DecodeModImmTiedInstruction(), DecodeMoveImmInstruction(), DecodePairLdStInstruction(), DecodePRFMRegInstruction(), DecodeSETMemGoOpInstruction(), DecodeSETMemOpInstruction(), DecodeSignedLdStInstruction(), DecodeSMESpillFillInstruction(), DecodeSVELogicalImmInstruction(), DecodeSyspXzrInstruction(), DecodeTestAndBranch(), DecodeThreeAddrSRegInstruction(), and DecodeUnsignedLdStInstruction().
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Definition at line 1621 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeMPRRegisterClass(), DecodeSimpleRegisterClass(), llvm::MCD::fieldFromInstruction(), and Success.
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Definition at line 1488 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Fail, and Success.
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Definition at line 1481 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and Success.
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Definition at line 1411 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), Fail, llvm::MCD::fieldFromInstruction(), llvm::MCInst::getOpcode(), llvm::AArch64_AM::isValidDecodeLogicalImmediate(), and Success.
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Definition at line 1389 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), Fail, llvm::MCD::fieldFromInstruction(), and Success.
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Definition at line 1299 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Fail, llvm::MCD::fieldFromInstruction(), llvm::MCSubtargetInfo::getFeatureBits(), llvm::MCDisassembler::getSubtargetInfo(), isInvalidPState(), and Success.
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Definition at line 1320 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Fail, llvm::MCD::fieldFromInstruction(), llvm::MCSubtargetInfo::getFeatureBits(), llvm::MCDisassembler::getSubtargetInfo(), isInvalidPState(), and Success.
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Definition at line 1341 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), llvm::MCD::fieldFromInstruction(), llvm::SignExtend64(), Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
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Definition at line 384 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), Fail, llvm::MCD::fieldFromInstruction(), llvm::MCInst::getOpcode(), and Success.
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Definition at line 1448 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Fail, and Success.
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Definition at line 1281 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCD::fieldFromInstruction(), llvm::SignExtend64(), Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
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Definition at line 490 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), Fail, llvm::MCD::fieldFromInstruction(), llvm::MCInst::getOpcode(), Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
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Definition at line 371 of file AArch64Disassembler.cpp.
References DecodeVecShiftLImm().
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Definition at line 365 of file AArch64Disassembler.cpp.
References DecodeVecShiftLImm().
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Definition at line 359 of file AArch64Disassembler.cpp.
References DecodeVecShiftLImm().
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Definition at line 377 of file AArch64Disassembler.cpp.
References DecodeVecShiftLImm().
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Definition at line 311 of file AArch64Disassembler.cpp.
References llvm::Add, llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and Success.
Referenced by DecodeVecShiftL16Imm(), DecodeVecShiftL32Imm(), DecodeVecShiftL64Imm(), and DecodeVecShiftL8Imm().
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Definition at line 341 of file AArch64Disassembler.cpp.
References DecodeVecShiftRImm().
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Definition at line 347 of file AArch64Disassembler.cpp.
References DecodeVecShiftRImm().
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Definition at line 329 of file AArch64Disassembler.cpp.
References DecodeVecShiftRImm().
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Definition at line 335 of file AArch64Disassembler.cpp.
References DecodeVecShiftRImm().
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Definition at line 317 of file AArch64Disassembler.cpp.
References DecodeVecShiftRImm().
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Definition at line 323 of file AArch64Disassembler.cpp.
References DecodeVecShiftRImm().
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Definition at line 353 of file AArch64Disassembler.cpp.
References DecodeVecShiftRImm().
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Definition at line 305 of file AArch64Disassembler.cpp.
References llvm::Add, llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and Success.
Referenced by DecodeVecShiftR16Imm(), DecodeVecShiftR16ImmNarrow(), DecodeVecShiftR32Imm(), DecodeVecShiftR32ImmNarrow(), DecodeVecShiftR64Imm(), DecodeVecShiftR64ImmNarrow(), and DecodeVecShiftR8Imm().
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Definition at line 1376 of file AArch64Disassembler.cpp.
References DecodeGPRSeqPairsClassRegisterClass().
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Definition at line 1383 of file AArch64Disassembler.cpp.
References DecodeGPRSeqPairsClassRegisterClass().
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Definition at line 1428 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and Success.
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Definition at line 103 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
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Definition at line 90 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, Reg, and Success.
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Definition at line 114 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
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Definition at line 135 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), and Success.
Definition at line 1292 of file AArch64Disassembler.cpp.
Referenced by DecodeSystemPStateImm0_15Instruction(), and DecodeSystemPStateImm0_1Instruction().
| LLVM_ABI LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAArch64Disassembler | ( | ) |
Definition at line 1696 of file AArch64Disassembler.cpp.
References createAArch64Disassembler(), createAArch64ExternalSymbolizer(), llvm::getTheAArch64_32Target(), llvm::getTheAArch64beTarget(), llvm::getTheAArch64leTarget(), llvm::getTheARM64_32Target(), llvm::getTheARM64Target(), llvm::TargetRegistry::RegisterMCDisassembler(), and llvm::TargetRegistry::RegisterMCSymbolizer().