LLVM 18.0.0git
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1//===- ARMTargetFrameLowering.h - Define frame lowering for ARM -*- C++ -*-===//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
15namespace llvm {
17class ARMSubtarget;
18class CalleeSavedInfo;
19class MachineFunction;
26 explicit ARMFrameLowering(const ARMSubtarget &sti);
28 /// emitProlog/emitEpilog - These methods insert prolog and epilog code into
29 /// the function.
30 void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
31 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
36 const TargetRegisterInfo *TRI) const override;
38 bool
42 const TargetRegisterInfo *TRI) const override;
44 bool keepFramePointer(const MachineFunction &MF) const override;
46 bool enableCalleeSaveSkip(const MachineFunction &MF) const override;
48 bool hasFP(const MachineFunction &MF) const override;
49 bool isFPReserved(const MachineFunction &MF) const;
50 bool hasReservedCallFrame(const MachineFunction &MF) const override;
51 bool canSimplifyCallFramePseudos(const MachineFunction &MF) const override;
53 Register &FrameReg) const override;
54 int ResolveFrameIndexReference(const MachineFunction &MF, int FI,
55 Register &FrameReg, int SPAdj) const;
57 void getCalleeSaves(const MachineFunction &MF,
58 BitVector &SavedRegs) const override;
60 RegScavenger *RS) const override;
63 MachineBasicBlock &MBB) const override;
65 /// Returns true if the target will correctly handle shrink wrapping.
66 bool enableShrinkWrapping(const MachineFunction &MF) const override;
68 bool isProfitableForNoCSROpt(const Function &F) const override {
69 // The no-CSR optimisation is bad for code size on ARM, because we can save
70 // many registers with a single PUSH/POP pair.
71 return false;
72 }
74 bool
77 std::vector<CalleeSavedInfo> &CSI) const override;
79 const SpillSlot *
80 getCalleeSavedSpillSlots(unsigned &NumEntries) const override;
84 ArrayRef<CalleeSavedInfo> CSI, unsigned StmOpc,
85 unsigned StrOpc, bool NoGap, bool (*Func)(unsigned, bool),
86 unsigned NumAlignedDPRCS2Regs, unsigned MIFlags = 0) const;
88 MutableArrayRef<CalleeSavedInfo> CSI, unsigned LdmOpc,
89 unsigned LdrOpc, bool isVarArg, bool NoGap,
90 bool (*Func)(unsigned, bool),
91 unsigned NumAlignedDPRCS2Regs) const;
94 eliminateCallFramePseudoInstr(MachineFunction &MF,
96 MachineBasicBlock::iterator MI) const override;
99} // end namespace llvm
MachineBasicBlock & MBB
IRTranslator LLVM IR MI
#define F(x, y, z)
Definition: MD5.cpp:55
unsigned const TargetRegisterInfo * TRI
bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, MutableArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
restoreCalleeSavedRegisters - Issues instruction(s) to restore all callee saved registers and returns...
bool hasFP(const MachineFunction &MF) const override
hasFP - Return true if the specified function should have a dedicated frame pointer register.
StackOffset getFrameIndexReference(const MachineFunction &MF, int FI, Register &FrameReg) const override
getFrameIndexReference - Provide a base+offset reference to an FI slot for debug info.
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override
emitProlog/emitEpilog - These methods insert prolog and epilog code into the function.
bool enableShrinkWrapping(const MachineFunction &MF) const override
Returns true if the target will correctly handle shrink wrapping.
bool keepFramePointer(const MachineFunction &MF) const override
Return true if the target wants to keep the frame pointer regardless of the function attribute "frame...
bool isProfitableForNoCSROpt(const Function &F) const override
Check if the no-CSR optimisation is profitable for the given function.
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override
bool isFPReserved(const MachineFunction &MF) const
isFPReserved - Return true if the frame pointer register should be considered a reserved register on ...
bool canSimplifyCallFramePseudos(const MachineFunction &MF) const override
canSimplifyCallFramePseudos - If there is a reserved call frame, the call frame pseudos can be simpli...
void adjustForSegmentedStacks(MachineFunction &MF, MachineBasicBlock &MBB) const override
Adjust the prologue to have the function use segmented stacks.
bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, ArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
spillCalleeSavedRegisters - Issues instruction(s) to spill all callee saved registers and returns tru...
bool hasReservedCallFrame(const MachineFunction &MF) const override
hasReservedCallFrame - Under normal circumstances, when a frame pointer is not required,...
const SpillSlot * getCalleeSavedSpillSlots(unsigned &NumEntries) const override
getCalleeSavedSpillSlots - This method returns a pointer to an array of pairs, that contains an entry...
int ResolveFrameIndexReference(const MachineFunction &MF, int FI, Register &FrameReg, int SPAdj) const
void getCalleeSaves(const MachineFunction &MF, BitVector &SavedRegs) const override
Returns the callee-saved registers as computed by determineCalleeSaves in the BitVector SavedRegs.
const ARMSubtarget & STI
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS) const override
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
bool enableCalleeSaveSkip(const MachineFunction &MF) const override
Returns true if the target can safely skip saving callee-saved registers for noreturn nounwind functi...
bool assignCalleeSavedSpillSlots(MachineFunction &MF, const TargetRegisterInfo *TRI, std::vector< CalleeSavedInfo > &CSI) const override
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: ArrayRef.h:41
MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...
Definition: ArrayRef.h:307
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
StackOffset holds a fixed and a scalable offset in bytes.
Definition: TypeSize.h:33
Information about stack frame layout on the target.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18