LLVM  17.0.0git
AVRTargetMachine.cpp
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1 //===-- AVRTargetMachine.cpp - Define TargetMachine for AVR ---------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file defines the AVR specific subclass of TargetMachine.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "AVRTargetMachine.h"
14 
15 #include "llvm/CodeGen/Passes.h"
18 #include "llvm/IR/Module.h"
19 #include "llvm/MC/TargetRegistry.h"
20 
21 #include "AVR.h"
22 #include "AVRMachineFunctionInfo.h"
23 #include "AVRTargetObjectFile.h"
26 
27 #include <optional>
28 
29 namespace llvm {
30 
31 static const char *AVRDataLayout =
32  "e-P1-p:16:8-i8:8-i16:8-i32:8-i64:8-f32:8-f64:8-n8-a:8";
33 
34 /// Processes a CPU name.
35 static StringRef getCPU(StringRef CPU) {
36  if (CPU.empty() || CPU == "generic") {
37  return "avr2";
38  }
39 
40  return CPU;
41 }
42 
43 static Reloc::Model getEffectiveRelocModel(std::optional<Reloc::Model> RM) {
44  return RM.value_or(Reloc::Static);
45 }
46 
48  StringRef CPU, StringRef FS,
49  const TargetOptions &Options,
50  std::optional<Reloc::Model> RM,
51  std::optional<CodeModel::Model> CM,
52  CodeGenOpt::Level OL, bool JIT)
56  SubTarget(TT, std::string(getCPU(CPU)), std::string(FS), *this) {
57  this->TLOF = std::make_unique<AVRTargetObjectFile>();
58  initAsmInfo();
59 }
60 
61 namespace {
62 /// AVR Code Generator Pass Configuration Options.
63 class AVRPassConfig : public TargetPassConfig {
64 public:
65  AVRPassConfig(AVRTargetMachine &TM, PassManagerBase &PM)
66  : TargetPassConfig(TM, PM) {}
67 
68  AVRTargetMachine &getAVRTargetMachine() const {
69  return getTM<AVRTargetMachine>();
70  }
71 
72  void addIRPasses() override;
73  bool addInstSelector() override;
74  void addPreSched2() override;
75  void addPreEmitPass() override;
76 };
77 } // namespace
78 
80  return new AVRPassConfig(*this, PM);
81 }
82 
83 void AVRPassConfig::addIRPasses() {
84  // Expand instructions like
85  // %result = shl i32 %n, %amount
86  // to a loop so that library calls are avoided.
87  addPass(createAVRShiftExpandPass());
88 
90 }
91 
93  // Register the target.
95 
96  auto &PR = *PassRegistry::getPassRegistry();
100 }
101 
103  return &SubTarget;
104 }
105 
107  return &SubTarget;
108 }
109 
112  const TargetSubtargetInfo *STI) const {
113  return AVRMachineFunctionInfo::create<AVRMachineFunctionInfo>(Allocator, F,
114  STI);
115 }
116 
117 //===----------------------------------------------------------------------===//
118 // Pass Pipeline Configuration
119 //===----------------------------------------------------------------------===//
120 
121 bool AVRPassConfig::addInstSelector() {
122  // Install an instruction selector.
123  addPass(createAVRISelDag(getAVRTargetMachine(), getOptLevel()));
124  // Create the frame analyzer pass used by the PEI pass.
125  addPass(createAVRFrameAnalyzerPass());
126 
127  return false;
128 }
129 
130 void AVRPassConfig::addPreSched2() {
131  addPass(createAVRExpandPseudoPass());
132 }
133 
134 void AVRPassConfig::addPreEmitPass() {
135  // Must run branch selection immediately preceding the asm printer.
136  addPass(&BranchRelaxationPassID);
137 }
138 
139 } // end of namespace llvm
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
llvm::TargetMachine::STI
std::unique_ptr< const MCSubtargetInfo > STI
Definition: TargetMachine.h:109
llvm::TargetOptions
Definition: TargetOptions.h:124
llvm::Function
Definition: Function.h:59
llvm::AVRTargetMachine::createMachineFunctionInfo
MachineFunctionInfo * createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F, const TargetSubtargetInfo *STI) const override
Create the target's instance of MachineFunctionInfo.
Definition: AVRTargetMachine.cpp:110
llvm::AVRTargetMachine
A generic AVR implementation.
Definition: AVRTargetMachine.h:30
llvm::Target
Target - Wrapper for Target specific information.
Definition: TargetRegistry.h:149
llvm::Triple
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
llvm::X86AS::FS
@ FS
Definition: X86.h:201
Module.h
T
#define T
Definition: Mips16ISelLowering.cpp:341
LegacyPassManager.h
F
#define F(x, y, z)
Definition: MD5.cpp:55
llvm::AVRTargetMachine::createPassConfig
TargetPassConfig * createPassConfig(PassManagerBase &PM) override
Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of ...
Definition: AVRTargetMachine.cpp:79
llvm::Reloc::Model
Model
Definition: CodeGen.h:25
llvm::MSP430Attrs::CodeModel
CodeModel
Definition: MSP430Attributes.h:37
llvm::PassRegistry::getPassRegistry
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
Definition: PassRegistry.cpp:24
llvm::AVRSubtarget
A specific AVR target MCU.
Definition: AVRSubtarget.h:32
llvm::getTheAVRTarget
Target & getTheAVRTarget()
Definition: AVRTargetInfo.cpp:12
llvm::CodeModel::Small
@ Small
Definition: CodeGen.h:31
llvm::RegisterTargetMachine
RegisterTargetMachine - Helper template for registering a target machine implementation,...
Definition: TargetRegistry.h:1354
Options
const char LLVMTargetMachineRef LLVMPassBuilderOptionsRef Options
Definition: PassBuilderBindings.cpp:48
AVRTargetInfo.h
llvm::initializeAVRExpandPseudoPass
void initializeAVRExpandPseudoPass(PassRegistry &)
X
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang", "erlang-compatible garbage collector")
llvm::initializeAVRDAGToDAGISelPass
void initializeAVRDAGToDAGISelPass(PassRegistry &)
Passes.h
llvm::TargetPassConfig
Target-Independent Code Generator Pass Configuration Options.
Definition: TargetPassConfig.h:84
llvm::StringRef::empty
constexpr bool empty() const
empty - Check if the string is empty.
Definition: StringRef.h:134
llvm::getEffectiveCodeModel
CodeModel::Model getEffectiveCodeModel(std::optional< CodeModel::Model > CM, CodeModel::Model Default)
Helper method for getting the code model, returning Default if CM does not have a value.
Definition: TargetMachine.h:510
llvm::EngineKind::JIT
@ JIT
Definition: ExecutionEngine.h:524
LLVM_EXTERNAL_VISIBILITY
#define LLVM_EXTERNAL_VISIBILITY
Definition: Compiler.h:127
llvm::BumpPtrAllocatorImpl
Allocate memory in an ever growing pool, as if by bump-pointer.
Definition: Allocator.h:63
llvm::TargetPassConfig::addIRPasses
virtual void addIRPasses()
Add common target configurable passes that perform LLVM IR to IR transforms following machine indepen...
Definition: TargetPassConfig.cpp:839
TargetPassConfig.h
AVRTargetMachine.h
AVRMCTargetDesc.h
llvm::getCPU
static StringRef getCPU(StringRef CPU)
Processes a CPU name.
Definition: AVRTargetMachine.cpp:35
llvm::getEffectiveRelocModel
static Reloc::Model getEffectiveRelocModel(std::optional< Reloc::Model > RM)
Definition: AVRTargetMachine.cpp:43
llvm::initializeAVRShiftExpandPass
void initializeAVRShiftExpandPass(PassRegistry &)
llvm::AArch64::RM
@ RM
Definition: AArch64ISelLowering.h:499
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
this
Analysis the ScalarEvolution expression for r is this
Definition: README.txt:8
llvm::AVRTargetMachine::AVRTargetMachine
AVRTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, std::optional< Reloc::Model > RM, std::optional< CodeModel::Model > CM, CodeGenOpt::Level OL, bool JIT)
Definition: AVRTargetMachine.cpp:47
llvm::Reloc::Static
@ Static
Definition: CodeGen.h:25
AVRMachineFunctionInfo.h
llvm::createAVRISelDag
FunctionPass * createAVRISelDag(AVRTargetMachine &TM, CodeGenOpt::Level OptLevel)
Definition: AVRISelDAGToDAG.cpp:583
AVRTargetObjectFile.h
llvm::TargetSubtargetInfo
TargetSubtargetInfo - Generic base class for all target subtargets.
Definition: TargetSubtargetInfo.h:62
llvm::LLVMTargetMachine::initAsmInfo
void initAsmInfo()
Definition: LLVMTargetMachine.cpp:40
std
Definition: BitVector.h:851
llvm::createAVRFrameAnalyzerPass
FunctionPass * createAVRFrameAnalyzerPass()
Creates instance of the frame analyzer pass.
Definition: AVRFrameLowering.cpp:488
llvm::LLVMTargetMachine
This class describes a target machine that is implemented with the LLVM target-independent code gener...
Definition: TargetMachine.h:417
llvm::LLVMInitializeAVRTarget
LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAVRTarget()
Definition: AVRTargetMachine.cpp:92
AVR.h
llvm::BranchRelaxationPassID
char & BranchRelaxationPassID
BranchRelaxation - This pass replaces branches that need to jump further than is supported by a branc...
Definition: BranchRelaxation.cpp:121
Allocator
Basic Register Allocator
Definition: RegAllocBasic.cpp:143
llvm::legacy::PassManagerBase
PassManagerBase - An abstract interface to allow code to add passes to a pass manager without having ...
Definition: LegacyPassManager.h:39
TM
const char LLVMTargetMachineRef TM
Definition: PassBuilderBindings.cpp:47
llvm::AVRDataLayout
static const char * AVRDataLayout
Definition: AVRTargetMachine.cpp:31
llvm::createAVRShiftExpandPass
Pass * createAVRShiftExpandPass()
llvm::CodeGenOpt::Level
Level
Code generation optimization level.
Definition: CodeGen.h:57
llvm::AVRTargetMachine::getSubtargetImpl
const AVRSubtarget * getSubtargetImpl() const
Definition: AVRTargetMachine.cpp:102
TargetRegistry.h
llvm::MachineFunctionInfo
MachineFunctionInfo - This class can be derived from and used by targets to hold private target-speci...
Definition: MachineFunction.h:95
llvm::createAVRExpandPseudoPass
FunctionPass * createAVRExpandPseudoPass()
SpecialSubKind::string
@ string