LLVM 18.0.0git
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This contains a MachineSchedStrategy implementation for maximizing wave occupancy on GCN hardware. More...
#include "GCNSchedStrategy.h"
#include "AMDGPUIGroupLP.h"
#include "SIMachineFunctionInfo.h"
#include "llvm/CodeGen/RegisterClassInfo.h"
Go to the source code of this file.
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struct | EarlierIssuingCycle |
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#define | DEBUG_TYPE "machine-scheduler" |
Generally, the reason for having multiple scheduling stages is to account for the kernel-wide effect of register usage on occupancy. | |
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static void | printScheduleModel (std::set< std::pair< MachineInstr *, unsigned >, EarlierIssuingCycle > &ReadyCycles) |
static bool | hasIGLPInstrs (ScheduleDAGInstrs *DAG) |
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static cl::opt< bool > | DisableUnclusterHighRP ("amdgpu-disable-unclustered-high-rp-reschedule", cl::Hidden, cl::desc("Disable unclustered high register pressure " "reduction scheduling stage."), cl::init(false)) |
static cl::opt< bool > | DisableClusteredLowOccupancy ("amdgpu-disable-clustered-low-occupancy-reschedule", cl::Hidden, cl::desc("Disable clustered low occupancy " "rescheduling for ILP scheduling stage."), cl::init(false)) |
static cl::opt< unsigned > | ScheduleMetricBias ("amdgpu-schedule-metric-bias", cl::Hidden, cl::desc("Sets the bias which adds weight to occupancy vs latency. Set it to " "100 to chase the occupancy only."), cl::init(10)) |
static cl::opt< bool > | RelaxedOcc ("amdgpu-schedule-relaxed-occupancy", cl::Hidden, cl::desc("Relax occupancy targets for kernels which are memory " "bound (amdgpu-membound-threshold), or " "Wave Limited (amdgpu-limit-wave-threshold)."), cl::init(false)) |
This contains a MachineSchedStrategy implementation for maximizing wave occupancy on GCN hardware.
This pass will apply multiple scheduling stages to the same function. Regions are first recorded in GCNScheduleDAGMILive::schedule. The actual entry point for the scheduling of those regions is GCNScheduleDAGMILive::runSchedStages.
Definition in file GCNSchedStrategy.cpp.
#define DEBUG_TYPE "machine-scheduler" |
Generally, the reason for having multiple scheduling stages is to account for the kernel-wide effect of register usage on occupancy.
Usually, only a few scheduling regions will have register pressure high enough to limit occupancy for the kernel, so constraints can be relaxed to improve ILP in other regions.
Definition at line 31 of file GCNSchedStrategy.cpp.
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Definition at line 1552 of file GCNSchedStrategy.cpp.
References llvm::ScheduleDAGInstrs::begin(), llvm::ScheduleDAGInstrs::end(), and MI.
Referenced by llvm::GCNPostScheduleDAGMILive::schedule().
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Definition at line 1018 of file GCNSchedStrategy.cpp.
References llvm::dbgs(), and I.
Referenced by llvm::GCNSchedStage::getScheduleMetrics().
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Referenced by llvm::ClusteredLowOccStage::initGCNSchedStage().
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Referenced by llvm::UnclusteredHighRPStage::initGCNSchedStage().
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Referenced by llvm::UnclusteredHighRPStage::shouldRevertScheduling().