LLVM 20.0.0git
LegalizeTypes.h
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1//===-- LegalizeTypes.h - DAG Type Legalizer class definition ---*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file defines the DAGTypeLegalizer class. This is a private interface
10// shared between the code that implements the SelectionDAG::LegalizeTypes
11// method.
12//
13//===----------------------------------------------------------------------===//
14
15#ifndef LLVM_LIB_CODEGEN_SELECTIONDAG_LEGALIZETYPES_H
16#define LLVM_LIB_CODEGEN_SELECTIONDAG_LEGALIZETYPES_H
17
18#include "MatchContext.h"
19#include "llvm/ADT/DenseMap.h"
20#include "llvm/CodeGen/SelectionDAG.h"
21#include "llvm/CodeGen/TargetLowering.h"
22#include "llvm/Support/Compiler.h"
23
24namespace llvm {
25
26//===----------------------------------------------------------------------===//
27/// This takes an arbitrary SelectionDAG as input and hacks on it until only
28/// value types the target machine can handle are left. This involves promoting
29/// small sizes to large sizes or splitting up large values into small values.
30///
31class LLVM_LIBRARY_VISIBILITY DAGTypeLegalizer {
32 const TargetLowering &TLI;
33 SelectionDAG &DAG;
34public:
35 /// This pass uses the NodeId on the SDNodes to hold information about the
36 /// state of the node. The enum has all the values.
37 enum NodeIdFlags {
38 /// All operands have been processed, so this node is ready to be handled.
39 ReadyToProcess = 0,
40
41 /// This is a new node, not before seen, that was created in the process of
42 /// legalizing some other node.
43 NewNode = -1,
44
45 /// This node's ID needs to be set to the number of its unprocessed
46 /// operands.
47 Unanalyzed = -2,
48
49 /// This is a node that has already been processed.
50 Processed = -3
51
52 // 1+ - This is a node which has this many unprocessed operands.
53 };
54private:
55
56 /// This is a bitvector that contains two bits for each simple value type,
57 /// where the two bits correspond to the LegalizeAction enum from
58 /// TargetLowering. This can be queried with "getTypeAction(VT)".
59 TargetLowering::ValueTypeActionImpl ValueTypeActions;
60
61 /// Return how we should legalize values of this type.
62 TargetLowering::LegalizeTypeAction getTypeAction(EVT VT) const {
63 return TLI.getTypeAction(*DAG.getContext(), VT);
64 }
65
66 /// Return true if this type is legal on this target.
67 bool isTypeLegal(EVT VT) const {
68 return TLI.getTypeAction(*DAG.getContext(), VT) == TargetLowering::TypeLegal;
69 }
70
71 /// Return true if this is a simple legal type.
72 bool isSimpleLegalType(EVT VT) const {
73 return VT.isSimple() && TLI.isTypeLegal(VT);
74 }
75
76 EVT getSetCCResultType(EVT VT) const {
77 return TLI.getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT);
78 }
79
80 /// Pretend all of this node's results are legal.
81 bool IgnoreNodeResults(SDNode *N) const {
82 return N->getOpcode() == ISD::TargetConstant ||
83 N->getOpcode() == ISD::Register;
84 }
85
86 // Bijection from SDValue to unique id. As each created node gets a
87 // new id we do not need to worry about reuse expunging. Should we
88 // run out of ids, we can do a one time expensive compactifcation.
89 typedef unsigned TableId;
90
91 TableId NextValueId = 1;
92
93 SmallDenseMap<SDValue, TableId, 8> ValueToIdMap;
94 SmallDenseMap<TableId, SDValue, 8> IdToValueMap;
95
96 /// For integer nodes that are below legal width, this map indicates what
97 /// promoted value to use.
98 SmallDenseMap<TableId, TableId, 8> PromotedIntegers;
99
100 /// For integer nodes that need to be expanded this map indicates which
101 /// operands are the expanded version of the input.
102 SmallDenseMap<TableId, std::pair<TableId, TableId>, 8> ExpandedIntegers;
103
104 /// For floating-point nodes converted to integers of the same size, this map
105 /// indicates the converted value to use.
106 SmallDenseMap<TableId, TableId, 8> SoftenedFloats;
107
108 /// For floating-point nodes that have a smaller precision than the smallest
109 /// supported precision, this map indicates what promoted value to use.
110 SmallDenseMap<TableId, TableId, 8> PromotedFloats;
111
112 /// For floating-point nodes that have a smaller precision than the smallest
113 /// supported precision, this map indicates the converted value to use.
114 SmallDenseMap<TableId, TableId, 8> SoftPromotedHalfs;
115
116 /// For float nodes that need to be expanded this map indicates which operands
117 /// are the expanded version of the input.
118 SmallDenseMap<TableId, std::pair<TableId, TableId>, 8> ExpandedFloats;
119
120 /// For nodes that are <1 x ty>, this map indicates the scalar value of type
121 /// 'ty' to use.
122 SmallDenseMap<TableId, TableId, 8> ScalarizedVectors;
123
124 /// For nodes that need to be split this map indicates which operands are the
125 /// expanded version of the input.
126 SmallDenseMap<TableId, std::pair<TableId, TableId>, 8> SplitVectors;
127
128 /// For vector nodes that need to be widened, indicates the widened value to
129 /// use.
130 SmallDenseMap<TableId, TableId, 8> WidenedVectors;
131
132 /// For values that have been replaced with another, indicates the replacement
133 /// value to use.
134 SmallDenseMap<TableId, TableId, 8> ReplacedValues;
135
136 /// This defines a worklist of nodes to process. In order to be pushed onto
137 /// this worklist, all operands of a node must have already been processed.
138 SmallVector<SDNode*, 128> Worklist;
139
140 TableId getTableId(SDValue V) {
141 assert(V.getNode() && "Getting TableId on SDValue()");
142
143 auto I = ValueToIdMap.find(V);
144 if (I != ValueToIdMap.end()) {
145 // replace if there's been a shift.
146 RemapId(I->second);
147 assert(I->second && "All Ids should be nonzero");
148 return I->second;
149 }
150 // Add if it's not there.
151 ValueToIdMap.insert(std::make_pair(V, NextValueId));
152 IdToValueMap.insert(std::make_pair(NextValueId, V));
153 ++NextValueId;
154 assert(NextValueId != 0 &&
155 "Ran out of Ids. Increase id type size or add compactification");
156 return NextValueId - 1;
157 }
158
159 const SDValue &getSDValue(TableId &Id) {
160 RemapId(Id);
161 assert(Id && "TableId should be non-zero");
162 auto I = IdToValueMap.find(Id);
163 assert(I != IdToValueMap.end() && "cannot find Id in map");
164 return I->second;
165 }
166
167public:
168 explicit DAGTypeLegalizer(SelectionDAG &dag)
169 : TLI(dag.getTargetLoweringInfo()), DAG(dag),
170 ValueTypeActions(TLI.getValueTypeActions()) {
171 }
172
173 /// This is the main entry point for the type legalizer. This does a
174 /// top-down traversal of the dag, legalizing types as it goes. Returns
175 /// "true" if it made any changes.
176 bool run();
177
178 void NoteDeletion(SDNode *Old, SDNode *New) {
179 assert(Old != New && "node replaced with self");
180 for (unsigned i = 0, e = Old->getNumValues(); i != e; ++i) {
181 TableId NewId = getTableId(SDValue(New, i));
182 TableId OldId = getTableId(SDValue(Old, i));
183
184 if (OldId != NewId) {
185 ReplacedValues[OldId] = NewId;
186
187 // Delete Node from tables. We cannot do this when OldId == NewId,
188 // because NewId can still have table references to it in
189 // ReplacedValues.
190 IdToValueMap.erase(OldId);
191 PromotedIntegers.erase(OldId);
192 ExpandedIntegers.erase(OldId);
193 SoftenedFloats.erase(OldId);
194 PromotedFloats.erase(OldId);
195 SoftPromotedHalfs.erase(OldId);
196 ExpandedFloats.erase(OldId);
197 ScalarizedVectors.erase(OldId);
198 SplitVectors.erase(OldId);
199 WidenedVectors.erase(OldId);
200 }
201
202 ValueToIdMap.erase(SDValue(Old, i));
203 }
204 }
205
206 SelectionDAG &getDAG() const { return DAG; }
207
208private:
209 SDNode *AnalyzeNewNode(SDNode *N);
210 void AnalyzeNewValue(SDValue &Val);
211 void PerformExpensiveChecks();
212 void RemapId(TableId &Id);
213 void RemapValue(SDValue &V);
214
215 // Common routines.
216 SDValue BitConvertToInteger(SDValue Op);
217 SDValue BitConvertVectorToIntegerVector(SDValue Op);
218 SDValue CreateStackStoreLoad(SDValue Op, EVT DestVT);
219 bool CustomLowerNode(SDNode *N, EVT VT, bool LegalizeResult);
220 bool CustomWidenLowerNode(SDNode *N, EVT VT);
221
222 /// Replace each result of the given MERGE_VALUES node with the corresponding
223 /// input operand, except for the result 'ResNo', for which the corresponding
224 /// input operand is returned.
225 SDValue DisintegrateMERGE_VALUES(SDNode *N, unsigned ResNo);
226
227 SDValue JoinIntegers(SDValue Lo, SDValue Hi);
228
229 std::pair<SDValue, SDValue> ExpandAtomic(SDNode *Node);
230
231 SDValue PromoteTargetBoolean(SDValue Bool, EVT ValVT);
232
233 void ReplaceValueWith(SDValue From, SDValue To);
234 void SplitInteger(SDValue Op, SDValue &Lo, SDValue &Hi);
235 void SplitInteger(SDValue Op, EVT LoVT, EVT HiVT,
236 SDValue &Lo, SDValue &Hi);
237
238 //===--------------------------------------------------------------------===//
239 // Integer Promotion Support: LegalizeIntegerTypes.cpp
240 //===--------------------------------------------------------------------===//
241
242 /// Given a processed operand Op which was promoted to a larger integer type,
243 /// this returns the promoted value. The low bits of the promoted value
244 /// corresponding to the original type are exactly equal to Op.
245 /// The extra bits contain rubbish, so the promoted value may need to be zero-
246 /// or sign-extended from the original type before it is usable (the helpers
247 /// SExtPromotedInteger and ZExtPromotedInteger can do this for you).
248 /// For example, if Op is an i16 and was promoted to an i32, then this method
249 /// returns an i32, the lower 16 bits of which coincide with Op, and the upper
250 /// 16 bits of which contain rubbish.
251 SDValue GetPromotedInteger(SDValue Op) {
252 TableId &PromotedId = PromotedIntegers[getTableId(Op)];
253 SDValue PromotedOp = getSDValue(PromotedId);
254 assert(PromotedOp.getNode() && "Operand wasn't promoted?");
255 return PromotedOp;
256 }
257 void SetPromotedInteger(SDValue Op, SDValue Result);
258
259 /// Get a promoted operand and sign extend it to the final size.
260 SDValue SExtPromotedInteger(SDValue Op) {
261 EVT OldVT = Op.getValueType();
262 SDLoc dl(Op);
263 Op = GetPromotedInteger(Op);
264 return DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, Op.getValueType(), Op,
265 DAG.getValueType(OldVT));
266 }
267
268 /// Get a promoted operand and zero extend it to the final size.
269 SDValue ZExtPromotedInteger(SDValue Op) {
270 EVT OldVT = Op.getValueType();
271 SDLoc dl(Op);
272 Op = GetPromotedInteger(Op);
273 return DAG.getZeroExtendInReg(Op, dl, OldVT);
274 }
275
276 /// Get a promoted operand and zero extend it to the final size.
277 SDValue VPSExtPromotedInteger(SDValue Op, SDValue Mask, SDValue EVL) {
278 EVT OldVT = Op.getValueType();
279 SDLoc dl(Op);
280 Op = GetPromotedInteger(Op);
281 // FIXME: Add VP_SIGN_EXTEND_INREG.
282 EVT VT = Op.getValueType();
283 unsigned BitsDiff = VT.getScalarSizeInBits() - OldVT.getScalarSizeInBits();
284 SDValue ShiftCst = DAG.getShiftAmountConstant(BitsDiff, VT, dl);
285 SDValue Shl = DAG.getNode(ISD::VP_SHL, dl, VT, Op, ShiftCst, Mask, EVL);
286 return DAG.getNode(ISD::VP_SRA, dl, VT, Shl, ShiftCst, Mask, EVL);
287 }
288
289 /// Get a promoted operand and zero extend it to the final size.
290 SDValue VPZExtPromotedInteger(SDValue Op, SDValue Mask, SDValue EVL) {
291 EVT OldVT = Op.getValueType();
292 SDLoc dl(Op);
293 Op = GetPromotedInteger(Op);
294 return DAG.getVPZeroExtendInReg(Op, Mask, EVL, dl, OldVT);
295 }
296
297 // Promote the given operand V (vector or scalar) according to N's specific
298 // reduction kind. N must be an integer VECREDUCE_* or VP_REDUCE_*. Returns
299 // the nominal extension opcode (ISD::(ANY|ZERO|SIGN)_EXTEND) and the
300 // promoted value.
301 SDValue PromoteIntOpVectorReduction(SDNode *N, SDValue V);
302
303 // Integer Result Promotion.
304 void PromoteIntegerResult(SDNode *N, unsigned ResNo);
305 SDValue PromoteIntRes_MERGE_VALUES(SDNode *N, unsigned ResNo);
306 SDValue PromoteIntRes_AssertSext(SDNode *N);
307 SDValue PromoteIntRes_AssertZext(SDNode *N);
308 SDValue PromoteIntRes_Atomic0(AtomicSDNode *N);
309 SDValue PromoteIntRes_Atomic1(AtomicSDNode *N);
310 SDValue PromoteIntRes_AtomicCmpSwap(AtomicSDNode *N, unsigned ResNo);
311 SDValue PromoteIntRes_EXTRACT_SUBVECTOR(SDNode *N);
312 SDValue PromoteIntRes_INSERT_SUBVECTOR(SDNode *N);
313 SDValue PromoteIntRes_VECTOR_REVERSE(SDNode *N);
314 SDValue PromoteIntRes_VECTOR_SHUFFLE(SDNode *N);
315 SDValue PromoteIntRes_VECTOR_SPLICE(SDNode *N);
316 SDValue PromoteIntRes_VECTOR_INTERLEAVE_DEINTERLEAVE(SDNode *N);
317 SDValue PromoteIntRes_BUILD_VECTOR(SDNode *N);
318 SDValue PromoteIntRes_ScalarOp(SDNode *N);
319 SDValue PromoteIntRes_STEP_VECTOR(SDNode *N);
320 SDValue PromoteIntRes_EXTEND_VECTOR_INREG(SDNode *N);
321 SDValue PromoteIntRes_INSERT_VECTOR_ELT(SDNode *N);
322 SDValue PromoteIntRes_CONCAT_VECTORS(SDNode *N);
323 SDValue PromoteIntRes_BITCAST(SDNode *N);
324 SDValue PromoteIntRes_BSWAP(SDNode *N);
325 SDValue PromoteIntRes_BITREVERSE(SDNode *N);
326 SDValue PromoteIntRes_BUILD_PAIR(SDNode *N);
327 SDValue PromoteIntRes_Constant(SDNode *N);
328 SDValue PromoteIntRes_CTLZ(SDNode *N);
329 SDValue PromoteIntRes_CTPOP_PARITY(SDNode *N);
330 SDValue PromoteIntRes_CTTZ(SDNode *N);
331 SDValue PromoteIntRes_VP_CttzElements(SDNode *N);
332 SDValue PromoteIntRes_EXTRACT_VECTOR_ELT(SDNode *N);
333 SDValue PromoteIntRes_FP_TO_XINT(SDNode *N);
334 SDValue PromoteIntRes_FP_TO_XINT_SAT(SDNode *N);
335 SDValue PromoteIntRes_FP_TO_FP16_BF16(SDNode *N);
336 SDValue PromoteIntRes_STRICT_FP_TO_FP16_BF16(SDNode *N);
337 SDValue PromoteIntRes_XRINT(SDNode *N);
338 SDValue PromoteIntRes_FREEZE(SDNode *N);
339 SDValue PromoteIntRes_INT_EXTEND(SDNode *N);
340 SDValue PromoteIntRes_LOAD(LoadSDNode *N);
341 SDValue PromoteIntRes_MLOAD(MaskedLoadSDNode *N);
342 SDValue PromoteIntRes_MGATHER(MaskedGatherSDNode *N);
343 SDValue PromoteIntRes_VECTOR_COMPRESS(SDNode *N);
344 SDValue PromoteIntRes_Overflow(SDNode *N);
345 SDValue PromoteIntRes_FFREXP(SDNode *N);
346 SDValue PromoteIntRes_SADDSUBO(SDNode *N, unsigned ResNo);
347 SDValue PromoteIntRes_CMP(SDNode *N);
348 SDValue PromoteIntRes_Select(SDNode *N);
349 SDValue PromoteIntRes_SELECT_CC(SDNode *N);
350 SDValue PromoteIntRes_SETCC(SDNode *N);
351 SDValue PromoteIntRes_SHL(SDNode *N);
352 SDValue PromoteIntRes_SimpleIntBinOp(SDNode *N);
353 SDValue PromoteIntRes_ZExtIntBinOp(SDNode *N);
354 SDValue PromoteIntRes_SExtIntBinOp(SDNode *N);
355 SDValue PromoteIntRes_UMINUMAX(SDNode *N);
356 SDValue PromoteIntRes_SIGN_EXTEND_INREG(SDNode *N);
357 SDValue PromoteIntRes_SRA(SDNode *N);
358 SDValue PromoteIntRes_SRL(SDNode *N);
359 SDValue PromoteIntRes_TRUNCATE(SDNode *N);
360 SDValue PromoteIntRes_UADDSUBO(SDNode *N, unsigned ResNo);
361 SDValue PromoteIntRes_UADDSUBO_CARRY(SDNode *N, unsigned ResNo);
362 SDValue PromoteIntRes_SADDSUBO_CARRY(SDNode *N, unsigned ResNo);
363 SDValue PromoteIntRes_UNDEF(SDNode *N);
364 SDValue PromoteIntRes_VAARG(SDNode *N);
365 SDValue PromoteIntRes_VSCALE(SDNode *N);
366 SDValue PromoteIntRes_XMULO(SDNode *N, unsigned ResNo);
367 template <class MatchContextClass>
368 SDValue PromoteIntRes_ADDSUBSHLSAT(SDNode *N);
369 SDValue PromoteIntRes_MULFIX(SDNode *N);
370 SDValue PromoteIntRes_DIVFIX(SDNode *N);
371 SDValue PromoteIntRes_GET_ROUNDING(SDNode *N);
372 SDValue PromoteIntRes_VECREDUCE(SDNode *N);
373 SDValue PromoteIntRes_VP_REDUCE(SDNode *N);
374 SDValue PromoteIntRes_ABS(SDNode *N);
375 SDValue PromoteIntRes_Rotate(SDNode *N);
376 SDValue PromoteIntRes_FunnelShift(SDNode *N);
377 SDValue PromoteIntRes_VPFunnelShift(SDNode *N);
378 SDValue PromoteIntRes_IS_FPCLASS(SDNode *N);
379 SDValue PromoteIntRes_PATCHPOINT(SDNode *N);
380
381 // Integer Operand Promotion.
382 bool PromoteIntegerOperand(SDNode *N, unsigned OpNo);
383 SDValue PromoteIntOp_ANY_EXTEND(SDNode *N);
384 SDValue PromoteIntOp_ATOMIC_STORE(AtomicSDNode *N);
385 SDValue PromoteIntOp_BITCAST(SDNode *N);
386 SDValue PromoteIntOp_BUILD_PAIR(SDNode *N);
387 SDValue PromoteIntOp_BR_CC(SDNode *N, unsigned OpNo);
388 SDValue PromoteIntOp_BRCOND(SDNode *N, unsigned OpNo);
389 SDValue PromoteIntOp_BUILD_VECTOR(SDNode *N);
390 SDValue PromoteIntOp_INSERT_VECTOR_ELT(SDNode *N, unsigned OpNo);
391 SDValue PromoteIntOp_EXTRACT_VECTOR_ELT(SDNode *N);
392 SDValue PromoteIntOp_EXTRACT_SUBVECTOR(SDNode *N);
393 SDValue PromoteIntOp_INSERT_SUBVECTOR(SDNode *N);
394 SDValue PromoteIntOp_CONCAT_VECTORS(SDNode *N);
395 SDValue PromoteIntOp_ScalarOp(SDNode *N);
396 SDValue PromoteIntOp_SELECT(SDNode *N, unsigned OpNo);
397 SDValue PromoteIntOp_SELECT_CC(SDNode *N, unsigned OpNo);
398 SDValue PromoteIntOp_SETCC(SDNode *N, unsigned OpNo);
399 SDValue PromoteIntOp_Shift(SDNode *N);
400 SDValue PromoteIntOp_CMP(SDNode *N);
401 SDValue PromoteIntOp_FunnelShift(SDNode *N);
402 SDValue PromoteIntOp_SIGN_EXTEND(SDNode *N);
403 SDValue PromoteIntOp_VP_SIGN_EXTEND(SDNode *N);
404 SDValue PromoteIntOp_SINT_TO_FP(SDNode *N);
405 SDValue PromoteIntOp_STRICT_SINT_TO_FP(SDNode *N);
406 SDValue PromoteIntOp_STORE(StoreSDNode *N, unsigned OpNo);
407 SDValue PromoteIntOp_TRUNCATE(SDNode *N);
408 SDValue PromoteIntOp_UINT_TO_FP(SDNode *N);
409 SDValue PromoteIntOp_STRICT_UINT_TO_FP(SDNode *N);
410 SDValue PromoteIntOp_ZERO_EXTEND(SDNode *N);
411 SDValue PromoteIntOp_VP_ZERO_EXTEND(SDNode *N);
412 SDValue PromoteIntOp_MSTORE(MaskedStoreSDNode *N, unsigned OpNo);
413 SDValue PromoteIntOp_MLOAD(MaskedLoadSDNode *N, unsigned OpNo);
414 SDValue PromoteIntOp_MSCATTER(MaskedScatterSDNode *N, unsigned OpNo);
415 SDValue PromoteIntOp_MGATHER(MaskedGatherSDNode *N, unsigned OpNo);
416 SDValue PromoteIntOp_VECTOR_COMPRESS(SDNode *N, unsigned OpNo);
417 SDValue PromoteIntOp_FRAMERETURNADDR(SDNode *N);
418 SDValue PromoteIntOp_FIX(SDNode *N);
419 SDValue PromoteIntOp_ExpOp(SDNode *N);
420 SDValue PromoteIntOp_VECREDUCE(SDNode *N);
421 SDValue PromoteIntOp_VP_REDUCE(SDNode *N, unsigned OpNo);
422 SDValue PromoteIntOp_SET_ROUNDING(SDNode *N);
423 SDValue PromoteIntOp_STACKMAP(SDNode *N, unsigned OpNo);
424 SDValue PromoteIntOp_PATCHPOINT(SDNode *N, unsigned OpNo);
425 SDValue PromoteIntOp_VP_STRIDED(SDNode *N, unsigned OpNo);
426 SDValue PromoteIntOp_VP_SPLICE(SDNode *N, unsigned OpNo);
427
428 void SExtOrZExtPromotedOperands(SDValue &LHS, SDValue &RHS);
429 void PromoteSetCCOperands(SDValue &LHS,SDValue &RHS, ISD::CondCode Code);
430
431 //===--------------------------------------------------------------------===//
432 // Integer Expansion Support: LegalizeIntegerTypes.cpp
433 //===--------------------------------------------------------------------===//
434
435 /// Given a processed operand Op which was expanded into two integers of half
436 /// the size, this returns the two halves. The low bits of Op are exactly
437 /// equal to the bits of Lo; the high bits exactly equal Hi.
438 /// For example, if Op is an i64 which was expanded into two i32's, then this
439 /// method returns the two i32's, with Lo being equal to the lower 32 bits of
440 /// Op, and Hi being equal to the upper 32 bits.
441 void GetExpandedInteger(SDValue Op, SDValue &Lo, SDValue &Hi);
442 void SetExpandedInteger(SDValue Op, SDValue Lo, SDValue Hi);
443
444 // Integer Result Expansion.
445 void ExpandIntegerResult(SDNode *N, unsigned ResNo);
446 void ExpandIntRes_ANY_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi);
447 void ExpandIntRes_AssertSext (SDNode *N, SDValue &Lo, SDValue &Hi);
448 void ExpandIntRes_AssertZext (SDNode *N, SDValue &Lo, SDValue &Hi);
449 void ExpandIntRes_Constant (SDNode *N, SDValue &Lo, SDValue &Hi);
450 void ExpandIntRes_ABS (SDNode *N, SDValue &Lo, SDValue &Hi);
451 void ExpandIntRes_ABD (SDNode *N, SDValue &Lo, SDValue &Hi);
452 void ExpandIntRes_CTLZ (SDNode *N, SDValue &Lo, SDValue &Hi);
453 void ExpandIntRes_CTPOP (SDNode *N, SDValue &Lo, SDValue &Hi);
454 void ExpandIntRes_CTTZ (SDNode *N, SDValue &Lo, SDValue &Hi);
455 void ExpandIntRes_LOAD (LoadSDNode *N, SDValue &Lo, SDValue &Hi);
456 void ExpandIntRes_READCOUNTER (SDNode *N, SDValue &Lo, SDValue &Hi);
457 void ExpandIntRes_SIGN_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi);
458 void ExpandIntRes_SIGN_EXTEND_INREG (SDNode *N, SDValue &Lo, SDValue &Hi);
459 void ExpandIntRes_TRUNCATE (SDNode *N, SDValue &Lo, SDValue &Hi);
460 void ExpandIntRes_ZERO_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi);
461 void ExpandIntRes_GET_ROUNDING (SDNode *N, SDValue &Lo, SDValue &Hi);
462 void ExpandIntRes_FP_TO_XINT (SDNode *N, SDValue &Lo, SDValue &Hi);
463 void ExpandIntRes_FP_TO_XINT_SAT (SDNode *N, SDValue &Lo, SDValue &Hi);
464 void ExpandIntRes_XROUND_XRINT (SDNode *N, SDValue &Lo, SDValue &Hi);
465
466 void ExpandIntRes_Logical (SDNode *N, SDValue &Lo, SDValue &Hi);
467 void ExpandIntRes_ADDSUB (SDNode *N, SDValue &Lo, SDValue &Hi);
468 void ExpandIntRes_ADDSUBC (SDNode *N, SDValue &Lo, SDValue &Hi);
469 void ExpandIntRes_ADDSUBE (SDNode *N, SDValue &Lo, SDValue &Hi);
470 void ExpandIntRes_UADDSUBO_CARRY (SDNode *N, SDValue &Lo, SDValue &Hi);
471 void ExpandIntRes_SADDSUBO_CARRY (SDNode *N, SDValue &Lo, SDValue &Hi);
472 void ExpandIntRes_BITREVERSE (SDNode *N, SDValue &Lo, SDValue &Hi);
473 void ExpandIntRes_BSWAP (SDNode *N, SDValue &Lo, SDValue &Hi);
474 void ExpandIntRes_PARITY (SDNode *N, SDValue &Lo, SDValue &Hi);
475 void ExpandIntRes_MUL (SDNode *N, SDValue &Lo, SDValue &Hi);
476 void ExpandIntRes_SDIV (SDNode *N, SDValue &Lo, SDValue &Hi);
477 void ExpandIntRes_SREM (SDNode *N, SDValue &Lo, SDValue &Hi);
478 void ExpandIntRes_UDIV (SDNode *N, SDValue &Lo, SDValue &Hi);
479 void ExpandIntRes_UREM (SDNode *N, SDValue &Lo, SDValue &Hi);
480 void ExpandIntRes_ShiftThroughStack (SDNode *N, SDValue &Lo, SDValue &Hi);
481 void ExpandIntRes_Shift (SDNode *N, SDValue &Lo, SDValue &Hi);
482
483 void ExpandIntRes_MINMAX (SDNode *N, SDValue &Lo, SDValue &Hi);
484
485 void ExpandIntRes_CMP (SDNode *N, SDValue &Lo, SDValue &Hi);
486
487 void ExpandIntRes_SADDSUBO (SDNode *N, SDValue &Lo, SDValue &Hi);
488 void ExpandIntRes_UADDSUBO (SDNode *N, SDValue &Lo, SDValue &Hi);
489 void ExpandIntRes_XMULO (SDNode *N, SDValue &Lo, SDValue &Hi);
490 void ExpandIntRes_AVG (SDNode *N, SDValue &Lo, SDValue &Hi);
491 void ExpandIntRes_ADDSUBSAT (SDNode *N, SDValue &Lo, SDValue &Hi);
492 void ExpandIntRes_SHLSAT (SDNode *N, SDValue &Lo, SDValue &Hi);
493 void ExpandIntRes_MULFIX (SDNode *N, SDValue &Lo, SDValue &Hi);
494 void ExpandIntRes_DIVFIX (SDNode *N, SDValue &Lo, SDValue &Hi);
495
496 void ExpandIntRes_ATOMIC_LOAD (SDNode *N, SDValue &Lo, SDValue &Hi);
497 void ExpandIntRes_VECREDUCE (SDNode *N, SDValue &Lo, SDValue &Hi);
498
499 void ExpandIntRes_Rotate (SDNode *N, SDValue &Lo, SDValue &Hi);
500 void ExpandIntRes_FunnelShift (SDNode *N, SDValue &Lo, SDValue &Hi);
501
502 void ExpandIntRes_VSCALE (SDNode *N, SDValue &Lo, SDValue &Hi);
503
504 void ExpandShiftByConstant(SDNode *N, const APInt &Amt,
505 SDValue &Lo, SDValue &Hi);
506 bool ExpandShiftWithKnownAmountBit(SDNode *N, SDValue &Lo, SDValue &Hi);
507 bool ExpandShiftWithUnknownAmountBit(SDNode *N, SDValue &Lo, SDValue &Hi);
508
509 // Integer Operand Expansion.
510 bool ExpandIntegerOperand(SDNode *N, unsigned OpNo);
511 SDValue ExpandIntOp_BR_CC(SDNode *N);
512 SDValue ExpandIntOp_SELECT_CC(SDNode *N);
513 SDValue ExpandIntOp_SETCC(SDNode *N);
514 SDValue ExpandIntOp_SETCCCARRY(SDNode *N);
515 SDValue ExpandIntOp_Shift(SDNode *N);
516 SDValue ExpandIntOp_CMP(SDNode *N);
517 SDValue ExpandIntOp_STORE(StoreSDNode *N, unsigned OpNo);
518 SDValue ExpandIntOp_TRUNCATE(SDNode *N);
519 SDValue ExpandIntOp_XINT_TO_FP(SDNode *N);
520 SDValue ExpandIntOp_RETURNADDR(SDNode *N);
521 SDValue ExpandIntOp_ATOMIC_STORE(SDNode *N);
522 SDValue ExpandIntOp_SPLAT_VECTOR(SDNode *N);
523 SDValue ExpandIntOp_STACKMAP(SDNode *N, unsigned OpNo);
524 SDValue ExpandIntOp_PATCHPOINT(SDNode *N, unsigned OpNo);
525 SDValue ExpandIntOp_VP_STRIDED(SDNode *N, unsigned OpNo);
526
527 void IntegerExpandSetCCOperands(SDValue &NewLHS, SDValue &NewRHS,
528 ISD::CondCode &CCCode, const SDLoc &dl);
529
530 //===--------------------------------------------------------------------===//
531 // Float to Integer Conversion Support: LegalizeFloatTypes.cpp
532 //===--------------------------------------------------------------------===//
533
534 /// GetSoftenedFloat - Given a processed operand Op which was converted to an
535 /// integer of the same size, this returns the integer. The integer contains
536 /// exactly the same bits as Op - only the type changed. For example, if Op
537 /// is an f32 which was softened to an i32, then this method returns an i32,
538 /// the bits of which coincide with those of Op
539 SDValue GetSoftenedFloat(SDValue Op) {
540 TableId Id = getTableId(Op);
541 auto Iter = SoftenedFloats.find(Id);
542 if (Iter == SoftenedFloats.end()) {
543 assert(isSimpleLegalType(Op.getValueType()) &&
544 "Operand wasn't converted to integer?");
545 return Op;
546 }
547 SDValue SoftenedOp = getSDValue(Iter->second);
548 assert(SoftenedOp.getNode() && "Unconverted op in SoftenedFloats?");
549 return SoftenedOp;
550 }
551 void SetSoftenedFloat(SDValue Op, SDValue Result);
552
553 // Convert Float Results to Integer.
554 void SoftenFloatResult(SDNode *N, unsigned ResNo);
555 SDValue SoftenFloatRes_Unary(SDNode *N, RTLIB::Libcall LC);
556 SDValue SoftenFloatRes_Binary(SDNode *N, RTLIB::Libcall LC);
557 SDValue SoftenFloatRes_MERGE_VALUES(SDNode *N, unsigned ResNo);
558 SDValue SoftenFloatRes_ARITH_FENCE(SDNode *N);
559 SDValue SoftenFloatRes_BITCAST(SDNode *N);
560 SDValue SoftenFloatRes_BUILD_PAIR(SDNode *N);
561 SDValue SoftenFloatRes_ConstantFP(SDNode *N);
562 SDValue SoftenFloatRes_EXTRACT_ELEMENT(SDNode *N);
563 SDValue SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode *N, unsigned ResNo);
564 SDValue SoftenFloatRes_FABS(SDNode *N);
565 SDValue SoftenFloatRes_FACOS(SDNode *N);
566 SDValue SoftenFloatRes_FASIN(SDNode *N);
567 SDValue SoftenFloatRes_FATAN(SDNode *N);
568 SDValue SoftenFloatRes_FMINNUM(SDNode *N);
569 SDValue SoftenFloatRes_FMAXNUM(SDNode *N);
570 SDValue SoftenFloatRes_FMINIMUMNUM(SDNode *N);
571 SDValue SoftenFloatRes_FMAXIMUMNUM(SDNode *N);
572 SDValue SoftenFloatRes_FADD(SDNode *N);
573 SDValue SoftenFloatRes_FCBRT(SDNode *N);
574 SDValue SoftenFloatRes_FCEIL(SDNode *N);
575 SDValue SoftenFloatRes_FCOPYSIGN(SDNode *N);
576 SDValue SoftenFloatRes_FCOS(SDNode *N);
577 SDValue SoftenFloatRes_FCOSH(SDNode *N);
578 SDValue SoftenFloatRes_FDIV(SDNode *N);
579 SDValue SoftenFloatRes_FEXP(SDNode *N);
580 SDValue SoftenFloatRes_FEXP2(SDNode *N);
581 SDValue SoftenFloatRes_FEXP10(SDNode *N);
582 SDValue SoftenFloatRes_FFLOOR(SDNode *N);
583 SDValue SoftenFloatRes_FLOG(SDNode *N);
584 SDValue SoftenFloatRes_FLOG2(SDNode *N);
585 SDValue SoftenFloatRes_FLOG10(SDNode *N);
586 SDValue SoftenFloatRes_FMA(SDNode *N);
587 SDValue SoftenFloatRes_FMUL(SDNode *N);
588 SDValue SoftenFloatRes_FNEARBYINT(SDNode *N);
589 SDValue SoftenFloatRes_FNEG(SDNode *N);
590 SDValue SoftenFloatRes_FP_EXTEND(SDNode *N);
591 SDValue SoftenFloatRes_FP16_TO_FP(SDNode *N);
592 SDValue SoftenFloatRes_BF16_TO_FP(SDNode *N);
593 SDValue SoftenFloatRes_FP_ROUND(SDNode *N);
594 SDValue SoftenFloatRes_FPOW(SDNode *N);
595 SDValue SoftenFloatRes_ExpOp(SDNode *N);
596 SDValue SoftenFloatRes_FFREXP(SDNode *N);
597 SDValue SoftenFloatRes_FREEZE(SDNode *N);
598 SDValue SoftenFloatRes_FREM(SDNode *N);
599 SDValue SoftenFloatRes_FRINT(SDNode *N);
600 SDValue SoftenFloatRes_FROUND(SDNode *N);
601 SDValue SoftenFloatRes_FROUNDEVEN(SDNode *N);
602 SDValue SoftenFloatRes_FSIN(SDNode *N);
603 SDValue SoftenFloatRes_FSINH(SDNode *N);
604 SDValue SoftenFloatRes_FSQRT(SDNode *N);
605 SDValue SoftenFloatRes_FSUB(SDNode *N);
606 SDValue SoftenFloatRes_FTAN(SDNode *N);
607 SDValue SoftenFloatRes_FTANH(SDNode *N);
608 SDValue SoftenFloatRes_FTRUNC(SDNode *N);
609 SDValue SoftenFloatRes_LOAD(SDNode *N);
610 SDValue SoftenFloatRes_ATOMIC_LOAD(SDNode *N);
611 SDValue SoftenFloatRes_SELECT(SDNode *N);
612 SDValue SoftenFloatRes_SELECT_CC(SDNode *N);
613 SDValue SoftenFloatRes_UNDEF(SDNode *N);
614 SDValue SoftenFloatRes_VAARG(SDNode *N);
615 SDValue SoftenFloatRes_XINT_TO_FP(SDNode *N);
616 SDValue SoftenFloatRes_VECREDUCE(SDNode *N);
617 SDValue SoftenFloatRes_VECREDUCE_SEQ(SDNode *N);
618
619 // Convert Float Operand to Integer.
620 bool SoftenFloatOperand(SDNode *N, unsigned OpNo);
621 SDValue SoftenFloatOp_Unary(SDNode *N, RTLIB::Libcall LC);
622 SDValue SoftenFloatOp_BITCAST(SDNode *N);
623 SDValue SoftenFloatOp_BR_CC(SDNode *N);
624 SDValue SoftenFloatOp_FP_ROUND(SDNode *N);
625 SDValue SoftenFloatOp_FP_TO_XINT(SDNode *N);
626 SDValue SoftenFloatOp_FP_TO_XINT_SAT(SDNode *N);
627 SDValue SoftenFloatOp_LROUND(SDNode *N);
628 SDValue SoftenFloatOp_LLROUND(SDNode *N);
629 SDValue SoftenFloatOp_LRINT(SDNode *N);
630 SDValue SoftenFloatOp_LLRINT(SDNode *N);
631 SDValue SoftenFloatOp_SELECT_CC(SDNode *N);
632 SDValue SoftenFloatOp_SETCC(SDNode *N);
633 SDValue SoftenFloatOp_STORE(SDNode *N, unsigned OpNo);
634 SDValue SoftenFloatOp_ATOMIC_STORE(SDNode *N, unsigned OpNo);
635 SDValue SoftenFloatOp_FCOPYSIGN(SDNode *N);
636
637 //===--------------------------------------------------------------------===//
638 // Float Expansion Support: LegalizeFloatTypes.cpp
639 //===--------------------------------------------------------------------===//
640
641 /// Given a processed operand Op which was expanded into two floating-point
642 /// values of half the size, this returns the two halves.
643 /// The low bits of Op are exactly equal to the bits of Lo; the high bits
644 /// exactly equal Hi. For example, if Op is a ppcf128 which was expanded
645 /// into two f64's, then this method returns the two f64's, with Lo being
646 /// equal to the lower 64 bits of Op, and Hi to the upper 64 bits.
647 void GetExpandedFloat(SDValue Op, SDValue &Lo, SDValue &Hi);
648 void SetExpandedFloat(SDValue Op, SDValue Lo, SDValue Hi);
649
650 // Float Result Expansion.
651 void ExpandFloatResult(SDNode *N, unsigned ResNo);
652 void ExpandFloatRes_ConstantFP(SDNode *N, SDValue &Lo, SDValue &Hi);
653 void ExpandFloatRes_Unary(SDNode *N, RTLIB::Libcall LC,
654 SDValue &Lo, SDValue &Hi);
655 void ExpandFloatRes_Binary(SDNode *N, RTLIB::Libcall LC,
656 SDValue &Lo, SDValue &Hi);
657 // clang-format off
658 void ExpandFloatRes_FABS (SDNode *N, SDValue &Lo, SDValue &Hi);
659 void ExpandFloatRes_FACOS (SDNode *N, SDValue &Lo, SDValue &Hi);
660 void ExpandFloatRes_FASIN (SDNode *N, SDValue &Lo, SDValue &Hi);
661 void ExpandFloatRes_FATAN (SDNode *N, SDValue &Lo, SDValue &Hi);
662 void ExpandFloatRes_FMINNUM (SDNode *N, SDValue &Lo, SDValue &Hi);
663 void ExpandFloatRes_FMAXNUM (SDNode *N, SDValue &Lo, SDValue &Hi);
664 void ExpandFloatRes_FMINIMUMNUM(SDNode *N, SDValue &Lo, SDValue &Hi);
665 void ExpandFloatRes_FMAXIMUMNUM(SDNode *N, SDValue &Lo, SDValue &Hi);
666 void ExpandFloatRes_FADD (SDNode *N, SDValue &Lo, SDValue &Hi);
667 void ExpandFloatRes_FCBRT (SDNode *N, SDValue &Lo, SDValue &Hi);
668 void ExpandFloatRes_FCEIL (SDNode *N, SDValue &Lo, SDValue &Hi);
669 void ExpandFloatRes_FCOPYSIGN (SDNode *N, SDValue &Lo, SDValue &Hi);
670 void ExpandFloatRes_FCOS (SDNode *N, SDValue &Lo, SDValue &Hi);
671 void ExpandFloatRes_FCOSH (SDNode *N, SDValue &Lo, SDValue &Hi);
672 void ExpandFloatRes_FDIV (SDNode *N, SDValue &Lo, SDValue &Hi);
673 void ExpandFloatRes_FEXP (SDNode *N, SDValue &Lo, SDValue &Hi);
674 void ExpandFloatRes_FEXP2 (SDNode *N, SDValue &Lo, SDValue &Hi);
675 void ExpandFloatRes_FEXP10 (SDNode *N, SDValue &Lo, SDValue &Hi);
676 void ExpandFloatRes_FFLOOR (SDNode *N, SDValue &Lo, SDValue &Hi);
677 void ExpandFloatRes_FLOG (SDNode *N, SDValue &Lo, SDValue &Hi);
678 void ExpandFloatRes_FLOG2 (SDNode *N, SDValue &Lo, SDValue &Hi);
679 void ExpandFloatRes_FLOG10 (SDNode *N, SDValue &Lo, SDValue &Hi);
680 void ExpandFloatRes_FMA (SDNode *N, SDValue &Lo, SDValue &Hi);
681 void ExpandFloatRes_FMUL (SDNode *N, SDValue &Lo, SDValue &Hi);
682 void ExpandFloatRes_FNEARBYINT(SDNode *N, SDValue &Lo, SDValue &Hi);
683 void ExpandFloatRes_FNEG (SDNode *N, SDValue &Lo, SDValue &Hi);
684 void ExpandFloatRes_FP_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi);
685 void ExpandFloatRes_FPOW (SDNode *N, SDValue &Lo, SDValue &Hi);
686 void ExpandFloatRes_FPOWI (SDNode *N, SDValue &Lo, SDValue &Hi);
687 void ExpandFloatRes_FLDEXP (SDNode *N, SDValue &Lo, SDValue &Hi);
688 void ExpandFloatRes_FREEZE (SDNode *N, SDValue &Lo, SDValue &Hi);
689 void ExpandFloatRes_FREM (SDNode *N, SDValue &Lo, SDValue &Hi);
690 void ExpandFloatRes_FRINT (SDNode *N, SDValue &Lo, SDValue &Hi);
691 void ExpandFloatRes_FROUND (SDNode *N, SDValue &Lo, SDValue &Hi);
692 void ExpandFloatRes_FROUNDEVEN(SDNode *N, SDValue &Lo, SDValue &Hi);
693 void ExpandFloatRes_FSIN (SDNode *N, SDValue &Lo, SDValue &Hi);
694 void ExpandFloatRes_FSINH (SDNode *N, SDValue &Lo, SDValue &Hi);
695 void ExpandFloatRes_FSQRT (SDNode *N, SDValue &Lo, SDValue &Hi);
696 void ExpandFloatRes_FSUB (SDNode *N, SDValue &Lo, SDValue &Hi);
697 void ExpandFloatRes_FTAN (SDNode *N, SDValue &Lo, SDValue &Hi);
698 void ExpandFloatRes_FTANH (SDNode *N, SDValue &Lo, SDValue &Hi);
699 void ExpandFloatRes_FTRUNC (SDNode *N, SDValue &Lo, SDValue &Hi);
700 void ExpandFloatRes_LOAD (SDNode *N, SDValue &Lo, SDValue &Hi);
701 void ExpandFloatRes_XINT_TO_FP(SDNode *N, SDValue &Lo, SDValue &Hi);
702 // clang-format on
703
704 // Float Operand Expansion.
705 bool ExpandFloatOperand(SDNode *N, unsigned OpNo);
706 SDValue ExpandFloatOp_BR_CC(SDNode *N);
707 SDValue ExpandFloatOp_FCOPYSIGN(SDNode *N);
708 SDValue ExpandFloatOp_FP_ROUND(SDNode *N);
709 SDValue ExpandFloatOp_FP_TO_XINT(SDNode *N);
710 SDValue ExpandFloatOp_LROUND(SDNode *N);
711 SDValue ExpandFloatOp_LLROUND(SDNode *N);
712 SDValue ExpandFloatOp_LRINT(SDNode *N);
713 SDValue ExpandFloatOp_LLRINT(SDNode *N);
714 SDValue ExpandFloatOp_SELECT_CC(SDNode *N);
715 SDValue ExpandFloatOp_SETCC(SDNode *N);
716 SDValue ExpandFloatOp_STORE(SDNode *N, unsigned OpNo);
717
718 void FloatExpandSetCCOperands(SDValue &NewLHS, SDValue &NewRHS,
719 ISD::CondCode &CCCode, const SDLoc &dl,
720 SDValue &Chain, bool IsSignaling = false);
721
722 //===--------------------------------------------------------------------===//
723 // Float promotion support: LegalizeFloatTypes.cpp
724 //===--------------------------------------------------------------------===//
725
726 SDValue GetPromotedFloat(SDValue Op) {
727 TableId &PromotedId = PromotedFloats[getTableId(Op)];
728 SDValue PromotedOp = getSDValue(PromotedId);
729 assert(PromotedOp.getNode() && "Operand wasn't promoted?");
730 return PromotedOp;
731 }
732 void SetPromotedFloat(SDValue Op, SDValue Result);
733
734 void PromoteFloatResult(SDNode *N, unsigned ResNo);
735 SDValue PromoteFloatRes_BITCAST(SDNode *N);
736 SDValue PromoteFloatRes_BinOp(SDNode *N);
737 SDValue PromoteFloatRes_ConstantFP(SDNode *N);
738 SDValue PromoteFloatRes_EXTRACT_VECTOR_ELT(SDNode *N);
739 SDValue PromoteFloatRes_FCOPYSIGN(SDNode *N);
740 SDValue PromoteFloatRes_FMAD(SDNode *N);
741 SDValue PromoteFloatRes_ExpOp(SDNode *N);
742 SDValue PromoteFloatRes_FFREXP(SDNode *N);
743 SDValue PromoteFloatRes_FP_ROUND(SDNode *N);
744 SDValue PromoteFloatRes_STRICT_FP_ROUND(SDNode *N);
745 SDValue PromoteFloatRes_LOAD(SDNode *N);
746 SDValue PromoteFloatRes_ATOMIC_LOAD(SDNode *N);
747 SDValue PromoteFloatRes_SELECT(SDNode *N);
748 SDValue PromoteFloatRes_SELECT_CC(SDNode *N);
749 SDValue PromoteFloatRes_UnaryOp(SDNode *N);
750 SDValue PromoteFloatRes_UNDEF(SDNode *N);
751 SDValue BitcastToInt_ATOMIC_SWAP(SDNode *N);
752 SDValue PromoteFloatRes_XINT_TO_FP(SDNode *N);
753 SDValue PromoteFloatRes_VECREDUCE(SDNode *N);
754 SDValue PromoteFloatRes_VECREDUCE_SEQ(SDNode *N);
755
756 bool PromoteFloatOperand(SDNode *N, unsigned OpNo);
757 SDValue PromoteFloatOp_BITCAST(SDNode *N, unsigned OpNo);
758 SDValue PromoteFloatOp_FCOPYSIGN(SDNode *N, unsigned OpNo);
759 SDValue PromoteFloatOp_FP_EXTEND(SDNode *N, unsigned OpNo);
760 SDValue PromoteFloatOp_STRICT_FP_EXTEND(SDNode *N, unsigned OpNo);
761 SDValue PromoteFloatOp_UnaryOp(SDNode *N, unsigned OpNo);
762 SDValue PromoteFloatOp_FP_TO_XINT_SAT(SDNode *N, unsigned OpNo);
763 SDValue PromoteFloatOp_STORE(SDNode *N, unsigned OpNo);
764 SDValue PromoteFloatOp_ATOMIC_STORE(SDNode *N, unsigned OpNo);
765 SDValue PromoteFloatOp_SELECT_CC(SDNode *N, unsigned OpNo);
766 SDValue PromoteFloatOp_SETCC(SDNode *N, unsigned OpNo);
767
768 //===--------------------------------------------------------------------===//
769 // Half soft promotion support: LegalizeFloatTypes.cpp
770 //===--------------------------------------------------------------------===//
771
772 SDValue GetSoftPromotedHalf(SDValue Op) {
773 TableId &PromotedId = SoftPromotedHalfs[getTableId(Op)];
774 SDValue PromotedOp = getSDValue(PromotedId);
775 assert(PromotedOp.getNode() && "Operand wasn't promoted?");
776 return PromotedOp;
777 }
778 void SetSoftPromotedHalf(SDValue Op, SDValue Result);
779
780 void SoftPromoteHalfResult(SDNode *N, unsigned ResNo);
781 SDValue SoftPromoteHalfRes_ARITH_FENCE(SDNode *N);
782 SDValue SoftPromoteHalfRes_BinOp(SDNode *N);
783 SDValue SoftPromoteHalfRes_BITCAST(SDNode *N);
784 SDValue SoftPromoteHalfRes_ConstantFP(SDNode *N);
785 SDValue SoftPromoteHalfRes_EXTRACT_VECTOR_ELT(SDNode *N);
786 SDValue SoftPromoteHalfRes_FCOPYSIGN(SDNode *N);
787 SDValue SoftPromoteHalfRes_FMAD(SDNode *N);
788 SDValue SoftPromoteHalfRes_ExpOp(SDNode *N);
789 SDValue SoftPromoteHalfRes_FFREXP(SDNode *N);
790 SDValue SoftPromoteHalfRes_FP_ROUND(SDNode *N);
791 SDValue SoftPromoteHalfRes_LOAD(SDNode *N);
792 SDValue SoftPromoteHalfRes_ATOMIC_LOAD(SDNode *N);
793 SDValue SoftPromoteHalfRes_SELECT(SDNode *N);
794 SDValue SoftPromoteHalfRes_SELECT_CC(SDNode *N);
795 SDValue SoftPromoteHalfRes_UnaryOp(SDNode *N);
796 SDValue SoftPromoteHalfRes_XINT_TO_FP(SDNode *N);
797 SDValue SoftPromoteHalfRes_UNDEF(SDNode *N);
798 SDValue SoftPromoteHalfRes_VECREDUCE(SDNode *N);
799 SDValue SoftPromoteHalfRes_VECREDUCE_SEQ(SDNode *N);
800
801 bool SoftPromoteHalfOperand(SDNode *N, unsigned OpNo);
802 SDValue SoftPromoteHalfOp_BITCAST(SDNode *N);
803 SDValue SoftPromoteHalfOp_FCOPYSIGN(SDNode *N, unsigned OpNo);
804 SDValue SoftPromoteHalfOp_FP_EXTEND(SDNode *N);
805 SDValue SoftPromoteHalfOp_FP_TO_XINT(SDNode *N);
806 SDValue SoftPromoteHalfOp_FP_TO_XINT_SAT(SDNode *N);
807 SDValue SoftPromoteHalfOp_SETCC(SDNode *N);
808 SDValue SoftPromoteHalfOp_SELECT_CC(SDNode *N, unsigned OpNo);
809 SDValue SoftPromoteHalfOp_STORE(SDNode *N, unsigned OpNo);
810 SDValue SoftPromoteHalfOp_ATOMIC_STORE(SDNode *N, unsigned OpNo);
811 SDValue SoftPromoteHalfOp_STACKMAP(SDNode *N, unsigned OpNo);
812 SDValue SoftPromoteHalfOp_PATCHPOINT(SDNode *N, unsigned OpNo);
813
814 //===--------------------------------------------------------------------===//
815 // Scalarization Support: LegalizeVectorTypes.cpp
816 //===--------------------------------------------------------------------===//
817
818 /// Given a processed one-element vector Op which was scalarized to its
819 /// element type, this returns the element. For example, if Op is a v1i32,
820 /// Op = < i32 val >, this method returns val, an i32.
821 SDValue GetScalarizedVector(SDValue Op) {
822 TableId &ScalarizedId = ScalarizedVectors[getTableId(Op)];
823 SDValue ScalarizedOp = getSDValue(ScalarizedId);
824 assert(ScalarizedOp.getNode() && "Operand wasn't scalarized?");
825 return ScalarizedOp;
826 }
827 void SetScalarizedVector(SDValue Op, SDValue Result);
828
829 // Vector Result Scalarization: <1 x ty> -> ty.
830 void ScalarizeVectorResult(SDNode *N, unsigned ResNo);
831 SDValue ScalarizeVecRes_MERGE_VALUES(SDNode *N, unsigned ResNo);
832 SDValue ScalarizeVecRes_BinOp(SDNode *N);
833 SDValue ScalarizeVecRes_CMP(SDNode *N);
834 SDValue ScalarizeVecRes_TernaryOp(SDNode *N);
835 SDValue ScalarizeVecRes_UnaryOp(SDNode *N);
836 SDValue ScalarizeVecRes_StrictFPOp(SDNode *N);
837 SDValue ScalarizeVecRes_OverflowOp(SDNode *N, unsigned ResNo);
838 SDValue ScalarizeVecRes_InregOp(SDNode *N);
839 SDValue ScalarizeVecRes_VecInregOp(SDNode *N);
840
841 SDValue ScalarizeVecRes_ADDRSPACECAST(SDNode *N);
842 SDValue ScalarizeVecRes_BITCAST(SDNode *N);
843 SDValue ScalarizeVecRes_BUILD_VECTOR(SDNode *N);
844 SDValue ScalarizeVecRes_EXTRACT_SUBVECTOR(SDNode *N);
845 SDValue ScalarizeVecRes_FP_ROUND(SDNode *N);
846 SDValue ScalarizeVecRes_ExpOp(SDNode *N);
847 SDValue ScalarizeVecRes_INSERT_VECTOR_ELT(SDNode *N);
848 SDValue ScalarizeVecRes_LOAD(LoadSDNode *N);
849 SDValue ScalarizeVecRes_SCALAR_TO_VECTOR(SDNode *N);
850 SDValue ScalarizeVecRes_VSELECT(SDNode *N);
851 SDValue ScalarizeVecRes_SELECT(SDNode *N);
852 SDValue ScalarizeVecRes_SELECT_CC(SDNode *N);
853 SDValue ScalarizeVecRes_SETCC(SDNode *N);
854 SDValue ScalarizeVecRes_UNDEF(SDNode *N);
855 SDValue ScalarizeVecRes_VECTOR_SHUFFLE(SDNode *N);
856 SDValue ScalarizeVecRes_FP_TO_XINT_SAT(SDNode *N);
857 SDValue ScalarizeVecRes_IS_FPCLASS(SDNode *N);
858
859 SDValue ScalarizeVecRes_FIX(SDNode *N);
860 SDValue ScalarizeVecRes_FFREXP(SDNode *N, unsigned ResNo);
861
862 // Vector Operand Scalarization: <1 x ty> -> ty.
863 bool ScalarizeVectorOperand(SDNode *N, unsigned OpNo);
864 SDValue ScalarizeVecOp_BITCAST(SDNode *N);
865 SDValue ScalarizeVecOp_UnaryOp(SDNode *N);
866 SDValue ScalarizeVecOp_UnaryOp_StrictFP(SDNode *N);
867 SDValue ScalarizeVecOp_CONCAT_VECTORS(SDNode *N);
868 SDValue ScalarizeVecOp_INSERT_SUBVECTOR(SDNode *N, unsigned OpNo);
869 SDValue ScalarizeVecOp_EXTRACT_VECTOR_ELT(SDNode *N);
870 SDValue ScalarizeVecOp_VSELECT(SDNode *N);
871 SDValue ScalarizeVecOp_VSETCC(SDNode *N);
872 SDValue ScalarizeVecOp_STORE(StoreSDNode *N, unsigned OpNo);
873 SDValue ScalarizeVecOp_FP_ROUND(SDNode *N, unsigned OpNo);
874 SDValue ScalarizeVecOp_STRICT_FP_ROUND(SDNode *N, unsigned OpNo);
875 SDValue ScalarizeVecOp_FP_EXTEND(SDNode *N);
876 SDValue ScalarizeVecOp_STRICT_FP_EXTEND(SDNode *N);
877 SDValue ScalarizeVecOp_VECREDUCE(SDNode *N);
878 SDValue ScalarizeVecOp_VECREDUCE_SEQ(SDNode *N);
879 SDValue ScalarizeVecOp_CMP(SDNode *N);
880
881 //===--------------------------------------------------------------------===//
882 // Vector Splitting Support: LegalizeVectorTypes.cpp
883 //===--------------------------------------------------------------------===//
884
885 /// Given a processed vector Op which was split into vectors of half the size,
886 /// this method returns the halves. The first elements of Op coincide with the
887 /// elements of Lo; the remaining elements of Op coincide with the elements of
888 /// Hi: Op is what you would get by concatenating Lo and Hi.
889 /// For example, if Op is a v8i32 that was split into two v4i32's, then this
890 /// method returns the two v4i32's, with Lo corresponding to the first 4
891 /// elements of Op, and Hi to the last 4 elements.
892 void GetSplitVector(SDValue Op, SDValue &Lo, SDValue &Hi);
893 void SetSplitVector(SDValue Op, SDValue Lo, SDValue Hi);
894
895 /// Split mask operator of a VP intrinsic.
896 std::pair<SDValue, SDValue> SplitMask(SDValue Mask);
897
898 /// Split mask operator of a VP intrinsic in a given location.
899 std::pair<SDValue, SDValue> SplitMask(SDValue Mask, const SDLoc &DL);
900
901 // Helper function for incrementing the pointer when splitting
902 // memory operations
903 void IncrementPointer(MemSDNode *N, EVT MemVT, MachinePointerInfo &MPI,
904 SDValue &Ptr, uint64_t *ScaledOffset = nullptr);
905
906 // Vector Result Splitting: <128 x ty> -> 2 x <64 x ty>.
907 void SplitVectorResult(SDNode *N, unsigned ResNo);
908 void SplitVecRes_BinOp(SDNode *N, SDValue &Lo, SDValue &Hi);
909 void SplitVecRes_TernaryOp(SDNode *N, SDValue &Lo, SDValue &Hi);
910 void SplitVecRes_CMP(SDNode *N, SDValue &Lo, SDValue &Hi);
911 void SplitVecRes_UnaryOp(SDNode *N, SDValue &Lo, SDValue &Hi);
912 void SplitVecRes_ADDRSPACECAST(SDNode *N, SDValue &Lo, SDValue &Hi);
913 void SplitVecRes_FFREXP(SDNode *N, unsigned ResNo, SDValue &Lo, SDValue &Hi);
914 void SplitVecRes_ExtendOp(SDNode *N, SDValue &Lo, SDValue &Hi);
915 void SplitVecRes_InregOp(SDNode *N, SDValue &Lo, SDValue &Hi);
916 void SplitVecRes_ExtVecInRegOp(SDNode *N, SDValue &Lo, SDValue &Hi);
917 void SplitVecRes_StrictFPOp(SDNode *N, SDValue &Lo, SDValue &Hi);
918 void SplitVecRes_OverflowOp(SDNode *N, unsigned ResNo,
919 SDValue &Lo, SDValue &Hi);
920
921 void SplitVecRes_FIX(SDNode *N, SDValue &Lo, SDValue &Hi);
922
923 void SplitVecRes_BITCAST(SDNode *N, SDValue &Lo, SDValue &Hi);
924 void SplitVecRes_BUILD_VECTOR(SDNode *N, SDValue &Lo, SDValue &Hi);
925 void SplitVecRes_CONCAT_VECTORS(SDNode *N, SDValue &Lo, SDValue &Hi);
926 void SplitVecRes_EXTRACT_SUBVECTOR(SDNode *N, SDValue &Lo, SDValue &Hi);
927 void SplitVecRes_INSERT_SUBVECTOR(SDNode *N, SDValue &Lo, SDValue &Hi);
928 void SplitVecRes_FPOp_MultiType(SDNode *N, SDValue &Lo, SDValue &Hi);
929 void SplitVecRes_IS_FPCLASS(SDNode *N, SDValue &Lo, SDValue &Hi);
930 void SplitVecRes_INSERT_VECTOR_ELT(SDNode *N, SDValue &Lo, SDValue &Hi);
931 void SplitVecRes_LOAD(LoadSDNode *LD, SDValue &Lo, SDValue &Hi);
932 void SplitVecRes_VP_LOAD(VPLoadSDNode *LD, SDValue &Lo, SDValue &Hi);
933 void SplitVecRes_VP_STRIDED_LOAD(VPStridedLoadSDNode *SLD, SDValue &Lo,
934 SDValue &Hi);
935 void SplitVecRes_MLOAD(MaskedLoadSDNode *MLD, SDValue &Lo, SDValue &Hi);
936 void SplitVecRes_Gather(MemSDNode *VPGT, SDValue &Lo, SDValue &Hi,
937 bool SplitSETCC = false);
938 void SplitVecRes_VECTOR_COMPRESS(SDNode *N, SDValue &Lo, SDValue &Hi);
939 void SplitVecRes_ScalarOp(SDNode *N, SDValue &Lo, SDValue &Hi);
940 void SplitVecRes_VP_SPLAT(SDNode *N, SDValue &Lo, SDValue &Hi);
941 void SplitVecRes_STEP_VECTOR(SDNode *N, SDValue &Lo, SDValue &Hi);
942 void SplitVecRes_SETCC(SDNode *N, SDValue &Lo, SDValue &Hi);
943 void SplitVecRes_VECTOR_REVERSE(SDNode *N, SDValue &Lo, SDValue &Hi);
944 void SplitVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N, SDValue &Lo,
945 SDValue &Hi);
946 void SplitVecRes_VECTOR_SPLICE(SDNode *N, SDValue &Lo, SDValue &Hi);
947 void SplitVecRes_VECTOR_DEINTERLEAVE(SDNode *N);
948 void SplitVecRes_VECTOR_INTERLEAVE(SDNode *N);
949 void SplitVecRes_VAARG(SDNode *N, SDValue &Lo, SDValue &Hi);
950 void SplitVecRes_FP_TO_XINT_SAT(SDNode *N, SDValue &Lo, SDValue &Hi);
951 void SplitVecRes_VP_REVERSE(SDNode *N, SDValue &Lo, SDValue &Hi);
952
953 // Vector Operand Splitting: <128 x ty> -> 2 x <64 x ty>.
954 bool SplitVectorOperand(SDNode *N, unsigned OpNo);
955 SDValue SplitVecOp_VSELECT(SDNode *N, unsigned OpNo);
956 SDValue SplitVecOp_VECREDUCE(SDNode *N, unsigned OpNo);
957 SDValue SplitVecOp_VECREDUCE_SEQ(SDNode *N);
958 SDValue SplitVecOp_VP_REDUCE(SDNode *N, unsigned OpNo);
959 SDValue SplitVecOp_UnaryOp(SDNode *N);
960 SDValue SplitVecOp_TruncateHelper(SDNode *N);
961
962 SDValue SplitVecOp_BITCAST(SDNode *N);
963 SDValue SplitVecOp_INSERT_SUBVECTOR(SDNode *N, unsigned OpNo);
964 SDValue SplitVecOp_EXTRACT_SUBVECTOR(SDNode *N);
965 SDValue SplitVecOp_EXTRACT_VECTOR_ELT(SDNode *N);
966 SDValue SplitVecOp_ExtVecInRegOp(SDNode *N);
967 SDValue SplitVecOp_STORE(StoreSDNode *N, unsigned OpNo);
968 SDValue SplitVecOp_VP_STORE(VPStoreSDNode *N, unsigned OpNo);
969 SDValue SplitVecOp_VP_STRIDED_STORE(VPStridedStoreSDNode *N, unsigned OpNo);
970 SDValue SplitVecOp_MSTORE(MaskedStoreSDNode *N, unsigned OpNo);
971 SDValue SplitVecOp_Scatter(MemSDNode *N, unsigned OpNo);
972 SDValue SplitVecOp_Gather(MemSDNode *MGT, unsigned OpNo);
973 SDValue SplitVecOp_CONCAT_VECTORS(SDNode *N);
974 SDValue SplitVecOp_VSETCC(SDNode *N);
975 SDValue SplitVecOp_FP_ROUND(SDNode *N);
976 SDValue SplitVecOp_FPOpDifferentTypes(SDNode *N);
977 SDValue SplitVecOp_CMP(SDNode *N);
978 SDValue SplitVecOp_FP_TO_XINT_SAT(SDNode *N);
979 SDValue SplitVecOp_VP_CttzElements(SDNode *N);
980
981 //===--------------------------------------------------------------------===//
982 // Vector Widening Support: LegalizeVectorTypes.cpp
983 //===--------------------------------------------------------------------===//
984
985 /// Given a processed vector Op which was widened into a larger vector, this
986 /// method returns the larger vector. The elements of the returned vector
987 /// consist of the elements of Op followed by elements containing rubbish.
988 /// For example, if Op is a v2i32 that was widened to a v4i32, then this
989 /// method returns a v4i32 for which the first two elements are the same as
990 /// those of Op, while the last two elements contain rubbish.
991 SDValue GetWidenedVector(SDValue Op) {
992 TableId &WidenedId = WidenedVectors[getTableId(Op)];
993 SDValue WidenedOp = getSDValue(WidenedId);
994 assert(WidenedOp.getNode() && "Operand wasn't widened?");
995 return WidenedOp;
996 }
997 void SetWidenedVector(SDValue Op, SDValue Result);
998
999 /// Given a mask Mask, returns the larger vector into which Mask was widened.
1000 SDValue GetWidenedMask(SDValue Mask, ElementCount EC) {
1001 // For VP operations, we must also widen the mask. Note that the mask type
1002 // may not actually need widening, leading it be split along with the VP
1003 // operation.
1004 // FIXME: This could lead to an infinite split/widen loop. We only handle
1005 // the case where the mask needs widening to an identically-sized type as
1006 // the vector inputs.
1007 assert(getTypeAction(Mask.getValueType()) ==
1008 TargetLowering::TypeWidenVector &&
1009 "Unable to widen binary VP op");
1010 Mask = GetWidenedVector(Mask);
1011 assert(Mask.getValueType().getVectorElementCount() == EC &&
1012 "Unable to widen binary VP op");
1013 return Mask;
1014 }
1015
1016 // Widen Vector Result Promotion.
1017 void WidenVectorResult(SDNode *N, unsigned ResNo);
1018 SDValue WidenVecRes_MERGE_VALUES(SDNode* N, unsigned ResNo);
1019 SDValue WidenVecRes_ADDRSPACECAST(SDNode *N);
1020 SDValue WidenVecRes_AssertZext(SDNode* N);
1021 SDValue WidenVecRes_BITCAST(SDNode* N);
1022 SDValue WidenVecRes_BUILD_VECTOR(SDNode* N);
1023 SDValue WidenVecRes_CONCAT_VECTORS(SDNode* N);
1024 SDValue WidenVecRes_EXTEND_VECTOR_INREG(SDNode* N);
1025 SDValue WidenVecRes_EXTRACT_SUBVECTOR(SDNode* N);
1026 SDValue WidenVecRes_INSERT_SUBVECTOR(SDNode *N);
1027 SDValue WidenVecRes_INSERT_VECTOR_ELT(SDNode* N);
1028 SDValue WidenVecRes_LOAD(SDNode* N);
1029 SDValue WidenVecRes_VP_LOAD(VPLoadSDNode *N);
1030 SDValue WidenVecRes_VP_STRIDED_LOAD(VPStridedLoadSDNode *N);
1031 SDValue WidenVecRes_VECTOR_COMPRESS(SDNode *N);
1032 SDValue WidenVecRes_MLOAD(MaskedLoadSDNode* N);
1033 SDValue WidenVecRes_MGATHER(MaskedGatherSDNode* N);
1034 SDValue WidenVecRes_VP_GATHER(VPGatherSDNode* N);
1035 SDValue WidenVecRes_ScalarOp(SDNode* N);
1036 SDValue WidenVecRes_Select(SDNode *N);
1037 SDValue WidenVSELECTMask(SDNode *N);
1038 SDValue WidenVecRes_SELECT_CC(SDNode* N);
1039 SDValue WidenVecRes_SETCC(SDNode* N);
1040 SDValue WidenVecRes_STRICT_FSETCC(SDNode* N);
1041 SDValue WidenVecRes_UNDEF(SDNode *N);
1042 SDValue WidenVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N);
1043 SDValue WidenVecRes_VECTOR_REVERSE(SDNode *N);
1044
1045 SDValue WidenVecRes_Ternary(SDNode *N);
1046 SDValue WidenVecRes_Binary(SDNode *N);
1047 SDValue WidenVecRes_CMP(SDNode *N);
1048 SDValue WidenVecRes_BinaryCanTrap(SDNode *N);
1049 SDValue WidenVecRes_BinaryWithExtraScalarOp(SDNode *N);
1050 SDValue WidenVecRes_StrictFP(SDNode *N);
1051 SDValue WidenVecRes_OverflowOp(SDNode *N, unsigned ResNo);
1052 SDValue WidenVecRes_Convert(SDNode *N);
1053 SDValue WidenVecRes_Convert_StrictFP(SDNode *N);
1054 SDValue WidenVecRes_FP_TO_XINT_SAT(SDNode *N);
1055 SDValue WidenVecRes_XRINT(SDNode *N);
1056 SDValue WidenVecRes_FCOPYSIGN(SDNode *N);
1057 SDValue WidenVecRes_UnarySameEltsWithScalarArg(SDNode *N);
1058 SDValue WidenVecRes_ExpOp(SDNode *N);
1059 SDValue WidenVecRes_Unary(SDNode *N);
1060 SDValue WidenVecRes_InregOp(SDNode *N);
1061
1062 // Widen Vector Operand.
1063 bool WidenVectorOperand(SDNode *N, unsigned OpNo);
1064 SDValue WidenVecOp_BITCAST(SDNode *N);
1065 SDValue WidenVecOp_CONCAT_VECTORS(SDNode *N);
1066 SDValue WidenVecOp_EXTEND(SDNode *N);
1067 SDValue WidenVecOp_CMP(SDNode *N);
1068 SDValue WidenVecOp_EXTRACT_VECTOR_ELT(SDNode *N);
1069 SDValue WidenVecOp_INSERT_SUBVECTOR(SDNode *N);
1070 SDValue WidenVecOp_EXTRACT_SUBVECTOR(SDNode *N);
1071 SDValue WidenVecOp_EXTEND_VECTOR_INREG(SDNode *N);
1072 SDValue WidenVecOp_STORE(SDNode* N);
1073 SDValue WidenVecOp_VP_STORE(SDNode *N, unsigned OpNo);
1074 SDValue WidenVecOp_VP_STRIDED_STORE(SDNode *N, unsigned OpNo);
1075 SDValue WidenVecOp_MSTORE(SDNode* N, unsigned OpNo);
1076 SDValue WidenVecOp_MGATHER(SDNode* N, unsigned OpNo);
1077 SDValue WidenVecOp_MSCATTER(SDNode* N, unsigned OpNo);
1078 SDValue WidenVecOp_VP_SCATTER(SDNode* N, unsigned OpNo);
1079 SDValue WidenVecOp_VP_SPLAT(SDNode *N, unsigned OpNo);
1080 SDValue WidenVecOp_SETCC(SDNode* N);
1081 SDValue WidenVecOp_STRICT_FSETCC(SDNode* N);
1082 SDValue WidenVecOp_VSELECT(SDNode *N);
1083
1084 SDValue WidenVecOp_Convert(SDNode *N);
1085 SDValue WidenVecOp_FP_TO_XINT_SAT(SDNode *N);
1086 SDValue WidenVecOp_UnrollVectorOp(SDNode *N);
1087 SDValue WidenVecOp_IS_FPCLASS(SDNode *N);
1088 SDValue WidenVecOp_VECREDUCE(SDNode *N);
1089 SDValue WidenVecOp_VECREDUCE_SEQ(SDNode *N);
1090 SDValue WidenVecOp_VP_REDUCE(SDNode *N);
1091 SDValue WidenVecOp_ExpOp(SDNode *N);
1092 SDValue WidenVecOp_VP_CttzElements(SDNode *N);
1093
1094 /// Helper function to generate a set of operations to perform
1095 /// a vector operation for a wider type.
1096 ///
1097 SDValue UnrollVectorOp_StrictFP(SDNode *N, unsigned ResNE);
1098
1099 //===--------------------------------------------------------------------===//
1100 // Vector Widening Utilities Support: LegalizeVectorTypes.cpp
1101 //===--------------------------------------------------------------------===//
1102
1103 /// Helper function to generate a set of loads to load a vector with a
1104 /// resulting wider type. It takes:
1105 /// LdChain: list of chains for the load to be generated.
1106 /// Ld: load to widen
1107 SDValue GenWidenVectorLoads(SmallVectorImpl<SDValue> &LdChain,
1108 LoadSDNode *LD);
1109
1110 /// Helper function to generate a set of extension loads to load a vector with
1111 /// a resulting wider type. It takes:
1112 /// LdChain: list of chains for the load to be generated.
1113 /// Ld: load to widen
1114 /// ExtType: extension element type
1115 SDValue GenWidenVectorExtLoads(SmallVectorImpl<SDValue> &LdChain,
1116 LoadSDNode *LD, ISD::LoadExtType ExtType);
1117
1118 /// Helper function to generate a set of stores to store a widen vector into
1119 /// non-widen memory. Returns true if successful, false otherwise.
1120 /// StChain: list of chains for the stores we have generated
1121 /// ST: store of a widen value
1122 bool GenWidenVectorStores(SmallVectorImpl<SDValue> &StChain, StoreSDNode *ST);
1123
1124 /// Modifies a vector input (widen or narrows) to a vector of NVT. The
1125 /// input vector must have the same element type as NVT.
1126 /// When FillWithZeroes is "on" the vector will be widened with zeroes.
1127 /// By default, the vector will be widened with undefined values.
1128 SDValue ModifyToType(SDValue InOp, EVT NVT, bool FillWithZeroes = false);
1129
1130 /// Return a mask of vector type MaskVT to replace InMask. Also adjust
1131 /// MaskVT to ToMaskVT if needed with vector extension or truncation.
1132 SDValue convertMask(SDValue InMask, EVT MaskVT, EVT ToMaskVT);
1133
1134 //===--------------------------------------------------------------------===//
1135 // Generic Splitting: LegalizeTypesGeneric.cpp
1136 //===--------------------------------------------------------------------===//
1137
1138 // Legalization methods which only use that the illegal type is split into two
1139 // not necessarily identical types. As such they can be used for splitting
1140 // vectors and expanding integers and floats.
1141
1142 void GetSplitOp(SDValue Op, SDValue &Lo, SDValue &Hi) {
1143 if (Op.getValueType().isVector())
1144 GetSplitVector(Op, Lo, Hi);
1145 else if (Op.getValueType().isInteger())
1146 GetExpandedInteger(Op, Lo, Hi);
1147 else
1148 GetExpandedFloat(Op, Lo, Hi);
1149 }
1150
1151 /// Use ISD::EXTRACT_ELEMENT nodes to extract the low and high parts of the
1152 /// given value.
1153 void GetPairElements(SDValue Pair, SDValue &Lo, SDValue &Hi);
1154
1155 // Generic Result Splitting.
1156 void SplitRes_MERGE_VALUES(SDNode *N, unsigned ResNo,
1157 SDValue &Lo, SDValue &Hi);
1158 void SplitVecRes_AssertZext (SDNode *N, SDValue &Lo, SDValue &Hi);
1159 void SplitRes_ARITH_FENCE (SDNode *N, SDValue &Lo, SDValue &Hi);
1160 void SplitRes_Select (SDNode *N, SDValue &Lo, SDValue &Hi);
1161 void SplitRes_SELECT_CC (SDNode *N, SDValue &Lo, SDValue &Hi);
1162 void SplitRes_UNDEF (SDNode *N, SDValue &Lo, SDValue &Hi);
1163 void SplitRes_FREEZE (SDNode *N, SDValue &Lo, SDValue &Hi);
1164
1165 //===--------------------------------------------------------------------===//
1166 // Generic Expansion: LegalizeTypesGeneric.cpp
1167 //===--------------------------------------------------------------------===//
1168
1169 // Legalization methods which only use that the illegal type is split into two
1170 // identical types of half the size, and that the Lo/Hi part is stored first
1171 // in memory on little/big-endian machines, followed by the Hi/Lo part. As
1172 // such they can be used for expanding integers and floats.
1173
1174 void GetExpandedOp(SDValue Op, SDValue &Lo, SDValue &Hi) {
1175 if (Op.getValueType().isInteger())
1176 GetExpandedInteger(Op, Lo, Hi);
1177 else
1178 GetExpandedFloat(Op, Lo, Hi);
1179 }
1180
1181
1182 /// This function will split the integer \p Op into \p NumElements
1183 /// operations of type \p EltVT and store them in \p Ops.
1184 void IntegerToVector(SDValue Op, unsigned NumElements,
1185 SmallVectorImpl<SDValue> &Ops, EVT EltVT);
1186
1187 // Generic Result Expansion.
1188 void ExpandRes_MERGE_VALUES (SDNode *N, unsigned ResNo,
1189 SDValue &Lo, SDValue &Hi);
1190 void ExpandRes_BITCAST (SDNode *N, SDValue &Lo, SDValue &Hi);
1191 void ExpandRes_BUILD_PAIR (SDNode *N, SDValue &Lo, SDValue &Hi);
1192 void ExpandRes_EXTRACT_ELEMENT (SDNode *N, SDValue &Lo, SDValue &Hi);
1193 void ExpandRes_EXTRACT_VECTOR_ELT(SDNode *N, SDValue &Lo, SDValue &Hi);
1194 void ExpandRes_NormalLoad (SDNode *N, SDValue &Lo, SDValue &Hi);
1195 void ExpandRes_VAARG (SDNode *N, SDValue &Lo, SDValue &Hi);
1196
1197 // Generic Operand Expansion.
1198 SDValue ExpandOp_BITCAST (SDNode *N);
1199 SDValue ExpandOp_BUILD_VECTOR (SDNode *N);
1200 SDValue ExpandOp_EXTRACT_ELEMENT (SDNode *N);
1201 SDValue ExpandOp_INSERT_VECTOR_ELT(SDNode *N);
1202 SDValue ExpandOp_SCALAR_TO_VECTOR (SDNode *N);
1203 SDValue ExpandOp_NormalStore (SDNode *N, unsigned OpNo);
1204};
1205
1206} // end namespace llvm.
1207
1208#endif
DL
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Definition: ARMSLSHardening.cpp:73
From
BlockVerifier::State From
Definition: BlockVerifier.cpp:57
LLVM_LIBRARY_VISIBILITY
#define LLVM_LIBRARY_VISIBILITY
Definition: Compiler.h:131
DenseMap.h
This file defines the DenseMap class.
I
#define I(x, y, z)
Definition: MD5.cpp:58
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
TargetLowering.h
This file describes how to lower LLVM code to machine code.
RHS
Value * RHS
Definition: X86PartialReduction.cpp:76
LHS
Value * LHS
Definition: X86PartialReduction.cpp:75
Lo
support::ulittle16_t & Lo
Definition: aarch32.cpp:206
Hi
support::ulittle16_t & Hi
Definition: aarch32.cpp:205
llvm::DAGTypeLegalizer
This takes an arbitrary SelectionDAG as input and hacks on it until only value types the target machi...
Definition: LegalizeTypes.h:31
llvm::DAGTypeLegalizer::DAGTypeLegalizer
DAGTypeLegalizer(SelectionDAG &dag)
Definition: LegalizeTypes.h:168
llvm::DAGTypeLegalizer::NoteDeletion
void NoteDeletion(SDNode *Old, SDNode *New)
Definition: LegalizeTypes.h:178
llvm::DAGTypeLegalizer::getDAG
SelectionDAG & getDAG() const
Definition: LegalizeTypes.h:206
llvm::DAGTypeLegalizer::NodeIdFlags
NodeIdFlags
This pass uses the NodeId on the SDNodes to hold information about the state of the node.
Definition: LegalizeTypes.h:37
llvm::DWARFExpression::Operation
This class represents an Operation in the Expression.
Definition: DWARFExpression.h:32
llvm::SDNode
Represents one node in the SelectionDAG.
Definition: SelectionDAGNodes.h:477
llvm::SDNode::getNumValues
unsigned getNumValues() const
Return the number of values defined/returned by this operator.
Definition: SelectionDAGNodes.h:1028
llvm::SDValue
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
Definition: SelectionDAGNodes.h:145
llvm::SDValue::getNode
SDNode * getNode() const
get the SDNode which holds the desired result
Definition: SelectionDAGNodes.h:159
llvm::SelectionDAG
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
Definition: SelectionDAG.h:226
llvm::SelectionDAG::getVPZeroExtendInReg
SDValue getVPZeroExtendInReg(SDValue Op, SDValue Mask, SDValue EVL, const SDLoc &DL, EVT VT)
Return the expression required to zero extend the Op value assuming it was the smaller SrcTy value.
Definition: SelectionDAG.cpp:1544
llvm::SelectionDAG::getShiftAmountConstant
SDValue getShiftAmountConstant(uint64_t Val, EVT VT, const SDLoc &DL)
Definition: SelectionDAG.cpp:1761
llvm::SelectionDAG::getZeroExtendInReg
SDValue getZeroExtendInReg(SDValue Op, const SDLoc &DL, EVT VT)
Return the expression required to zero extend the Op value assuming it was the smaller SrcTy value.
Definition: SelectionDAG.cpp:1526
llvm::SelectionDAG::getDataLayout
const DataLayout & getDataLayout() const
Definition: SelectionDAG.h:487
llvm::SelectionDAG::getValueType
SDValue getValueType(EVT)
Definition: SelectionDAG.cpp:1982
llvm::SelectionDAG::getNode
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, ArrayRef< SDUse > Ops)
Gets or creates the specified node.
Definition: SelectionDAG.cpp:10019
llvm::SelectionDAG::getContext
LLVMContext * getContext() const
Definition: SelectionDAG.h:500
llvm::TargetLoweringBase::ValueTypeActionImpl::getTypeAction
LegalizeTypeAction getTypeAction(MVT VT) const
Definition: TargetLowering.h:1094
llvm::TargetLoweringBase::LegalizeTypeAction
LegalizeTypeAction
This enum indicates whether a types are legal for a target, and if not, what action should be used to...
Definition: TargetLowering.h:209
llvm::TargetLowering
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
Definition: TargetLowering.h:3777
uint64_t
llvm::BitmaskEnumDetail::Mask
constexpr std::underlying_type_t< E > Mask()
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
Definition: BitmaskEnum.h:121
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
N
#define N
llvm::EVT
Extended Value Type.
Definition: ValueTypes.h:35
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