35 "mips-round-section-sizes",
cl::init(
false),
40 return STI->
hasFeature(Mips::FeatureMicroMips);
84 unsigned ReturnReg) {}
149 bool SaveLocationIsRegister) {}
227 unsigned Reg2,
SMLoc IDLoc,
246 int16_t Imm,
SMLoc IDLoc,
252 unsigned Reg1, int16_t Imm0, int16_t Imm1,
253 int16_t Imm2,
SMLoc IDLoc,
267 unsigned TrgReg,
bool Is64Bit,
269 emitRRR(Is64Bit ? Mips::DADDu : Mips::ADDu, DstReg, SrcReg, TrgReg,
SMLoc(),
274 int16_t ShiftAmount,
SMLoc IDLoc,
276 if (ShiftAmount >= 32) {
277 emitRRI(Mips::DSLL32, DstReg, SrcReg, ShiftAmount - 32, IDLoc, STI);
281 emitRRI(Mips::DSLL, DstReg, SrcReg, ShiftAmount, IDLoc, STI);
287 unsigned Opc = Mips::SLL;
289 Opc =
isMips32r6(STI) ? Mips::MOVE16_MMR6 : Mips::MOVE16_MM;
290 emitRR(Opc, Mips::ZERO, Mips::ZERO, IDLoc, STI);
295 Opc =
isMips32r6(STI) ? Mips::SLL_MMR6 : Mips::SLL_MM;
297 emitRRI(Opc, Mips::ZERO, Mips::ZERO, 0, IDLoc, STI);
302 emitRR(Mips::MOVE16_MM, Mips::ZERO, Mips::ZERO, IDLoc, STI);
304 emitRRI(Mips::SLL, Mips::ZERO, Mips::ZERO, 0, IDLoc, STI);
315 unsigned Opcode,
unsigned SrcReg,
unsigned BaseReg, int64_t
Offset,
327 unsigned ATReg = GetATReg();
331 unsigned LoOffset =
Offset & 0x0000ffff;
332 unsigned HiOffset = (
Offset & 0xffff0000) >> 16;
336 if (LoOffset & 0x8000)
340 emitRI(Mips::LUi, ATReg, HiOffset, IDLoc, STI);
341 if (BaseReg != Mips::ZERO)
342 emitRRR(Mips::ADDu, ATReg, ATReg, BaseReg, IDLoc, STI);
344 emitRRI(Opcode, SrcReg, ATReg, LoOffset, IDLoc, STI);
352 unsigned BaseReg, int64_t
Offset,
353 unsigned TmpReg,
SMLoc IDLoc,
367 unsigned LoOffset =
Offset & 0x0000ffff;
368 unsigned HiOffset = (
Offset & 0xffff0000) >> 16;
372 if (LoOffset & 0x8000)
376 emitRI(Mips::LUi, TmpReg, HiOffset, IDLoc, STI);
377 if (BaseReg != Mips::ZERO)
378 emitRRR(Mips::ADDu, TmpReg, TmpReg, BaseReg, IDLoc, STI);
380 emitRRI(Opcode, DstReg, TmpReg, LoOffset, IDLoc, STI);
388 OS <<
"\t.set\tmicromips\n";
393 OS <<
"\t.set\tnomicromips\n";
398 OS <<
"\t.set\tmips16\n";
403 OS <<
"\t.set\tnomips16\n";
408 OS <<
"\t.set\treorder\n";
413 OS <<
"\t.set\tnoreorder\n";
418 OS <<
"\t.set\tmacro\n";
423 OS <<
"\t.set\tnomacro\n";
428 OS <<
"\t.set\tmsa\n";
433 OS <<
"\t.set\tnomsa\n";
438 OS <<
"\t.set\tmt\n";
443 OS <<
"\t.set\tnomt\n";
448 OS <<
"\t.set\tcrc\n";
453 OS <<
"\t.set\tnocrc\n";
458 OS <<
"\t.set\tvirt\n";
463 OS <<
"\t.set\tnovirt\n";
468 OS <<
"\t.set\tginv\n";
473 OS <<
"\t.set\tnoginv\n";
478 OS <<
"\t.set\tat\n";
483 OS <<
"\t.set\tat=$" <<
Twine(RegNo) <<
"\n";
488 OS <<
"\t.set\tnoat\n";
493 OS <<
"\t.end\t" <<
Name <<
'\n';
497 OS <<
"\t.ent\t" << Symbol.getName() <<
'\n';
505 OS <<
"\t.nan\tlegacy\n";
509 OS <<
"\t.option\tpic0\n";
513 OS <<
"\t.option\tpic2\n";
522 unsigned ReturnReg) {
530 OS <<
"\t.set arch=" << Arch <<
"\n";
535 OS <<
"\t.set\tmips0\n";
540 OS <<
"\t.set\tmips1\n";
545 OS <<
"\t.set\tmips2\n";
550 OS <<
"\t.set\tmips3\n";
555 OS <<
"\t.set\tmips4\n";
560 OS <<
"\t.set\tmips5\n";
565 OS <<
"\t.set\tmips32\n";
570 OS <<
"\t.set\tmips32r2\n";
575 OS <<
"\t.set\tmips32r3\n";
580 OS <<
"\t.set\tmips32r5\n";
585 OS <<
"\t.set\tmips32r6\n";
590 OS <<
"\t.set\tmips64\n";
595 OS <<
"\t.set\tmips64r2\n";
600 OS <<
"\t.set\tmips64r3\n";
605 OS <<
"\t.set\tmips64r5\n";
610 OS <<
"\t.set\tmips64r6\n";
615 OS <<
"\t.set\tdsp\n";
620 OS <<
"\t.set\tdspr2\n";
625 OS <<
"\t.set\tnodsp\n";
630 OS <<
"\t.set\tmips3d\n";
635 OS <<
"\t.set\tnomips3d\n";
640 OS <<
"\t.set\tpop\n";
645 OS <<
"\t.set\tpush\n";
650 OS <<
"\t.set\tsoftfloat\n";
655 OS <<
"\t.set\thardfloat\n";
662 for (
int i = 7; i >= 0; i--)
667 int CPUTopSavedRegOff) {
670 OS <<
',' << CPUTopSavedRegOff <<
'\n';
674 int FPUTopSavedRegOff) {
677 OS <<
"," << FPUTopSavedRegOff <<
'\n';
693 OS <<
"\t.cplocal\t$"
702 OS <<
"\t.cprestore\t" <<
Offset <<
"\n";
710 OS <<
"\t.cpsetup\t$"
726 bool SaveLocationIsRegister) {
734 OS <<
"\t.module\tsoftfloat\n";
755 OS <<
"\t.set\toddspreg\n";
760 OS <<
"\t.set\tnooddspreg\n";
764 OS <<
"\t.module\tsoftfloat\n";
768 OS <<
"\t.module\thardfloat\n";
772 OS <<
"\t.module\tmt\n";
776 OS <<
"\t.module\tcrc\n";
780 OS <<
"\t.module\tnocrc\n";
784 OS <<
"\t.module\tvirt\n";
788 OS <<
"\t.module\tnovirt\n";
792 OS <<
"\t.module\tginv\n";
796 OS <<
"\t.module\tnoginv\n";
841 if (Features[Mips::FeatureMips64r6])
843 else if (Features[Mips::FeatureMips64r2] ||
844 Features[Mips::FeatureMips64r3] ||
845 Features[Mips::FeatureMips64r5])
847 else if (Features[Mips::FeatureMips64])
849 else if (Features[Mips::FeatureMips5])
851 else if (Features[Mips::FeatureMips4])
853 else if (Features[Mips::FeatureMips3])
855 else if (Features[Mips::FeatureMips32r6])
857 else if (Features[Mips::FeatureMips32r2] ||
858 Features[Mips::FeatureMips32r3] ||
859 Features[Mips::FeatureMips32r5])
861 else if (Features[Mips::FeatureMips32])
863 else if (Features[Mips::FeatureMips2])
869 if (Features[Mips::FeatureCnMips])
873 if (Features[Mips::FeatureNaN2008])
880 auto *Symbol = cast<MCSymbolELF>(S);
882 uint8_t
Type = Symbol->getType();
906 if (RoundSectionSizes) {
915 Align Alignment = Section.getAlign();
916 OS.switchSection(&Section);
917 if (Section.useCodeAlign())
918 OS.emitCodeAlignment(Alignment, &STI, Alignment.
value());
920 OS.emitValueToAlignment(Alignment, 0, 1, Alignment.
value());
937 if (Features[Mips::FeatureGP64Bit]) {
940 }
else if (Features[Mips::FeatureMips64r2] || Features[Mips::FeatureMips64])
945 if (!Features[Mips::FeatureNoABICalls])
963 auto *Symbol = cast<MCSymbolELF>(S);
967 const auto &RhsSym = cast<MCSymbolELF>(
981 MicroMipsEnabled =
true;
986 MicroMipsEnabled =
false;
1029 OS.switchSection(Sec);
1031 OS.emitValueImpl(ExprRef, 4);
1051 OS.emitLabel(CurPCSym);
1086 Flags &= ~ELF::EF_MIPS_NAN2008;
1095 Flags &= ~ELF::EF_MIPS_PIC;
1118 unsigned ReturnReg_) {
1129 int CPUTopSavedRegOff) {
1136 int FPUTopSavedRegOff) {
1296 bool SaveLocationIsRegister) {
1303 if (SaveLocationIsRegister) {
1327 OS.switchSection(Sec);
static bool hasShortDelaySlot(MCInst &Inst)
static bool isMicroMips(const MCSubtargetInfo *STI)
static void printHex32(unsigned Value, raw_ostream &OS)
static bool isMips32r6(const MCSubtargetInfo *STI)
Container class for subtarget features.
MCContext & getContext() const
unsigned getELFHeaderEFlags() const
ELF e_header flags.
bool registerSection(MCSection &Section)
void setELFHeaderEFlags(unsigned Flags)
bool registerSymbol(const MCSymbol &Symbol)
static const MCBinaryExpr * createSub(const MCExpr *LHS, const MCExpr *RHS, MCContext &Ctx)
Context object for machine code objects.
const MCObjectFileInfo * getObjectFileInfo() const
MCSymbol * getOrCreateSymbol(const Twine &Name)
Lookup the symbol inside with the specified Name.
Base class for the full range of assembler expressions which are needed for parsing.
@ SymbolRef
References to labels and assigned expressions.
Instances of this class represent a single low-level machine instruction.
void addOperand(const MCOperand Op)
void setOpcode(unsigned Op)
MCSection * getBSSSection() const
bool isPositionIndependent() const
MCSection * getTextSection() const
MCSection * getDataSection() const
MCAssembler & getAssembler()
void emitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI) override
Emit the given Instruction into the current section.
Instances of this class represent operands of the MCInst class.
static MCOperand createReg(unsigned Reg)
static MCOperand createExpr(const MCExpr *Val)
static MCOperand createImm(int64_t Val)
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
uint16_t getEncodingValue(MCRegister RegNo) const
Returns the encoding for RegNo.
This represents a section on linux, lots of unix variants and some bare metal systems.
Instances of this class represent a uniqued identifier for a section in the current translation unit.
void setAlignment(Align Value)
void ensureMinAlignment(Align MinAlignment)
Makes sure that Alignment is at least MinAlignment.
Streaming machine code generation interface.
virtual void emitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI)
Emit the given Instruction into the current section.
Generic base class for all target subtargets.
bool hasFeature(unsigned Feature) const
const Triple & getTargetTriple() const
const FeatureBitset & getFeatureBits() const
Represent a reference to a symbol from inside an expression.
static const MCSymbolRefExpr * create(const MCSymbol *Symbol, MCContext &Ctx)
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Target specific streamer interface.
MCStreamer & getStreamer()
void EmitMipsOptionRecords()
Emits all the option records stored up until the point it's called.
void createPendingLabelRelocs()
Mark labels as microMIPS, if necessary for the subtarget.
static const char * getRegisterName(MCRegister Reg)
static const MipsMCExpr * create(MipsExprKind Kind, const MCExpr *Expr, MCContext &Ctx)
static const MipsMCExpr * createGpOff(MipsExprKind Kind, const MCExpr *Expr, MCContext &Ctx)
void emitDirectiveSetMips32R3() override
void emitDirectiveSetFp(MipsABIFlagsSection::FpABIKind Value) override
void emitDirectiveSetArch(StringRef Arch) override
void emitDirectiveModuleGINV() override
bool emitDirectiveCpRestore(int Offset, function_ref< unsigned()> GetATReg, SMLoc IDLoc, const MCSubtargetInfo *STI) override
Emit a .cprestore directive.
MipsTargetAsmStreamer(MCStreamer &S, formatted_raw_ostream &OS)
void emitDirectiveSetMips5() override
void emitDirectiveCpLoad(unsigned RegNo) override
void emitDirectiveSetNoVirt() override
void emitDirectiveSetNoAt() override
void emitDirectiveSetNoCRC() override
void emitDirectiveSetMips32R5() override
void emitDirectiveSetNoMacro() override
void emitDirectiveModuleMT() override
void emitDirectiveSetNoOddSPReg() override
void emitDirectiveModuleCRC() override
void emitDirectiveEnt(const MCSymbol &Symbol) override
void emitDirectiveSetDspr2() override
void emitDirectiveSetMips1() override
void emitDirectiveSetMips64R2() override
void emitDirectiveSetMips4() override
void emitDirectiveModuleSoftFloat() override
void emitDirectiveSetMips16() override
void emitDirectiveSetMt() override
void emitDirectiveInsn() override
void emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset, const MCSymbol &Sym, bool IsReg) override
void emitDirectiveSetMicroMips() override
void emitDirectiveModuleNoCRC() override
void emitDirectiveSetMips32R6() override
void emitDirectiveSetNoGINV() override
void emitDirectiveSetMips64R5() override
void emitDirectiveSetMips32() override
void emitDirectiveCpLocal(unsigned RegNo) override
void emitDirectiveSetNoMips3D() override
void emitDirectiveSetPush() override
void emitDirectiveSetNoMips16() override
void emitDirectiveSetNoDsp() override
void emitDirectiveSetMips32R2() override
void emitDirectiveSetMips64() override
void emitDirectiveModuleHardFloat() override
void emitDirectiveOptionPic0() override
void emitDirectiveSetMacro() override
void emitDirectiveSetCRC() override
void emitDirectiveSetNoReorder() override
void emitDirectiveEnd(StringRef Name) override
void emitDirectiveSetMips64R3() override
void emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) override
void emitDirectiveSetNoMt() override
void emitDirectiveAbiCalls() override
void emitDirectiveSetMsa() override
void emitDirectiveOptionPic2() override
void emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) override
void emitDirectiveModuleVirt() override
void emitFrame(unsigned StackReg, unsigned StackSize, unsigned ReturnReg) override
void emitDirectiveSetGINV() override
void emitDirectiveSetNoMsa() override
void emitDirectiveCpreturn(unsigned SaveLocation, bool SaveLocationIsRegister) override
void emitDirectiveCpAdd(unsigned RegNo) override
void emitDirectiveModuleNoVirt() override
void emitDirectiveNaN2008() override
void emitDirectiveSetPop() override
void emitDirectiveSetMips3() override
void emitDirectiveSetMips0() override
void emitDirectiveSetHardFloat() override
void emitDirectiveModuleNoGINV() override
void emitDirectiveSetVirt() override
void emitDirectiveModuleFP() override
void emitDirectiveSetMips2() override
void emitDirectiveSetMips3D() override
void emitDirectiveSetAtWithArg(unsigned RegNo) override
void emitDirectiveSetReorder() override
void emitDirectiveNaNLegacy() override
void emitDirectiveSetMips64R6() override
void emitDirectiveSetSoftFloat() override
void emitDirectiveSetNoMicroMips() override
void emitDirectiveSetAt() override
void emitDirectiveSetOddSPReg() override
void emitDirectiveModuleOddSPReg() override
void emitDirectiveSetDsp() override
void emitDirectiveCpAdd(unsigned RegNo) override
void emitDirectiveCpLoad(unsigned RegNo) override
MipsTargetELFStreamer(MCStreamer &S, const MCSubtargetInfo &STI)
void emitDirectiveNaN2008() override
void emitDirectiveSetNoMicroMips() override
void emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset, const MCSymbol &Sym, bool IsReg) override
void emitDirectiveInsn() override
void setUsesMicroMips() override
void emitDirectiveOptionPic2() override
bool isMicroMipsEnabled() const
void emitDirectiveEnd(StringRef Name) override
bool emitDirectiveCpRestore(int Offset, function_ref< unsigned()> GetATReg, SMLoc IDLoc, const MCSubtargetInfo *STI) override
void emitDirectiveSetMicroMips() override
void emitLabel(MCSymbol *Symbol) override
void emitDirectiveCpLocal(unsigned RegNo) override
void emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) override
void emitDirectiveAbiCalls() override
void emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) override
void emitFrame(unsigned StackReg, unsigned StackSize, unsigned ReturnReg) override
void emitAssignment(MCSymbol *Symbol, const MCExpr *Value) override
void emitDirectiveCpreturn(unsigned SaveLocation, bool SaveLocationIsRegister) override
void emitDirectiveSetMips16() override
void emitDirectiveOptionPic0() override
void emitDirectiveEnt(const MCSymbol &Symbol) override
void emitDirectiveSetNoReorder() override
void emitDirectiveNaNLegacy() override
MCELFStreamer & getStreamer()
std::optional< MipsABIInfo > ABI
virtual void emitDirectiveSetMips64R5()
virtual void emitDirectiveSetAt()
virtual void emitDirectiveModuleNoVirt()
virtual void emitDirectiveSetReorder()
void emitRRIII(unsigned Opcode, unsigned Reg0, unsigned Reg1, int16_t Imm0, int16_t Imm1, int16_t Imm2, SMLoc IDLoc, const MCSubtargetInfo *STI)
virtual void emitDirectiveSetNoCRC()
virtual void emitDirectiveModuleNoGINV()
void emitRRI(unsigned Opcode, unsigned Reg0, unsigned Reg1, int16_t Imm, SMLoc IDLoc, const MCSubtargetInfo *STI)
virtual void emitDirectiveSetSoftFloat()
virtual void emitDirectiveSetNoDsp()
void forbidModuleDirective()
virtual void emitDirectiveCpreturn(unsigned SaveLocation, bool SaveLocationIsRegister)
virtual void emitDirectiveSetNoMicroMips()
void emitStoreWithImmOffset(unsigned Opcode, unsigned SrcReg, unsigned BaseReg, int64_t Offset, function_ref< unsigned()> GetATReg, SMLoc IDLoc, const MCSubtargetInfo *STI)
Emit a store instruction with an offset.
virtual void emitDirectiveSetDspr2()
void emitRX(unsigned Opcode, unsigned Reg0, MCOperand Op1, SMLoc IDLoc, const MCSubtargetInfo *STI)
virtual void emitDirectiveNaN2008()
virtual void emitDirectiveSetMips64R2()
virtual void emitDirectiveSetMips3D()
virtual void emitDirectiveEnd(StringRef Name)
virtual void emitDirectiveSetFp(MipsABIFlagsSection::FpABIKind Value)
virtual void emitDirectiveSetCRC()
virtual void emitDirectiveSetMips64R3()
void emitAddu(unsigned DstReg, unsigned SrcReg, unsigned TrgReg, bool Is64Bit, const MCSubtargetInfo *STI)
virtual void emitDirectiveSetNoVirt()
virtual void emitDirectiveSetGINV()
virtual void emitDirectiveSetMacro()
virtual void emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset, const MCSymbol &Sym, bool IsReg)
void emitR(unsigned Opcode, unsigned Reg0, SMLoc IDLoc, const MCSubtargetInfo *STI)
virtual void emitDirectiveSetMips3()
virtual void emitDirectiveSetNoGINV()
virtual void setUsesMicroMips()
virtual void emitDirectiveSetMips32R3()
virtual void emitDirectiveSetMips32R2()
virtual void emitDirectiveEnt(const MCSymbol &Symbol)
virtual void emitDirectiveSetMips1()
virtual void emitDirectiveSetDsp()
virtual void emitDirectiveSetNoMips3D()
virtual void emitDirectiveCpLocal(unsigned RegNo)
virtual void emitDirectiveCpLoad(unsigned RegNo)
virtual void emitDirectiveSetHardFloat()
void emitEmptyDelaySlot(bool hasShortDelaySlot, SMLoc IDLoc, const MCSubtargetInfo *STI)
virtual void emitDirectiveSetNoMips16()
virtual void emitDirectiveSetMips5()
virtual void emitDirectiveSetMips2()
virtual void emitDirectiveSetPush()
virtual void emitDirectiveSetMt()
virtual void emitFrame(unsigned StackReg, unsigned StackSize, unsigned ReturnReg)
virtual void emitDirectiveSetNoOddSPReg()
void emitII(unsigned Opcode, int16_t Imm1, int16_t Imm2, SMLoc IDLoc, const MCSubtargetInfo *STI)
virtual void emitDirectiveSetOddSPReg()
virtual void emitDirectiveSetNoMt()
virtual void emitDirectiveModuleCRC()
virtual void emitDirectiveModuleGINV()
void emitRRX(unsigned Opcode, unsigned Reg0, unsigned Reg1, MCOperand Op2, SMLoc IDLoc, const MCSubtargetInfo *STI)
virtual void emitDirectiveSetNoAt()
virtual void emitDirectiveNaNLegacy()
virtual void emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff)
void emitRR(unsigned Opcode, unsigned Reg0, unsigned Reg1, SMLoc IDLoc, const MCSubtargetInfo *STI)
virtual void emitDirectiveSetPop()
virtual void emitDirectiveSetMicroMips()
void emitRI(unsigned Opcode, unsigned Reg0, int32_t Imm, SMLoc IDLoc, const MCSubtargetInfo *STI)
virtual void emitDirectiveSetMips0()
void emitRRR(unsigned Opcode, unsigned Reg0, unsigned Reg1, unsigned Reg2, SMLoc IDLoc, const MCSubtargetInfo *STI)
virtual void emitDirectiveModuleSoftFloat()
virtual void emitDirectiveSetArch(StringRef Arch)
virtual void emitDirectiveSetAtWithArg(unsigned RegNo)
void emitRRRX(unsigned Opcode, unsigned Reg0, unsigned Reg1, unsigned Reg2, MCOperand Op3, SMLoc IDLoc, const MCSubtargetInfo *STI)
virtual bool emitDirectiveCpRestore(int Offset, function_ref< unsigned()> GetATReg, SMLoc IDLoc, const MCSubtargetInfo *STI)
void emitLoadWithImmOffset(unsigned Opcode, unsigned DstReg, unsigned BaseReg, int64_t Offset, unsigned TmpReg, SMLoc IDLoc, const MCSubtargetInfo *STI)
Emit a load instruction with an immediate offset.
virtual void emitDirectiveModuleNoCRC()
virtual void emitDirectiveSetNoMacro()
const MipsABIInfo & getABI() const
virtual void emitDirectiveModuleOddSPReg()
virtual void emitDirectiveCpAdd(unsigned RegNo)
virtual void emitDirectiveInsn()
virtual void emitDirectiveSetMips64R6()
virtual void emitDirectiveSetNoMsa()
virtual void emitDirectiveSetVirt()
void emitGPRestore(int Offset, SMLoc IDLoc, const MCSubtargetInfo *STI)
Emit the $gp restore operation for .cprestore.
MipsTargetStreamer(MCStreamer &S)
virtual void emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff)
virtual void emitDirectiveModuleVirt()
void emitNop(SMLoc IDLoc, const MCSubtargetInfo *STI)
virtual void emitDirectiveSetNoReorder()
void emitDSLL(unsigned DstReg, unsigned SrcReg, int16_t ShiftAmount, SMLoc IDLoc, const MCSubtargetInfo *STI)
virtual void emitDirectiveSetMips32()
virtual void emitDirectiveOptionPic0()
virtual void emitDirectiveModuleMT()
virtual void emitDirectiveModuleHardFloat()
virtual void emitDirectiveSetMips32R5()
virtual void emitDirectiveSetMsa()
virtual void emitDirectiveSetMips32R6()
virtual void emitDirectiveSetMips4()
virtual void emitDirectiveOptionPic2()
virtual void emitDirectiveSetMips16()
virtual void emitDirectiveSetMips64()
virtual void emitDirectiveAbiCalls()
virtual void emitDirectiveModuleFP()
MipsABIFlagsSection ABIFlagsSection
Represents a location in source code.
StringRef - Represent a constant reference to a string, i.e.
std::string lower() const
ArchType getArch() const
Get the parsed architecture type of this triple.
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
The instances of the Type class are immutable: once they are created, they are never changed.
LLVM Value Representation.
An efficient, type-erasing, non-owning reference to a callable.
This class implements an extremely fast bulk output stream that can only output to a stream.
raw_ostream & write_hex(unsigned long long N)
Output N in hexadecimal, without any prefix or padding.
initializer< Ty > init(const Ty &Val)
This is an optimization pass for GlobalISel generic memory operations.
void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
This struct is a compact representation of a valid (non-zero power of two) alignment.
uint64_t value() const
This is a hole in the type system and should not be abused.
StringRef getFpABIString(FpABIKind Value)