LLVM  14.0.0git
R600Subtarget.h
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1 //=====-- R600Subtarget.h - Define Subtarget for AMDGPU R600 ----*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //==-----------------------------------------------------------------------===//
8 //
9 /// \file
10 /// AMDGPU R600 specific subclass of TargetSubtarget.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_AMDGPU_R600SUBTARGET_H
15 #define LLVM_LIB_TARGET_AMDGPU_R600SUBTARGET_H
16 
17 #include "AMDGPUSubtarget.h"
18 #include "R600FrameLowering.h"
19 #include "R600ISelLowering.h"
20 #include "R600InstrInfo.h"
21 #include "Utils/AMDGPUBaseInfo.h"
23 
24 namespace llvm {
25 
26 class MCInstrInfo;
27 
28 } // namespace llvm
29 
30 #define GET_SUBTARGETINFO_HEADER
31 #include "R600GenSubtargetInfo.inc"
32 
33 namespace llvm {
34 
35 class R600Subtarget final : public R600GenSubtargetInfo,
36  public AMDGPUSubtarget {
37 private:
38  R600InstrInfo InstrInfo;
39  R600FrameLowering FrameLowering;
40  bool FMA;
41  bool CaymanISA;
42  bool CFALUBug;
43  bool HasVertexCache;
44  bool R600ALUInst;
45  bool FP64;
46  short TexVTXClauseSize;
47  Generation Gen;
48  R600TargetLowering TLInfo;
49  InstrItineraryData InstrItins;
51 
52 public:
53  R600Subtarget(const Triple &TT, StringRef CPU, StringRef FS,
54  const TargetMachine &TM);
55 
56  const R600InstrInfo *getInstrInfo() const override { return &InstrInfo; }
57 
58  const R600FrameLowering *getFrameLowering() const override {
59  return &FrameLowering;
60  }
61 
62  const R600TargetLowering *getTargetLowering() const override {
63  return &TLInfo;
64  }
65 
66  const R600RegisterInfo *getRegisterInfo() const override {
67  return &InstrInfo.getRegisterInfo();
68  }
69 
70  const InstrItineraryData *getInstrItineraryData() const override {
71  return &InstrItins;
72  }
73 
74  // Nothing implemented, just prevent crashes on use.
75  const SelectionDAGTargetInfo *getSelectionDAGInfo() const override {
76  return &TSInfo;
77  }
78 
80 
82  return Gen;
83  }
84 
85  Align getStackAlignment() const { return Align(4); }
86 
88  StringRef GPU, StringRef FS);
89 
90  bool hasBFE() const {
91  return (getGeneration() >= EVERGREEN);
92  }
93 
94  bool hasBFI() const {
95  return (getGeneration() >= EVERGREEN);
96  }
97 
98  bool hasBCNT(unsigned Size) const {
99  if (Size == 32)
100  return (getGeneration() >= EVERGREEN);
101 
102  return false;
103  }
104 
105  bool hasBORROW() const {
106  return (getGeneration() >= EVERGREEN);
107  }
108 
109  bool hasCARRY() const {
110  return (getGeneration() >= EVERGREEN);
111  }
112 
113  bool hasCaymanISA() const {
114  return CaymanISA;
115  }
116 
117  bool hasFFBL() const {
118  return (getGeneration() >= EVERGREEN);
119  }
120 
121  bool hasFFBH() const {
122  return (getGeneration() >= EVERGREEN);
123  }
124 
125  bool hasFMA() const { return FMA; }
126 
127  bool hasCFAluBug() const { return CFALUBug; }
128 
129  bool hasVertexCache() const { return HasVertexCache; }
130 
131  short getTexVTXClauseSize() const { return TexVTXClauseSize; }
132 
133  bool enableMachineScheduler() const override {
134  return true;
135  }
136 
137  bool enableSubRegLiveness() const override {
138  return true;
139  }
140 
141  /// \returns Maximum number of work groups per compute unit supported by the
142  /// subtarget and limited by given \p FlatWorkGroupSize.
143  unsigned getMaxWorkGroupsPerCU(unsigned FlatWorkGroupSize) const override {
144  return AMDGPU::IsaInfo::getMaxWorkGroupsPerCU(this, FlatWorkGroupSize);
145  }
146 
147  /// \returns Minimum flat work group size supported by the subtarget.
148  unsigned getMinFlatWorkGroupSize() const override {
150  }
151 
152  /// \returns Maximum flat work group size supported by the subtarget.
153  unsigned getMaxFlatWorkGroupSize() const override {
155  }
156 
157  /// \returns Number of waves per execution unit required to support the given
158  /// \p FlatWorkGroupSize.
159  unsigned
160  getWavesPerEUForWorkGroup(unsigned FlatWorkGroupSize) const override {
161  return AMDGPU::IsaInfo::getWavesPerEUForWorkGroup(this, FlatWorkGroupSize);
162  }
163 
164  /// \returns Minimum number of waves per execution unit supported by the
165  /// subtarget.
166  unsigned getMinWavesPerEU() const override {
168  }
169 };
170 
171 } // end namespace llvm
172 
173 #endif // LLVM_LIB_TARGET_AMDGPU_R600SUBTARGET_H
llvm::Check::Size
@ Size
Definition: FileCheck.h:73
llvm
This file implements support for optimizing divisions by a constant.
Definition: AllocatorList.h:23
llvm::R600Subtarget::getSelectionDAGInfo
const SelectionDAGTargetInfo * getSelectionDAGInfo() const override
Definition: R600Subtarget.h:75
llvm::R600Subtarget::initializeSubtargetDependencies
R600Subtarget & initializeSubtargetDependencies(const Triple &TT, StringRef GPU, StringRef FS)
Definition: R600Subtarget.cpp:35
llvm::R600FrameLowering
Definition: R600FrameLowering.h:16
llvm::R600Subtarget::R600Subtarget
R600Subtarget(const Triple &TT, StringRef CPU, StringRef FS, const TargetMachine &TM)
Definition: R600Subtarget.cpp:25
llvm::R600Subtarget::getInstrInfo
const R600InstrInfo * getInstrInfo() const override
Definition: R600Subtarget.h:56
llvm::R600Subtarget::getStackAlignment
Align getStackAlignment() const
Definition: R600Subtarget.h:85
llvm::R600Subtarget::getMaxFlatWorkGroupSize
unsigned getMaxFlatWorkGroupSize() const override
Definition: R600Subtarget.h:153
llvm::Triple
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:45
llvm::R600Subtarget::hasBCNT
bool hasBCNT(unsigned Size) const
Definition: R600Subtarget.h:98
llvm::AMDGPU::IsaInfo::getMinWavesPerEU
unsigned getMinWavesPerEU(const MCSubtargetInfo *STI)
Definition: AMDGPUBaseInfo.cpp:559
llvm::R600Subtarget::hasCARRY
bool hasCARRY() const
Definition: R600Subtarget.h:109
llvm::R600Subtarget::getMaxWorkGroupsPerCU
unsigned getMaxWorkGroupsPerCU(unsigned FlatWorkGroupSize) const override
Definition: R600Subtarget.h:143
llvm::R600Subtarget::enableMachineScheduler
bool enableMachineScheduler() const override
Definition: R600Subtarget.h:133
llvm::R600Subtarget::hasFFBL
bool hasFFBL() const
Definition: R600Subtarget.h:117
R600FrameLowering.h
R600ISelLowering.h
llvm::AMDGPU::IsaInfo::getMaxWorkGroupsPerCU
unsigned getMaxWorkGroupsPerCU(const MCSubtargetInfo *STI, unsigned FlatWorkGroupSize)
Definition: AMDGPUBaseInfo.cpp:547
llvm::R600RegisterInfo
Definition: R600RegisterInfo.h:22
llvm::R600Subtarget::hasCaymanISA
bool hasCaymanISA() const
Definition: R600Subtarget.h:113
llvm::R600Subtarget::hasBFE
bool hasBFE() const
Definition: R600Subtarget.h:90
llvm::R600Subtarget::hasFMA
bool hasFMA() const
Definition: R600Subtarget.h:125
AMDGPUSubtarget.h
llvm::R600Subtarget::getInstrItineraryData
const InstrItineraryData * getInstrItineraryData() const override
Definition: R600Subtarget.h:70
llvm::SelectionDAGTargetInfo
Targets can subclass this to parameterize the SelectionDAG lowering and instruction selection process...
Definition: SelectionDAGTargetInfo.h:31
llvm::AMDGPU::IsaInfo::getMinFlatWorkGroupSize
unsigned getMinFlatWorkGroupSize(const MCSubtargetInfo *STI)
Definition: AMDGPUBaseInfo.cpp:578
R600InstrInfo.h
llvm::R600Subtarget::getTexVTXClauseSize
short getTexVTXClauseSize() const
Definition: R600Subtarget.h:131
Align
uint64_t Align
Definition: ELFObjHandler.cpp:83
llvm::Align
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:39
llvm::R600Subtarget::getMinWavesPerEU
unsigned getMinWavesPerEU() const override
Definition: R600Subtarget.h:166
llvm::R600TargetLowering
Definition: R600ISelLowering.h:25
llvm::R600Subtarget
Definition: R600Subtarget.h:35
llvm::AMDGPUSubtarget
Definition: AMDGPUSubtarget.h:29
llvm::R600Subtarget::hasBORROW
bool hasBORROW() const
Definition: R600Subtarget.h:105
llvm::R600Subtarget::hasCFAluBug
bool hasCFAluBug() const
Definition: R600Subtarget.h:127
llvm::R600Subtarget::hasBFI
bool hasBFI() const
Definition: R600Subtarget.h:94
llvm::R600Subtarget::getGeneration
Generation getGeneration() const
Definition: R600Subtarget.h:81
llvm::R600Subtarget::hasFFBH
bool hasFFBH() const
Definition: R600Subtarget.h:121
llvm::TargetMachine
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:79
llvm::R600InstrInfo::getRegisterInfo
const R600RegisterInfo & getRegisterInfo() const
Definition: R600InstrInfo.h:71
llvm::R600Subtarget::getFrameLowering
const R600FrameLowering * getFrameLowering() const override
Definition: R600Subtarget.h:58
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:58
llvm::AMDGPU::IsaInfo::getMaxFlatWorkGroupSize
unsigned getMaxFlatWorkGroupSize(const MCSubtargetInfo *STI)
Definition: AMDGPUBaseInfo.cpp:582
llvm::R600Subtarget::getMinFlatWorkGroupSize
unsigned getMinFlatWorkGroupSize() const override
Definition: R600Subtarget.h:148
llvm::R600Subtarget::getTargetLowering
const R600TargetLowering * getTargetLowering() const override
Definition: R600Subtarget.h:62
llvm::R600Subtarget::getWavesPerEUForWorkGroup
unsigned getWavesPerEUForWorkGroup(unsigned FlatWorkGroupSize) const override
Definition: R600Subtarget.h:160
llvm::X86AS::FS
@ FS
Definition: X86.h:188
llvm::R600Subtarget::getRegisterInfo
const R600RegisterInfo * getRegisterInfo() const override
Definition: R600Subtarget.h:66
llvm::R600InstrInfo
Definition: R600InstrInfo.h:39
R600GenSubtargetInfo
SelectionDAGTargetInfo.h
llvm::AMDGPU::IsaInfo::getWavesPerEUForWorkGroup
unsigned getWavesPerEUForWorkGroup(const MCSubtargetInfo *STI, unsigned FlatWorkGroupSize)
Definition: AMDGPUBaseInfo.cpp:572
llvm::R600Subtarget::enableSubRegLiveness
bool enableSubRegLiveness() const override
Definition: R600Subtarget.h:137
TM
const char LLVMTargetMachineRef TM
Definition: PassBuilderBindings.cpp:47
llvm::AMDGPUSubtarget::Generation
Generation
Definition: AMDGPUSubtarget.h:31
llvm::R600Subtarget::ParseSubtargetFeatures
void ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS)
llvm::InstrItineraryData
Itinerary data supplied by a subtarget to be used by a target.
Definition: MCInstrItineraries.h:109
llvm::R600Subtarget::hasVertexCache
bool hasVertexCache() const
Definition: R600Subtarget.h:129
llvm::AMDGPUSubtarget::EVERGREEN
@ EVERGREEN
Definition: AMDGPUSubtarget.h:35
AMDGPUBaseInfo.h