LLVM  14.0.0git
Classes | Enumerations | Functions
llvm::AMDGPU::IsaInfo Namespace Reference

Classes

class  AMDGPUTargetID
 

Enumerations

enum  { FIXED_NUM_SGPRS_FOR_INIT_BUG = 96, TRAP_NUM_SGPRS = 16 }
 
enum  TargetIDSetting { TargetIDSetting::Unsupported, TargetIDSetting::Any, TargetIDSetting::Off, TargetIDSetting::On }
 

Functions

static TargetIDSetting getTargetIDSettingFromFeatureString (StringRef FeatureString)
 
unsigned getWavefrontSize (const MCSubtargetInfo *STI)
 
unsigned getLocalMemorySize (const MCSubtargetInfo *STI)
 
unsigned getEUsPerCU (const MCSubtargetInfo *STI)
 
unsigned getMaxWorkGroupsPerCU (const MCSubtargetInfo *STI, unsigned FlatWorkGroupSize)
 
unsigned getMinWavesPerEU (const MCSubtargetInfo *STI)
 
unsigned getMaxWavesPerEU (const MCSubtargetInfo *STI)
 
unsigned getWavesPerEUForWorkGroup (const MCSubtargetInfo *STI, unsigned FlatWorkGroupSize)
 
unsigned getMinFlatWorkGroupSize (const MCSubtargetInfo *STI)
 
unsigned getMaxFlatWorkGroupSize (const MCSubtargetInfo *STI)
 
unsigned getWavesPerWorkGroup (const MCSubtargetInfo *STI, unsigned FlatWorkGroupSize)
 
unsigned getSGPRAllocGranule (const MCSubtargetInfo *STI)
 
unsigned getSGPREncodingGranule (const MCSubtargetInfo *STI)
 
unsigned getTotalNumSGPRs (const MCSubtargetInfo *STI)
 
unsigned getAddressableNumSGPRs (const MCSubtargetInfo *STI)
 
unsigned getMinNumSGPRs (const MCSubtargetInfo *STI, unsigned WavesPerEU)
 
unsigned getMaxNumSGPRs (const MCSubtargetInfo *STI, unsigned WavesPerEU, bool Addressable)
 
unsigned getNumExtraSGPRs (const MCSubtargetInfo *STI, bool VCCUsed, bool FlatScrUsed, bool XNACKUsed)
 
unsigned getNumExtraSGPRs (const MCSubtargetInfo *STI, bool VCCUsed, bool FlatScrUsed)
 
unsigned getNumSGPRBlocks (const MCSubtargetInfo *STI, unsigned NumSGPRs)
 
unsigned getVGPRAllocGranule (const MCSubtargetInfo *STI, Optional< bool > EnableWavefrontSize32)
 
unsigned getVGPREncodingGranule (const MCSubtargetInfo *STI, Optional< bool > EnableWavefrontSize32)
 
unsigned getTotalNumVGPRs (const MCSubtargetInfo *STI)
 
unsigned getAddressableNumVGPRs (const MCSubtargetInfo *STI)
 
unsigned getMinNumVGPRs (const MCSubtargetInfo *STI, unsigned WavesPerEU)
 
unsigned getMaxNumVGPRs (const MCSubtargetInfo *STI, unsigned WavesPerEU)
 
unsigned getNumVGPRBlocks (const MCSubtargetInfo *STI, unsigned NumVGPRs, Optional< bool > EnableWavefrontSize32)
 

Enumeration Type Documentation

◆ anonymous enum

anonymous enum
Enumerator
FIXED_NUM_SGPRS_FOR_INIT_BUG 
TRAP_NUM_SGPRS 

Definition at line 71 of file AMDGPUBaseInfo.h.

◆ TargetIDSetting

Enumerator
Unsupported 
Any 
Off 
On 

Definition at line 78 of file AMDGPUBaseInfo.h.

Function Documentation

◆ getAddressableNumSGPRs()

unsigned llvm::AMDGPU::IsaInfo::getAddressableNumSGPRs ( const MCSubtargetInfo STI)

◆ getAddressableNumVGPRs()

unsigned llvm::AMDGPU::IsaInfo::getAddressableNumVGPRs ( const MCSubtargetInfo STI)
Returns
Addressable number of VGPRs for given subtarget STI.

Definition at line 728 of file AMDGPUBaseInfo.cpp.

References llvm::MCSubtargetInfo::getFeatureBits(), and llvm::FeatureBitset::test().

Referenced by llvm::GCNSubtarget::getAddressableNumVGPRs(), getMaxNumVGPRs(), and getMinNumVGPRs().

◆ getEUsPerCU()

unsigned llvm::AMDGPU::IsaInfo::getEUsPerCU ( const MCSubtargetInfo STI)
Returns
Number of execution units per compute unit for given subtarget STI.

Definition at line 535 of file AMDGPUBaseInfo.cpp.

References llvm::MCSubtargetInfo::getFeatureBits(), llvm::AMDGPU::isGFX10Plus(), and llvm::FeatureBitset::test().

Referenced by getWavesPerEUForWorkGroup().

◆ getLocalMemorySize()

unsigned llvm::AMDGPU::IsaInfo::getLocalMemorySize ( const MCSubtargetInfo STI)
Returns
Local memory size in bytes for given subtarget STI.

Definition at line 526 of file AMDGPUBaseInfo.cpp.

References llvm::MCSubtargetInfo::getFeatureBits(), and llvm::FeatureBitset::test().

Referenced by llvm::SITargetLowering::computeKnownBitsForTargetInstr().

◆ getMaxFlatWorkGroupSize()

unsigned llvm::AMDGPU::IsaInfo::getMaxFlatWorkGroupSize ( const MCSubtargetInfo STI)
Returns
Maximum flat work group size for given subtarget STI.

Definition at line 581 of file AMDGPUBaseInfo.cpp.

Referenced by llvm::R600Subtarget::getMaxFlatWorkGroupSize(), and llvm::GCNSubtarget::getMaxFlatWorkGroupSize().

◆ getMaxNumSGPRs()

unsigned llvm::AMDGPU::IsaInfo::getMaxNumSGPRs ( const MCSubtargetInfo STI,
unsigned  WavesPerEU,
bool  Addressable 
)

◆ getMaxNumVGPRs()

unsigned llvm::AMDGPU::IsaInfo::getMaxNumVGPRs ( const MCSubtargetInfo STI,
unsigned  WavesPerEU 
)
Returns
Maximum number of VGPRs that meets given number of waves per execution unit requirement for given subtarget STI.

Definition at line 745 of file AMDGPUBaseInfo.cpp.

References llvm::alignDown(), assert(), getAddressableNumVGPRs(), getTotalNumVGPRs(), getVGPRAllocGranule(), and llvm::min().

Referenced by llvm::GCNSubtarget::getMaxNumVGPRs().

◆ getMaxWavesPerEU()

unsigned llvm::AMDGPU::IsaInfo::getMaxWavesPerEU ( const MCSubtargetInfo STI)
Returns
Maximum number of waves per execution unit for given subtarget STI without any kind of limitation.

Definition at line 562 of file AMDGPUBaseInfo.cpp.

References llvm::AMDGPU::hasGFX10_3Insts(), llvm::AMDGPU::isGFX10Plus(), and llvm::AMDGPU::isGFX90A().

Referenced by llvm::GCNSubtarget::GCNSubtarget(), getMinNumSGPRs(), and getMinNumVGPRs().

◆ getMaxWorkGroupsPerCU()

unsigned llvm::AMDGPU::IsaInfo::getMaxWorkGroupsPerCU ( const MCSubtargetInfo STI,
unsigned  FlatWorkGroupSize 
)
Returns
Maximum number of work groups per compute unit for given subtarget STI and limited by given FlatWorkGroupSize.

Definition at line 546 of file AMDGPUBaseInfo.cpp.

References llvm::Triple::amdgcn, assert(), llvm::Triple::getArch(), llvm::MCSubtargetInfo::getTargetTriple(), getWavesPerWorkGroup(), llvm::min(), and N.

Referenced by llvm::R600Subtarget::getMaxWorkGroupsPerCU(), and llvm::GCNSubtarget::getMaxWorkGroupsPerCU().

◆ getMinFlatWorkGroupSize()

unsigned llvm::AMDGPU::IsaInfo::getMinFlatWorkGroupSize ( const MCSubtargetInfo STI)
Returns
Minimum flat work group size for given subtarget STI.

Definition at line 577 of file AMDGPUBaseInfo.cpp.

Referenced by llvm::R600Subtarget::getMinFlatWorkGroupSize(), and llvm::GCNSubtarget::getMinFlatWorkGroupSize().

◆ getMinNumSGPRs()

unsigned llvm::AMDGPU::IsaInfo::getMinNumSGPRs ( const MCSubtargetInfo STI,
unsigned  WavesPerEU 
)

◆ getMinNumVGPRs()

unsigned llvm::AMDGPU::IsaInfo::getMinNumVGPRs ( const MCSubtargetInfo STI,
unsigned  WavesPerEU 
)
Returns
Minimum number of VGPRs that meets given number of waves per execution unit requirement for given subtarget STI.

Definition at line 734 of file AMDGPUBaseInfo.cpp.

References llvm::alignDown(), assert(), getAddressableNumVGPRs(), getMaxWavesPerEU(), getTotalNumVGPRs(), getVGPRAllocGranule(), and llvm::min().

Referenced by llvm::GCNSubtarget::getMinNumVGPRs().

◆ getMinWavesPerEU()

unsigned llvm::AMDGPU::IsaInfo::getMinWavesPerEU ( const MCSubtargetInfo STI)
Returns
Minimum number of waves per execution unit for given subtarget STI.

Definition at line 558 of file AMDGPUBaseInfo.cpp.

Referenced by llvm::R600Subtarget::getMinWavesPerEU(), and llvm::GCNSubtarget::getMinWavesPerEU().

◆ getNumExtraSGPRs() [1/2]

unsigned llvm::AMDGPU::IsaInfo::getNumExtraSGPRs ( const MCSubtargetInfo STI,
bool  VCCUsed,
bool  FlatScrUsed 
)
Returns
Number of extra SGPRs implicitly required by given subtarget STI when the given special registers are used. XNACK is inferred from STI.

Definition at line 681 of file AMDGPUBaseInfo.cpp.

References llvm::MCSubtargetInfo::getFeatureBits(), getNumExtraSGPRs(), and llvm::FeatureBitset::test().

◆ getNumExtraSGPRs() [2/2]

unsigned llvm::AMDGPU::IsaInfo::getNumExtraSGPRs ( const MCSubtargetInfo STI,
bool  VCCUsed,
bool  FlatScrUsed,
bool  XNACKUsed 
)
Returns
Number of extra SGPRs implicitly required by given subtarget STI when the given special registers are used.

Definition at line 657 of file AMDGPUBaseInfo.cpp.

References llvm::MCSubtargetInfo::getCPU(), llvm::AMDGPU::getIsaVersion(), and llvm::IndexedInstrProf::Version.

Referenced by llvm::AMDGPUAsmPrinter::emitFunctionBodyEnd(), getNumExtraSGPRs(), and llvm::AMDGPUResourceUsageAnalysis::SIFunctionResourceInfo::getTotalNumSGPRs().

◆ getNumSGPRBlocks()

unsigned llvm::AMDGPU::IsaInfo::getNumSGPRBlocks ( const MCSubtargetInfo STI,
unsigned  NumSGPRs 
)
Returns
Number of SGPR blocks needed for given subtarget STI when NumSGPRs are used. NumSGPRs should already include any special register counts.

Definition at line 687 of file AMDGPUBaseInfo.cpp.

References llvm::alignTo(), getSGPREncodingGranule(), llvm::max(), and llvm::AMDGPU::HSAMD::Kernel::CodeProps::Key::NumSGPRs.

◆ getNumVGPRBlocks()

unsigned llvm::AMDGPU::IsaInfo::getNumVGPRBlocks ( const MCSubtargetInfo STI,
unsigned  NumSGPRs,
Optional< bool >  EnableWavefrontSize32 = None 
)
Returns
Number of VGPR blocks needed for given subtarget STI when NumVGPRs are used.

For subtargets which support it, EnableWavefrontSize32 should match the ENABLE_WAVEFRONT_SIZE32 kernel descriptor field.

Definition at line 754 of file AMDGPUBaseInfo.cpp.

References llvm::alignTo(), getVGPREncodingGranule(), llvm::max(), and llvm::AMDGPU::HSAMD::Kernel::CodeProps::Key::NumVGPRs.

◆ getSGPRAllocGranule()

unsigned llvm::AMDGPU::IsaInfo::getSGPRAllocGranule ( const MCSubtargetInfo STI)

◆ getSGPREncodingGranule()

unsigned llvm::AMDGPU::IsaInfo::getSGPREncodingGranule ( const MCSubtargetInfo STI)
Returns
SGPR encoding granularity for given subtarget STI.

Definition at line 600 of file AMDGPUBaseInfo.cpp.

Referenced by llvm::AMDGPUDisassembler::decodeCOMPUTE_PGM_RSRC1(), getNumSGPRBlocks(), and llvm::GCNSubtarget::getSGPREncodingGranule().

◆ getTargetIDSettingFromFeatureString()

static TargetIDSetting llvm::AMDGPU::IsaInfo::getTargetIDSettingFromFeatureString ( StringRef  FeatureString)
static

◆ getTotalNumSGPRs()

unsigned llvm::AMDGPU::IsaInfo::getTotalNumSGPRs ( const MCSubtargetInfo STI)
Returns
Total number of SGPRs for given subtarget STI.

Definition at line 604 of file AMDGPUBaseInfo.cpp.

References llvm::MCSubtargetInfo::getCPU(), llvm::AMDGPU::getIsaVersion(), and llvm::IndexedInstrProf::Version.

Referenced by getMaxNumSGPRs(), getMinNumSGPRs(), and llvm::GCNSubtarget::getTotalNumSGPRs().

◆ getTotalNumVGPRs()

unsigned llvm::AMDGPU::IsaInfo::getTotalNumVGPRs ( const MCSubtargetInfo STI)
Returns
Total number of VGPRs for given subtarget STI.

Definition at line 720 of file AMDGPUBaseInfo.cpp.

References llvm::MCSubtargetInfo::getFeatureBits(), llvm::AMDGPU::isGFX10Plus(), and llvm::FeatureBitset::test().

Referenced by getMaxNumVGPRs(), getMinNumVGPRs(), and llvm::GCNSubtarget::getTotalNumVGPRs().

◆ getVGPRAllocGranule()

unsigned llvm::AMDGPU::IsaInfo::getVGPRAllocGranule ( const MCSubtargetInfo STI,
Optional< bool >  EnableWavefrontSize32 = None 
)
Returns
VGPR allocation granularity for given subtarget STI.

For subtargets which support it, EnableWavefrontSize32 should match the ENABLE_WAVEFRONT_SIZE32 kernel descriptor field.

Definition at line 693 of file AMDGPUBaseInfo.cpp.

References llvm::MCSubtargetInfo::getFeatureBits(), llvm::AMDGPU::hasGFX10_3Insts(), and llvm::FeatureBitset::test().

Referenced by getMaxNumVGPRs(), getMinNumVGPRs(), and llvm::GCNSubtarget::getVGPRAllocGranule().

◆ getVGPREncodingGranule()

unsigned llvm::AMDGPU::IsaInfo::getVGPREncodingGranule ( const MCSubtargetInfo STI,
Optional< bool >  EnableWavefrontSize32 = None 
)
Returns
VGPR encoding granularity for given subtarget STI.

For subtargets which support it, EnableWavefrontSize32 should match the ENABLE_WAVEFRONT_SIZE32 kernel descriptor field.

Definition at line 708 of file AMDGPUBaseInfo.cpp.

References llvm::MCSubtargetInfo::getFeatureBits(), and llvm::FeatureBitset::test().

Referenced by llvm::AMDGPUDisassembler::decodeCOMPUTE_PGM_RSRC1(), getNumVGPRBlocks(), and llvm::GCNSubtarget::getVGPREncodingGranule().

◆ getWavefrontSize()

unsigned llvm::AMDGPU::IsaInfo::getWavefrontSize ( const MCSubtargetInfo STI)
Returns
Wavefront size for given subtarget STI.

Definition at line 517 of file AMDGPUBaseInfo.cpp.

References llvm::MCSubtargetInfo::getFeatureBits(), and llvm::FeatureBitset::test().

Referenced by getWavesPerWorkGroup().

◆ getWavesPerEUForWorkGroup()

unsigned llvm::AMDGPU::IsaInfo::getWavesPerEUForWorkGroup ( const MCSubtargetInfo STI,
unsigned  FlatWorkGroupSize 
)
Returns
Number of waves per execution unit required to support the given FlatWorkGroupSize.

Definition at line 571 of file AMDGPUBaseInfo.cpp.

References llvm::divideCeil(), getEUsPerCU(), and getWavesPerWorkGroup().

Referenced by llvm::R600Subtarget::getWavesPerEUForWorkGroup(), and llvm::GCNSubtarget::getWavesPerEUForWorkGroup().

◆ getWavesPerWorkGroup()

unsigned llvm::AMDGPU::IsaInfo::getWavesPerWorkGroup ( const MCSubtargetInfo STI,
unsigned  FlatWorkGroupSize 
)
Returns
Number of waves per work group for given subtarget STI and FlatWorkGroupSize.

Definition at line 586 of file AMDGPUBaseInfo.cpp.

References llvm::divideCeil(), and getWavefrontSize().

Referenced by getMaxWorkGroupsPerCU(), and getWavesPerEUForWorkGroup().