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LLVM 23.0.0git
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Classes | |
| class | AMDGPUTargetID |
Enumerations | |
| enum | { FIXED_NUM_SGPRS_FOR_INIT_BUG = 96 , TRAP_NUM_SGPRS = 16 } |
| enum class | TargetIDSetting { Unsupported , Any , Off , On } |
Variables | |
| static constexpr unsigned | MaxDynamicVGPRBlocks = 8 |
| Maximum number of VGPR blocks that can be allocated in dynamic VGPR mode. | |
| anonymous enum |
| Enumerator | |
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| FIXED_NUM_SGPRS_FOR_INIT_BUG | |
| TRAP_NUM_SGPRS | |
Definition at line 147 of file AMDGPUBaseInfo.h.
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strong |
| Enumerator | |
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| Unsupported | |
| Any | |
| Off | |
| On | |
Definition at line 154 of file AMDGPUBaseInfo.h.
| unsigned llvm::AMDGPU::IsaInfo::getAddressableLocalMemorySize | ( | const MCSubtargetInfo & | STI | ) |
STI. Definition at line 1265 of file AMDGPUBaseInfo.cpp.
References llvm::MCSubtargetInfo::getFeatureBits(), and llvm::FeatureBitset::test().
Referenced by getLocalMemorySize().
| unsigned llvm::AMDGPU::IsaInfo::getAddressableNumArchVGPRs | ( | const MCSubtargetInfo & | STI | ) |
STI. Definition at line 1521 of file AMDGPUBaseInfo.cpp.
References llvm::MCSubtargetInfo::getFeatureBits(), and llvm::FeatureBitset::test().
Referenced by llvm::GCNSubtarget::getAddressableNumArchVGPRs(), and getAddressableNumVGPRs().
| unsigned llvm::AMDGPU::IsaInfo::getAddressableNumSGPRs | ( | const MCSubtargetInfo & | STI | ) |
STI. Definition at line 1358 of file AMDGPUBaseInfo.cpp.
References FIXED_NUM_SGPRS_FOR_INIT_BUG, llvm::MCSubtargetInfo::getCPU(), llvm::MCSubtargetInfo::getFeatureBits(), llvm::AMDGPU::getIsaVersion(), llvm::FeatureBitset::test(), and llvm::Version.
Referenced by llvm::GCNSubtarget::getAddressableNumSGPRs(), getMaxNumSGPRs(), getMinNumSGPRs(), and getSGPRAllocGranule().
| unsigned llvm::AMDGPU::IsaInfo::getAddressableNumVGPRs | ( | const MCSubtargetInfo & | STI, |
| unsigned | DynamicVGPRBlockSize ) |
STI. Definition at line 1528 of file AMDGPUBaseInfo.cpp.
References getAddressableNumArchVGPRs(), llvm::MCSubtargetInfo::getFeatureBits(), getVGPRAllocGranule(), and MaxDynamicVGPRBlocks.
Referenced by llvm::GCNSubtarget::getAddressableNumVGPRs(), getMaxNumVGPRs(), getMinNumVGPRs(), and llvm::GCNSchedStrategy::initialize().
| unsigned llvm::AMDGPU::IsaInfo::getAllocatedNumVGPRBlocks | ( | const MCSubtargetInfo & | STI, |
| unsigned | NumVGPRs, | ||
| unsigned | DynamicVGPRBlockSize, | ||
| std::optional< bool > | EnableWavefrontSize32 = std::nullopt ) |
STI when NumVGPRs are used. Definition at line 1638 of file AMDGPUBaseInfo.cpp.
References getGranulatedNumRegisterBlocks(), and getVGPRAllocGranule().
Referenced by llvm::GCNSchedStage::shouldRevertScheduling().
| unsigned llvm::AMDGPU::IsaInfo::getArchVGPRAllocGranule | ( | ) |
For subtargets with a unified VGPR file and mixed ArchVGPR/AGPR usage, returns the allocation granule for ArchVGPRs.
Definition at line 1508 of file AMDGPUBaseInfo.cpp.
Referenced by llvm::GCNRegPressure::getUnifiedVGPRNum().
| unsigned llvm::AMDGPU::IsaInfo::getEncodedNumVGPRBlocks | ( | const MCSubtargetInfo & | STI, |
| unsigned | NumVGPRs, | ||
| std::optional< bool > | EnableWavefrontSize32 = std::nullopt ) |
STI when NumVGPRs are used. We actually return the number of blocks -1, since that's what we encode.For subtargets which support it, EnableWavefrontSize32 should match the ENABLE_WAVEFRONT_SIZE32 kernel descriptor field.
Definition at line 1631 of file AMDGPUBaseInfo.cpp.
References getGranulatedNumRegisterBlocks(), and getVGPREncodingGranule().
| unsigned llvm::AMDGPU::IsaInfo::getEUsPerCU | ( | const MCSubtargetInfo & | STI | ) |
STI. Definition at line 1277 of file AMDGPUBaseInfo.cpp.
References assert(), llvm::MCSubtargetInfo::getFeatureBits(), llvm::AMDGPU::isGFX10Plus(), llvm::AMDGPU::isGFX1250(), and llvm::FeatureBitset::test().
Referenced by llvm::GCNSubtarget::GCNSubtarget(), getMaxWorkGroupsPerCU(), and getWavesPerEUForWorkGroup().
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static |
Definition at line 1460 of file AMDGPUBaseInfo.cpp.
References llvm::divideCeil().
Referenced by getAllocatedNumVGPRBlocks(), getEncodedNumVGPRBlocks(), and getNumSGPRBlocks().
| unsigned llvm::AMDGPU::IsaInfo::getInstCacheLineSize | ( | const MCSubtargetInfo & | STI | ) |
STI. Definition at line 1236 of file AMDGPUBaseInfo.cpp.
References llvm::MCSubtargetInfo::getFeatureBits(), and llvm::FeatureBitset::test().
| unsigned llvm::AMDGPU::IsaInfo::getLocalMemorySize | ( | const MCSubtargetInfo & | STI | ) |
STI. Definition at line 1253 of file AMDGPUBaseInfo.cpp.
References getAddressableLocalMemorySize(), llvm::MCSubtargetInfo::getFeatureBits(), llvm::AMDGPU::isGFX10Plus(), and llvm::FeatureBitset::test().
Referenced by llvm::GCNSubtarget::initializeSubtargetDependencies().
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constexpr |
Definition at line 274 of file AMDGPUBaseInfo.h.
Referenced by annotateGroupSizeLoadWithRangeMD(), llvm::GCNSubtarget::getMaxFlatWorkGroupSize(), and llvm::R600Subtarget::getMaxFlatWorkGroupSize().
| unsigned llvm::AMDGPU::IsaInfo::getMaxNumSGPRs | ( | const MCSubtargetInfo & | STI, |
| unsigned | WavesPerEU, | ||
| bool | Addressable ) |
STI. Definition at line 1407 of file AMDGPUBaseInfo.cpp.
References assert(), getAddressableNumSGPRs(), llvm::MCSubtargetInfo::getCPU(), llvm::AMDGPU::getIsaVersion(), getSGPRAllocGranule(), getSGPRBudgetPerWave(), getSGPRTrapHandlerReserve(), getTotalNumSGPRs(), and llvm::Version.
Referenced by llvm::GCNSubtarget::getMaxNumSGPRs().
| unsigned llvm::AMDGPU::IsaInfo::getMaxNumVGPRs | ( | const MCSubtargetInfo & | STI, |
| unsigned | WavesPerEU, | ||
| unsigned | DynamicVGPRBlockSize ) |
STI. Definition at line 1615 of file AMDGPUBaseInfo.cpp.
References llvm::alignDown(), assert(), getAddressableNumVGPRs(), getTotalNumVGPRs(), and getVGPRAllocGranule().
Referenced by llvm::GCNSubtarget::getMaxNumVGPRs().
| unsigned llvm::AMDGPU::IsaInfo::getMaxWavesPerEU | ( | const MCSubtargetInfo & | STI | ) |
STI without any kind of limitation. Definition at line 1318 of file AMDGPUBaseInfo.cpp.
References llvm::AMDGPU::hasGFX10_3Insts(), llvm::AMDGPU::isGFX10Plus(), and llvm::AMDGPU::isGFX90A().
Referenced by createOccupancy(), llvm::GCNSubtarget::GCNSubtarget(), getMaxWorkGroupsPerCU(), getMinNumSGPRs(), getMinNumVGPRs(), getNumWavesPerEUWithNumVGPRs(), and getOccupancyWithNumSGPRs().
| unsigned llvm::AMDGPU::IsaInfo::getMaxWorkGroupsPerCU | ( | const MCSubtargetInfo & | STI, |
| unsigned | FlatWorkGroupSize ) |
STI and limited by given FlatWorkGroupSize. Definition at line 1297 of file AMDGPUBaseInfo.cpp.
References assert(), getEUsPerCU(), llvm::MCSubtargetInfo::getFeatureBits(), getMaxWavesPerEU(), llvm::MCSubtargetInfo::getTargetTriple(), getWavesPerWorkGroup(), llvm::Triple::isAMDGCN(), llvm::AMDGPU::isGFX10Plus(), N, and llvm::FeatureBitset::test().
Referenced by llvm::GCNSubtarget::getMaxWorkGroupsPerCU(), and llvm::R600Subtarget::getMaxWorkGroupsPerCU().
| unsigned llvm::AMDGPU::IsaInfo::getMinFlatWorkGroupSize | ( | const MCSubtargetInfo & | STI | ) |
STI. Definition at line 1333 of file AMDGPUBaseInfo.cpp.
Referenced by llvm::GCNSubtarget::getMinFlatWorkGroupSize(), and llvm::R600Subtarget::getMinFlatWorkGroupSize().
| unsigned llvm::AMDGPU::IsaInfo::getMinNumSGPRs | ( | const MCSubtargetInfo & | STI, |
| unsigned | WavesPerEU ) |
STI. Definition at line 1389 of file AMDGPUBaseInfo.cpp.
References assert(), getAddressableNumSGPRs(), llvm::MCSubtargetInfo::getCPU(), llvm::AMDGPU::getIsaVersion(), getMaxWavesPerEU(), getSGPRAllocGranule(), getSGPRBudgetPerWave(), getSGPRTrapHandlerReserve(), getTotalNumSGPRs(), and llvm::Version.
Referenced by llvm::GCNSubtarget::getMinNumSGPRs().
| unsigned llvm::AMDGPU::IsaInfo::getMinNumVGPRs | ( | const MCSubtargetInfo & | STI, |
| unsigned | WavesPerEU, | ||
| unsigned | DynamicVGPRBlockSize ) |
STI. Definition at line 1580 of file AMDGPUBaseInfo.cpp.
References llvm::alignDown(), assert(), getAddressableNumVGPRs(), getMaxWavesPerEU(), getMinNumVGPRs(), getNumWavesPerEUWithNumVGPRs(), getTotalNumVGPRs(), and getVGPRAllocGranule().
Referenced by getMinNumVGPRs(), and llvm::GCNSubtarget::getMinNumVGPRs().
| unsigned llvm::AMDGPU::IsaInfo::getMinWavesPerEU | ( | const MCSubtargetInfo & | STI | ) |
STI. Definition at line 1316 of file AMDGPUBaseInfo.cpp.
Referenced by llvm::GCNSubtarget::getMinWavesPerEU(), and llvm::R600Subtarget::getMinWavesPerEU().
| unsigned llvm::AMDGPU::IsaInfo::getNumExtraSGPRs | ( | const MCSubtargetInfo & | STI, |
| bool | VCCUsed, | ||
| bool | FlatScrUsed ) |
STI when the given special registers are used. XNACK is inferred from STI. Definition at line 1454 of file AMDGPUBaseInfo.cpp.
References llvm::MCSubtargetInfo::getFeatureBits(), getNumExtraSGPRs(), and llvm::FeatureBitset::test().
| unsigned llvm::AMDGPU::IsaInfo::getNumExtraSGPRs | ( | const MCSubtargetInfo & | STI, |
| bool | VCCUsed, | ||
| bool | FlatScrUsed, | ||
| bool | XNACKUsed ) |
STI when the given special registers are used. Definition at line 1429 of file AMDGPUBaseInfo.cpp.
References llvm::MCSubtargetInfo::getCPU(), llvm::MCSubtargetInfo::getFeatureBits(), llvm::AMDGPU::getIsaVersion(), llvm::FeatureBitset::test(), and llvm::Version.
Referenced by getNumExtraSGPRs().
| unsigned llvm::AMDGPU::IsaInfo::getNumSGPRBlocks | ( | const MCSubtargetInfo & | STI, |
| unsigned | NumSGPRs ) |
STI when NumSGPRs are used. NumSGPRs should already include any special register counts. Definition at line 1465 of file AMDGPUBaseInfo.cpp.
References getGranulatedNumRegisterBlocks(), and getSGPREncodingGranule().
| unsigned llvm::AMDGPU::IsaInfo::getNumWavesPerEUWithNumVGPRs | ( | const MCSubtargetInfo & | STI, |
| unsigned | NumVGPRs, | ||
| unsigned | DynamicVGPRBlockSize ) |
NumVGPRs usage for given subtarget STI. Definition at line 1542 of file AMDGPUBaseInfo.cpp.
References getMaxWavesPerEU(), getNumWavesPerEUWithNumVGPRs(), getTotalNumVGPRs(), and getVGPRAllocGranule().
Referenced by getMinNumVGPRs(), getNumWavesPerEUWithNumVGPRs(), and llvm::GCNSubtarget::getOccupancyWithNumVGPRs().
| unsigned llvm::AMDGPU::IsaInfo::getNumWavesPerEUWithNumVGPRs | ( | unsigned | NumVGPRs, |
| unsigned | Granule, | ||
| unsigned | MaxWaves, | ||
| unsigned | TotalNumVGPRs ) |
NumVGPRs usage, Granule size, MaxWaves possible, and TotalNumVGPRs available. Definition at line 1550 of file AMDGPUBaseInfo.cpp.
References llvm::alignTo().
| unsigned llvm::AMDGPU::IsaInfo::getOccupancyWithNumSGPRs | ( | const MCSubtargetInfo & | STI, |
| unsigned | SGPRs ) |
STI: the inverse of getMaxNumSGPRs(). Unlike getMaxNumSGPRs() the budget is not clamped to the addressable count, since the allocated count callers pass in can exceed it. Definition at line 1569 of file AMDGPUBaseInfo.cpp.
References getMaxWavesPerEU(), getOccupancyWithNumSGPRs(), getSGPRAllocGranule(), getSGPRTrapHandlerReserve(), getTotalNumSGPRs(), and isSGPROccupancyLimited().
| unsigned llvm::AMDGPU::IsaInfo::getOccupancyWithNumSGPRs | ( | unsigned | SGPRs, |
| unsigned | MaxWaves, | ||
| unsigned | TotalNumSGPRs, | ||
| unsigned | Granule, | ||
| unsigned | TrapReserve ) |
MaxWaves, TotalNumSGPRs, Granule, TrapReserve). Subtarget-free core shared by the overload above and the occupancy MCExpr. Callers must check isSGPROccupancyLimited() first. Definition at line 1559 of file AMDGPUBaseInfo.cpp.
References llvm::alignTo().
Referenced by getOccupancyWithNumSGPRs(), and llvm::GCNSubtarget::getOccupancyWithNumSGPRs().
| unsigned llvm::AMDGPU::IsaInfo::getSGPRAllocGranule | ( | const MCSubtargetInfo & | STI | ) |
STI. Definition at line 1340 of file AMDGPUBaseInfo.cpp.
References getAddressableNumSGPRs(), llvm::MCSubtargetInfo::getCPU(), llvm::AMDGPU::getIsaVersion(), and llvm::Version.
Referenced by createOccupancy(), getMaxNumSGPRs(), getMinNumSGPRs(), getOccupancyWithNumSGPRs(), and llvm::GCNSubtarget::getSGPRAllocGranule().
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static |
Definition at line 1380 of file AMDGPUBaseInfo.cpp.
References llvm::alignDown(), and assert().
Referenced by getMaxNumSGPRs(), and getMinNumSGPRs().
| unsigned llvm::AMDGPU::IsaInfo::getSGPREncodingGranule | ( | const MCSubtargetInfo & | STI | ) |
STI. Definition at line 1349 of file AMDGPUBaseInfo.cpp.
Referenced by llvm::AMDGPUDisassembler::decodeCOMPUTE_PGM_RSRC1(), getNumSGPRBlocks(), and llvm::GCNSubtarget::getSGPREncodingGranule().
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static |
Definition at line 1371 of file AMDGPUBaseInfo.cpp.
References llvm::MCSubtargetInfo::getFeatureBits(), llvm::FeatureBitset::test(), and TRAP_NUM_SGPRS.
Referenced by getMaxNumSGPRs(), getMinNumSGPRs(), and getOccupancyWithNumSGPRs().
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static |
Definition at line 1172 of file AMDGPUBaseInfo.cpp.
References llvm::StringRef::ends_with(), llvm_unreachable, Off, and On.
Referenced by llvm::AMDGPU::IsaInfo::AMDGPUTargetID::setTargetIDFromTargetIDStream().
| unsigned llvm::AMDGPU::IsaInfo::getTotalNumSGPRs | ( | const MCSubtargetInfo & | STI | ) |
STI. Definition at line 1351 of file AMDGPUBaseInfo.cpp.
References llvm::MCSubtargetInfo::getCPU(), llvm::AMDGPU::getIsaVersion(), and llvm::Version.
Referenced by createOccupancy(), getMaxNumSGPRs(), getMinNumSGPRs(), getOccupancyWithNumSGPRs(), and llvm::GCNSubtarget::getTotalNumSGPRs().
| unsigned llvm::AMDGPU::IsaInfo::getTotalNumVGPRs | ( | const MCSubtargetInfo & | STI | ) |
STI. Definition at line 1510 of file AMDGPUBaseInfo.cpp.
References llvm::MCSubtargetInfo::getFeatureBits(), llvm::AMDGPU::isGFX10Plus(), and llvm::FeatureBitset::test().
Referenced by createOccupancy(), getMaxNumVGPRs(), getMinNumVGPRs(), getNumWavesPerEUWithNumVGPRs(), and llvm::GCNSubtarget::getTotalNumVGPRs().
| unsigned llvm::AMDGPU::IsaInfo::getVGPRAllocGranule | ( | const MCSubtargetInfo & | STI, |
| unsigned | DynamicVGPRBlockSize, | ||
| std::optional< bool > | EnableWavefrontSize32 = std::nullopt ) |
STI.For subtargets which support it, EnableWavefrontSize32 should match the ENABLE_WAVEFRONT_SIZE32 kernel descriptor field.
Definition at line 1471 of file AMDGPUBaseInfo.cpp.
References llvm::MCSubtargetInfo::getFeatureBits(), llvm::AMDGPU::hasGFX10_3Insts(), and llvm::FeatureBitset::test().
Referenced by createOccupancy(), llvm::SIFrameLowering::emitEntryFunctionPrologue(), getAddressableNumVGPRs(), getAllocatedNumVGPRBlocks(), getMaxNumVGPRs(), getMinNumVGPRs(), getNumWavesPerEUWithNumVGPRs(), llvm::GCNSubtarget::getVGPRAllocGranule(), and llvm::GCNSchedStrategy::initialize().
| unsigned llvm::AMDGPU::IsaInfo::getVGPREncodingGranule | ( | const MCSubtargetInfo & | STI, |
| std::optional< bool > | EnableWavefrontSize32 = std::nullopt ) |
STI.For subtargets which support it, EnableWavefrontSize32 should match the ENABLE_WAVEFRONT_SIZE32 kernel descriptor field.
Definition at line 1493 of file AMDGPUBaseInfo.cpp.
References llvm::MCSubtargetInfo::getFeatureBits(), and llvm::FeatureBitset::test().
Referenced by llvm::AMDGPUDisassembler::decodeCOMPUTE_PGM_RSRC1(), getEncodedNumVGPRBlocks(), and llvm::GCNSubtarget::getVGPREncodingGranule().
| unsigned llvm::AMDGPU::IsaInfo::getWavefrontSize | ( | const MCSubtargetInfo & | STI | ) |
STI. Definition at line 1244 of file AMDGPUBaseInfo.cpp.
References llvm::MCSubtargetInfo::getFeatureBits(), and llvm::FeatureBitset::test().
Referenced by getWavesPerWorkGroup().
| unsigned llvm::AMDGPU::IsaInfo::getWavesPerEUForWorkGroup | ( | const MCSubtargetInfo & | STI, |
| unsigned | FlatWorkGroupSize ) |
FlatWorkGroupSize. Definition at line 1327 of file AMDGPUBaseInfo.cpp.
References llvm::divideCeil(), getEUsPerCU(), and getWavesPerWorkGroup().
Referenced by llvm::GCNSubtarget::getWavesPerEUForWorkGroup(), and llvm::R600Subtarget::getWavesPerEUForWorkGroup().
| unsigned llvm::AMDGPU::IsaInfo::getWavesPerWorkGroup | ( | const MCSubtargetInfo & | STI, |
| unsigned | FlatWorkGroupSize ) |
STI and FlatWorkGroupSize. Definition at line 1335 of file AMDGPUBaseInfo.cpp.
References llvm::divideCeil(), and getWavefrontSize().
Referenced by getMaxWorkGroupsPerCU(), and getWavesPerEUForWorkGroup().
| bool llvm::AMDGPU::IsaInfo::isSGPROccupancyLimited | ( | const MCSubtargetInfo & | STI | ) |
STI (true pre-GFX10). One named capability so callers don't test the version. Definition at line 1423 of file AMDGPUBaseInfo.cpp.
References llvm::MCSubtargetInfo::getCPU(), llvm::AMDGPU::getIsaVersion(), and llvm::AMDGPU::IsaVersion::Major.
Referenced by createOccupancy(), and getOccupancyWithNumSGPRs().
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inline |
Definition at line 229 of file AMDGPUBaseInfo.h.
References llvm::AMDGPU::IsaInfo::AMDGPUTargetID::print().
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staticconstexpr |
Maximum number of VGPR blocks that can be allocated in dynamic VGPR mode.
Definition at line 345 of file AMDGPUBaseInfo.h.
Referenced by getAddressableNumVGPRs().