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14 #ifndef LLVM_LIB_TARGET_AMDGPU_R600ISELLOWERING_H
15 #define LLVM_LIB_TARGET_AMDGPU_R600ISELLOWERING_H
47 EVT VT)
const override;
53 EVT VT,
unsigned AS,
Align Alignment,
55 bool *IsFast =
nullptr)
const override;
58 bool LegalOperations)
const override {
73 unsigned DwordOffset)
const;
99 unsigned mainop,
unsigned ovf)
const;
103 void getStackAddress(
unsigned StackWidth,
unsigned ElemIdx,
104 unsigned &Channel,
unsigned &PtrIncr)
const;
109 bool FoldOperand(
SDNode *ParentNode,
unsigned SrcIdx,
SDValue &Src,
bool isTruncStoreLegal(EVT ValVT, EVT MemVT) const
Return true if the specified store with truncation is legal on this target.
This is an optimization pass for GlobalISel generic memory operations.
Wrapper class for IR location info (IR ordering and DebugLoc) to be passed into SDNode creation funct...
A parsed version of the target data layout string in and methods for querying it.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
An SDNode that represents everything that will be needed to construct a MachineInstr.
Represents one node in the SelectionDAG.
This class is used to represent ISD::LOAD nodes.
Function Alias Analysis Results
SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl< ISD::InputArg > &Ins, const SDLoc &DL, SelectionDAG &DAG, SmallVectorImpl< SDValue > &InVals) const override
XXX Only kernel functions are supported, so we can assume for now that every function is a kernel fun...
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
CCAssignFn * CCAssignFnForCall(CallingConv::ID CC, bool IsVarArg) const
bool canMergeStoresTo(unsigned AS, EVT MemVT, const MachineFunction &MF) const override
Returns if it's reasonable to merge stores to MemVT size.
bool allowsMisalignedMemoryAccesses(EVT VT, unsigned AS, Align Alignment, MachineMemOperand::Flags Flags=MachineMemOperand::MONone, bool *IsFast=nullptr) const override
Determine if the target supports unaligned memory accesses.
This struct is a compact representation of a valid (non-zero power of two) alignment.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
bool CCAssignFn(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State)
CCAssignFn - This function assigns a location for Val, updating State to reflect the change.
Representation of each machine instruction.
This is an important class for using LLVM in a threaded context.
Flags
Flags values. These may be or'd together.
This class is used to represent ISD::STORE nodes.
Primary interface to the complete machine description for the target machine.
const R600Subtarget * getSubtarget() const
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
unsigned const MachineRegisterInfo * MRI
SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override
This callback is invoked for operations that are unsupported by the target, which are registered to u...
SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override
This method will be invoked for all target nodes and for any target-independent nodes that the target...
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
EVT getSetCCResultType(const DataLayout &DL, LLVMContext &, EVT VT) const override
Return the ValueType of the result of SETCC operations.
void ReplaceNodeResults(SDNode *N, SmallVectorImpl< SDValue > &Results, SelectionDAG &DAG) const override
This callback is invoked when a node result type is illegal for the target, and the operation was reg...
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
const char LLVMTargetMachineRef TM
Common register allocation spilling lr str ldr sxth r3 ldr mla r4 can lr mov lr str ldr sxth r3 mla r4 and then merge mul and lr str ldr sxth r3 mla r4 It also increase the likelihood the store may become dead bb27 Successors according to LLVM BB
MachineBasicBlock * EmitInstrWithCustomInserter(MachineInstr &MI, MachineBasicBlock *BB) const override
This method should be implemented by targets that mark instructions with the 'usesCustomInserter' fla...
R600TargetLowering(const TargetMachine &TM, const R600Subtarget &STI)
virtual bool canCombineTruncStore(EVT ValVT, EVT MemVT, bool LegalOperations) const override