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14 #ifndef LLVM_LIB_TARGET_SPIRV_SPIRVMODULEANALYSIS_H
15 #define LLVM_LIB_TARGET_SPIRV_SPIRVMODULEANALYSIS_H
24 class MachineFunction;
25 class MachineModuleInfo;
45 std::map<const MachineFunction *, LocalToGlobalRegTable>;
75 return FuncReg->second;
124 void setBaseInfo(
const Module &
M);
125 template <
typename T>
void collectTypesConstsVars();
126 void processDefInstrs(
const Module &
M);
128 void processOtherInstrs(
const Module &
M);
129 void numberRegistersGlobally(
const Module &
M);
137 #endif // LLVM_LIB_TARGET_SPIRV_SPIRVMODULEANALYSIS_H
void setRegisterAlias(const MachineFunction *MF, Register Reg, Register AliasReg)
This is an optimization pass for GlobalISel generic memory operations.
We currently emits eax Perhaps this is what we really should generate is Is imull three or four cycles eax eax The current instruction priority is based on pattern complexity The former is more complex because it folds a load so the latter will not be emitted Perhaps we should use AddedComplexity to give LEA32r a higher priority We should always try to match LEA first since the LEA matching code does some estimate to determine whether the match is profitable if we care more about code then imull is better It s two bytes shorter than movl leal On a Pentium M
ModulePass class - This class is used to implement unstructured interprocedural optimizations and ana...
Reg
All possible values of the reg field in the ModR/M byte.
const_iterator end(StringRef path)
Get end iterator over path.
std::map< Register, Register > LocalToGlobalRegTable
static Register index2VirtReg(unsigned Index)
Convert a 0-based index to a virtual register number.
InstrList & getMSInstrs(unsigned MSType)
void setSkipEmission(MachineInstr *MI)
SPIRV::AddressingModel Addr
Itanium Name Demangler i e convert the string _Z1fv into f()". You can also use the CRTP base ManglingParser to perform some simple analysis on the mangled name
Represent the analysis usage information of a pass.
static struct SPIRV::ModuleAnalysisInfo MAI
const HexagonInstrInfo * TII
This class contains meta information specific to a module.
RegisterAliasMapTy RegisterAliasTable
@ MB_DebugModuleProcessed
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
bool getSkipEmission(const MachineInstr *MI)
StringMap - This is an unconventional map that is specialized for handling keys that are "strings",...
bool hasRegisterAlias(const MachineFunction *MF, Register Reg)
Implements a dense probed hash-table based set.
Register getFuncReg(std::string FuncName)
Representation of each machine instruction.
SmallVector< MachineInstr *, 4 > GlobalVarList
StringMap< Register > FuncNameMap
InstrList MS[NUM_MODULE_SECTIONS]
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
A Module instance is used to store all the information related to an LLVM module.
bool hasMBBRegister(const MachineBasicBlock &MBB)
SPIRV::SourceLanguage SrcLang
Register getRegisterAlias(const MachineFunction *MF, Register Reg)
Wrapper class representing virtual and physical registers.
DenseMap< int, Register > BBNumToRegMap
bool runOnModule(Module &M) override
runOnModule - Virtual method overriden by subclasses to process the module being operated on.
DenseSet< MachineInstr * > InstrsToDelete
std::map< const MachineFunction *, LocalToGlobalRegTable > RegisterAliasMapTy
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - This function should be overriden by passes that need analysis information to do t...
Register getOrCreateMBBRegister(const MachineBasicBlock &MBB)