LLVM  15.0.0git
SPIRVModuleAnalysis.h
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1 //===- SPIRVModuleAnalysis.h - analysis of global instrs & regs -*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // The analysis collects instructions that should be output at the module level
10 // and performs the global register numbering.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_SPIRV_SPIRVMODULEANALYSIS_H
15 #define LLVM_LIB_TARGET_SPIRV_SPIRVMODULEANALYSIS_H
16 
18 #include "SPIRVSubtarget.h"
19 #include "llvm/ADT/DenseMap.h"
20 #include "llvm/ADT/SmallVector.h"
21 #include "llvm/ADT/StringMap.h"
22 
23 namespace llvm {
24 class MachineFunction;
25 class MachineModuleInfo;
26 
27 namespace SPIRV {
28 // The enum contains logical module sections for the instruction collection.
30  // MB_Capabilities, MB_Extensions, MB_ExtInstImports, MB_MemoryModel,
31  MB_EntryPoints, // All OpEntryPoint instructions (if any).
32  // MB_ExecutionModes, MB_DebugSourceAndStrings,
33  MB_DebugNames, // All OpName and OpMemberName intrs.
34  MB_DebugModuleProcessed, // All OpModuleProcessed instructions.
35  MB_Annotations, // OpDecorate, OpMemberDecorate etc.
36  MB_TypeConstVars, // OpTypeXXX, OpConstantXXX, and global OpVariables.
37  MB_ExtFuncDecls, // OpFunction etc. to declare for external funcs.
38  NUM_MODULE_SECTIONS // Total number of sections requiring basic blocks.
39 };
40 
42 // Maps a local register to the corresponding global alias.
43 using LocalToGlobalRegTable = std::map<Register, Register>;
44 using RegisterAliasMapTy =
45  std::map<const MachineFunction *, LocalToGlobalRegTable>;
46 
47 // The struct contains results of the module analysis and methods
48 // to access them.
53  unsigned SrcLangVersion;
54  // Contains the list of all global OpVariables in the module.
56  // Maps function names to coresponding function ID registers.
58  // The set contains machine instructions which are necessary
59  // for correct MIR but will not be emitted in function bodies.
61  // The table contains global aliases of local registers for each machine
62  // function. The aliases are used to substitute local registers during
63  // code emission.
65  // The counter holds the maximum ID we have in the module.
66  unsigned MaxID;
67  // The array contains lists of MIs for each module section.
69  // The table maps MBB number to SPIR-V unique ID register.
71 
72  Register getFuncReg(std::string FuncName) {
73  auto FuncReg = FuncNameMap.find(FuncName);
74  assert(FuncReg != FuncNameMap.end() && "Cannot find function Id");
75  return FuncReg->second;
76  }
77  InstrList &getMSInstrs(unsigned MSType) { return MS[MSType]; }
80  return InstrsToDelete.contains(MI);
81  }
83  Register AliasReg) {
84  RegisterAliasTable[MF][Reg] = AliasReg;
85  }
87  auto RI = RegisterAliasTable[MF].find(Reg);
88  if (RI == RegisterAliasTable[MF].end()) {
89  return Register(0);
90  }
91  return RegisterAliasTable[MF][Reg];
92  }
94  return RegisterAliasTable.find(MF) != RegisterAliasTable.end() &&
95  RegisterAliasTable[MF].find(Reg) != RegisterAliasTable[MF].end();
96  }
97  unsigned getNextID() { return MaxID++; }
99  return BBNumToRegMap.find(MBB.getNumber()) != BBNumToRegMap.end();
100  }
101  // Convert MBB's number to corresponding ID register.
103  auto f = BBNumToRegMap.find(MBB.getNumber());
104  if (f != BBNumToRegMap.end())
105  return f->second;
107  BBNumToRegMap[MBB.getNumber()] = NewReg;
108  return NewReg;
109  }
110 };
111 } // namespace SPIRV
112 
114  static char ID;
115 
116 public:
118 
119  bool runOnModule(Module &M) override;
120  void getAnalysisUsage(AnalysisUsage &AU) const override;
122 
123 private:
124  void setBaseInfo(const Module &M);
125  template <typename T> void collectTypesConstsVars();
126  void processDefInstrs(const Module &M);
127  void collectFuncNames(MachineInstr &MI, const Function &F);
128  void processOtherInstrs(const Module &M);
129  void numberRegistersGlobally(const Module &M);
130 
131  const SPIRVSubtarget *ST;
133  const SPIRVInstrInfo *TII;
134  MachineModuleInfo *MMI;
135 };
136 } // namespace llvm
137 #endif // LLVM_LIB_TARGET_SPIRV_SPIRVMODULEANALYSIS_H
llvm::SPIRV::ModuleAnalysisInfo::setRegisterAlias
void setRegisterAlias(const MachineFunction *MF, Register Reg, Register AliasReg)
Definition: SPIRVModuleAnalysis.h:82
llvm::SPIRV::ModuleSectionType
ModuleSectionType
Definition: SPIRVModuleAnalysis.h:29
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:104
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:17
M
We currently emits eax Perhaps this is what we really should generate is Is imull three or four cycles eax eax The current instruction priority is based on pattern complexity The former is more complex because it folds a load so the latter will not be emitted Perhaps we should use AddedComplexity to give LEA32r a higher priority We should always try to match LEA first since the LEA matching code does some estimate to determine whether the match is profitable if we care more about code then imull is better It s two bytes shorter than movl leal On a Pentium M
Definition: README.txt:252
llvm::ModulePass
ModulePass class - This class is used to implement unstructured interprocedural optimizations and ana...
Definition: Pass.h:248
llvm::SPIRV::MB_TypeConstVars
@ MB_TypeConstVars
Definition: SPIRVModuleAnalysis.h:36
llvm::Function
Definition: Function.h:60
llvm::SPIRV::NUM_MODULE_SECTIONS
@ NUM_MODULE_SECTIONS
Definition: SPIRVModuleAnalysis.h:38
llvm::SmallVector< MachineInstr * >
llvm::SPIRV::ModuleAnalysisInfo::Mem
SPIRV::MemoryModel Mem
Definition: SPIRVModuleAnalysis.h:50
llvm::X86Disassembler::Reg
Reg
All possible values of the reg field in the ModR/M byte.
Definition: X86DisassemblerDecoder.h:462
DenseMap.h
llvm::sys::path::end
const_iterator end(StringRef path)
Get end iterator over path.
Definition: Path.cpp:235
llvm::SPIRVSubtarget
Definition: SPIRVSubtarget.h:36
llvm::SPIRV::LocalToGlobalRegTable
std::map< Register, Register > LocalToGlobalRegTable
Definition: SPIRVModuleAnalysis.h:43
llvm::SPIRV::ModuleAnalysisInfo::MaxID
unsigned MaxID
Definition: SPIRVModuleAnalysis.h:66
llvm::Register::index2VirtReg
static Register index2VirtReg(unsigned Index)
Convert a 0-based index to a virtual register number.
Definition: Register.h:84
llvm::SPIRV::ModuleAnalysisInfo
Definition: SPIRVModuleAnalysis.h:49
SPIRVSubtarget.h
llvm::SPIRV::ModuleAnalysisInfo::getMSInstrs
InstrList & getMSInstrs(unsigned MSType)
Definition: SPIRVModuleAnalysis.h:77
F
#define F(x, y, z)
Definition: MD5.cpp:55
llvm::SPIRV::ModuleAnalysisInfo::setSkipEmission
void setSkipEmission(MachineInstr *MI)
Definition: SPIRVModuleAnalysis.h:78
llvm::SPIRV::ModuleAnalysisInfo::Addr
SPIRV::AddressingModel Addr
Definition: SPIRVModuleAnalysis.h:51
f
Itanium Name Demangler i e convert the string _Z1fv into f()". You can also use the CRTP base ManglingParser to perform some simple analysis on the mangled name
SPIRVBaseInfo.h
llvm::AnalysisUsage
Represent the analysis usage information of a pass.
Definition: PassAnalysisSupport.h:47
llvm::SPIRVModuleAnalysis::MAI
static struct SPIRV::ModuleAnalysisInfo MAI
Definition: SPIRVModuleAnalysis.h:121
llvm::SPIRV::ModuleAnalysisInfo::getNextID
unsigned getNextID()
Definition: SPIRVModuleAnalysis.h:97
TII
const HexagonInstrInfo * TII
Definition: HexagonCopyToCombine.cpp:125
llvm::MachineModuleInfo
This class contains meta information specific to a module.
Definition: MachineModuleInfo.h:75
llvm::SPIRV::ModuleAnalysisInfo::SrcLangVersion
unsigned SrcLangVersion
Definition: SPIRVModuleAnalysis.h:53
llvm::SPIRV::MB_Annotations
@ MB_Annotations
Definition: SPIRVModuleAnalysis.h:35
StringMap.h
llvm::SPIRV::ModuleAnalysisInfo::RegisterAliasTable
RegisterAliasMapTy RegisterAliasTable
Definition: SPIRVModuleAnalysis.h:64
llvm::SPIRV::MB_DebugModuleProcessed
@ MB_DebugModuleProcessed
Definition: SPIRVModuleAnalysis.h:34
llvm::CallingConv::ID
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
llvm::SPIRV::ModuleAnalysisInfo::getSkipEmission
bool getSkipEmission(const MachineInstr *MI)
Definition: SPIRVModuleAnalysis.h:79
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:94
llvm::StringMap
StringMap - This is an unconventional map that is specialized for handling keys that are "strings",...
Definition: StringMap.h:110
llvm::SPIRV::MB_ExtFuncDecls
@ MB_ExtFuncDecls
Definition: SPIRVModuleAnalysis.h:37
llvm::SPIRV::ModuleAnalysisInfo::hasRegisterAlias
bool hasRegisterAlias(const MachineFunction *MF, Register Reg)
Definition: SPIRVModuleAnalysis.h:93
llvm::DenseSet
Implements a dense probed hash-table based set.
Definition: DenseSet.h:268
llvm::SPIRV::ModuleAnalysisInfo::getFuncReg
Register getFuncReg(std::string FuncName)
Definition: SPIRVModuleAnalysis.h:72
llvm::SPIRVModuleAnalysis::ID
static char ID
Definition: SPIRVModuleAnalysis.h:114
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:66
llvm::ARM_MB::ST
@ ST
Definition: ARMBaseInfo.h:73
llvm::SPIRV::ModuleAnalysisInfo::GlobalVarList
SmallVector< MachineInstr *, 4 > GlobalVarList
Definition: SPIRVModuleAnalysis.h:55
llvm::SPIRV::AddressingModel
AddressingModel
Definition: SPIRVBaseInfo.h:167
llvm::DenseMap
Definition: DenseMap.h:716
llvm::SPIRV::ModuleAnalysisInfo::FuncNameMap
StringMap< Register > FuncNameMap
Definition: SPIRVModuleAnalysis.h:57
llvm::SPIRV::ModuleAnalysisInfo::MS
InstrList MS[NUM_MODULE_SECTIONS]
Definition: SPIRVModuleAnalysis.h:68
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::SPIRV::MB_DebugNames
@ MB_DebugNames
Definition: SPIRVModuleAnalysis.h:33
llvm::SPIRVGlobalRegistry
Definition: SPIRVGlobalRegistry.h:26
llvm::Module
A Module instance is used to store all the information related to an LLVM module.
Definition: Module.h:65
llvm::SPIRV::ModuleAnalysisInfo::hasMBBRegister
bool hasMBBRegister(const MachineBasicBlock &MBB)
Definition: SPIRVModuleAnalysis.h:98
llvm::MachineFunction
Definition: MachineFunction.h:257
llvm::SPIRVInstrInfo
Definition: SPIRVInstrInfo.h:24
llvm::SPIRV::MemoryModel
MemoryModel
Definition: SPIRVBaseInfo.h:194
llvm::SPIRV::ModuleAnalysisInfo::SrcLang
SPIRV::SourceLanguage SrcLang
Definition: SPIRVModuleAnalysis.h:52
llvm::SPIRVModuleAnalysis
Definition: SPIRVModuleAnalysis.h:113
llvm::SPIRV::ModuleAnalysisInfo::getRegisterAlias
Register getRegisterAlias(const MachineFunction *MF, Register Reg)
Definition: SPIRVModuleAnalysis.h:86
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
MBB
MachineBasicBlock & MBB
Definition: AArch64SLSHardening.cpp:74
llvm::SPIRVModuleAnalysis::SPIRVModuleAnalysis
SPIRVModuleAnalysis()
Definition: SPIRVModuleAnalysis.h:117
llvm::SPIRV::ModuleAnalysisInfo::BBNumToRegMap
DenseMap< int, Register > BBNumToRegMap
Definition: SPIRVModuleAnalysis.h:70
llvm::SPIRV::MB_EntryPoints
@ MB_EntryPoints
Definition: SPIRVModuleAnalysis.h:31
SmallVector.h
llvm::SPIRVModuleAnalysis::runOnModule
bool runOnModule(Module &M) override
runOnModule - Virtual method overriden by subclasses to process the module being operated on.
Definition: SPIRVModuleAnalysis.cpp:229
llvm::SPIRV::ModuleAnalysisInfo::InstrsToDelete
DenseSet< MachineInstr * > InstrsToDelete
Definition: SPIRVModuleAnalysis.h:60
llvm::SPIRV::RegisterAliasMapTy
std::map< const MachineFunction *, LocalToGlobalRegTable > RegisterAliasMapTy
Definition: SPIRVModuleAnalysis.h:45
llvm::SPIRV::SourceLanguage
SourceLanguage
Definition: SPIRVBaseInfo.h:157
llvm::SPIRVModuleAnalysis::getAnalysisUsage
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - This function should be overriden by passes that need analysis information to do t...
Definition: SPIRVModuleAnalysis.cpp:224
llvm::SPIRV::ModuleAnalysisInfo::getOrCreateMBBRegister
Register getOrCreateMBBRegister(const MachineBasicBlock &MBB)
Definition: SPIRVModuleAnalysis.h:102