LLVM 19.0.0git
SPIRVGlobalRegistry.h
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1//===-- SPIRVGlobalRegistry.h - SPIR-V Global Registry ----------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// SPIRVGlobalRegistry is used to maintain rich type information required for
10// SPIR-V even after lowering from LLVM IR to GMIR. It can convert an llvm::Type
11// into an OpTypeXXX instruction, and map it to a virtual register. Also it
12// builds and supports consistency of constants and global variables.
13//
14//===----------------------------------------------------------------------===//
15
16#ifndef LLVM_LIB_TARGET_SPIRV_SPIRVTYPEMANAGER_H
17#define LLVM_LIB_TARGET_SPIRV_SPIRVTYPEMANAGER_H
18
21#include "SPIRVInstrInfo.h"
23#include "llvm/IR/Constant.h"
25
26namespace llvm {
27class SPIRVSubtarget;
28using SPIRVType = const MachineInstr;
29
31 // Registers holding values which have types associated with them.
32 // Initialized upon VReg definition in IRTranslator.
33 // Do not confuse this with DuplicatesTracker as DT maps Type* to <MF, Reg>
34 // where Reg = OpType...
35 // while VRegToTypeMap tracks SPIR-V type assigned to other regs (i.e. not
36 // type-declaring ones).
38 VRegToTypeMap;
39
40 // Map LLVM Type* to <MF, Reg>
42
44
45 // map a Function to its definition (as a machine instruction operand)
48 // map function pointer (as a machine instruction operand) to the used
49 // Function
51 // Maps Functions to their calls (in a form of the machine instruction,
52 // OpFunctionCall) that happened before the definition is available
54
55 // Look for an equivalent of the newType in the map. Return the equivalent
56 // if it's found, otherwise insert newType to the map and return the type.
57 const MachineInstr *checkSpecialInstr(const SPIRV::SpecialTypeDescriptor &TD,
58 MachineIRBuilder &MIRBuilder);
59
60 SmallPtrSet<const Type *, 4> TypesInProcessing;
61 DenseMap<const Type *, SPIRVType *> ForwardPointerTypes;
62
63 // if a function returns a pointer, this is to map it into TypedPointerType
65
66 // Number of bits pointers and size_t integers require.
67 const unsigned PointerSize;
68
69 // Holds the maximum ID we have in the module.
70 unsigned Bound;
71
72 // Maps values associated with untyped pointers into deduced element types of
73 // untyped pointers.
74 DenseMap<Value *, Type *> DeducedElTys;
75 // Maps composite values to deduced types where untyped pointers are replaced
76 // with typed ones.
77 DenseMap<Value *, Type *> DeducedNestedTys;
78 // Maps values to "assign type" calls, thus being a registry of created
79 // Intrinsic::spv_assign_ptr_type instructions.
80 DenseMap<Value *, CallInst *> AssignPtrTypeInstr;
81
82 // Add a new OpTypeXXX instruction without checking for duplicates.
83 SPIRVType *createSPIRVType(const Type *Type, MachineIRBuilder &MIRBuilder,
84 SPIRV::AccessQualifier::AccessQualifier AQ =
85 SPIRV::AccessQualifier::ReadWrite,
86 bool EmitIR = true);
87 SPIRVType *findSPIRVType(const Type *Ty, MachineIRBuilder &MIRBuilder,
88 SPIRV::AccessQualifier::AccessQualifier accessQual =
89 SPIRV::AccessQualifier::ReadWrite,
90 bool EmitIR = true);
91 SPIRVType *
92 restOfCreateSPIRVType(const Type *Type, MachineIRBuilder &MIRBuilder,
93 SPIRV::AccessQualifier::AccessQualifier AccessQual,
94 bool EmitIR);
95
96public:
97 SPIRVGlobalRegistry(unsigned PointerSize);
98
100
101 void add(const Constant *C, MachineFunction *MF, Register R) {
102 DT.add(C, MF, R);
103 }
104
105 void add(const GlobalVariable *GV, MachineFunction *MF, Register R) {
106 DT.add(GV, MF, R);
107 }
108
109 void add(const Function *F, MachineFunction *MF, Register R) {
110 DT.add(F, MF, R);
111 }
112
113 void add(const Argument *Arg, MachineFunction *MF, Register R) {
114 DT.add(Arg, MF, R);
115 }
116
118 DT.add(MI, MF, R);
119 }
120
122 return DT.find(MI, MF);
123 }
124
126 return DT.find(C, MF);
127 }
128
130 return DT.find(GV, MF);
131 }
132
134 return DT.find(F, MF);
135 }
136
137 void buildDepsGraph(std::vector<SPIRV::DTSortableEntry *> &Graph,
138 MachineModuleInfo *MMI = nullptr) {
139 DT.buildDepsGraph(Graph, MMI);
140 }
141
142 void setBound(unsigned V) { Bound = V; }
143 unsigned getBound() { return Bound; }
144
145 // Add a record to the map of function return pointer types.
146 void addReturnType(const Function *ArgF, TypedPointerType *DerivedTy) {
147 FunResPointerTypes[ArgF] = DerivedTy;
148 }
149 // Find a record in the map of function return pointer types.
151 auto It = FunResPointerTypes.find(ArgF);
152 return It == FunResPointerTypes.end() ? nullptr : It->second;
153 }
154
155 // A registry of "assign type" records:
156 // - Add a record.
157 void addAssignPtrTypeInstr(Value *Val, CallInst *AssignPtrTyCI) {
158 AssignPtrTypeInstr[Val] = AssignPtrTyCI;
159 }
160 // - Find a record.
162 auto It = AssignPtrTypeInstr.find(Val);
163 return It == AssignPtrTypeInstr.end() ? nullptr : It->second;
164 }
165
166 // Deduced element types of untyped pointers and composites:
167 // - Add a record to the map of deduced element types.
168 void addDeducedElementType(Value *Val, Type *Ty) { DeducedElTys[Val] = Ty; }
169 // - Find a record in the map of deduced element types.
171 auto It = DeducedElTys.find(Val);
172 return It == DeducedElTys.end() ? nullptr : It->second;
173 }
174 // - Add a record to the map of deduced composite types.
176 DeducedNestedTys[Val] = Ty;
177 }
178 // - Find a record in the map of deduced composite types.
180 auto It = DeducedNestedTys.find(Val);
181 return It == DeducedNestedTys.end() ? nullptr : It->second;
182 }
183 // - Find a type of the given Global value
185 // we may know element type if it was deduced earlier
186 Type *ElementTy = findDeducedElementType(Global);
187 if (!ElementTy) {
188 // or we may know element type if it's associated with a composite
189 // value
190 if (Value *GlobalElem =
191 Global->getNumOperands() > 0 ? Global->getOperand(0) : nullptr)
192 ElementTy = findDeducedCompositeType(GlobalElem);
193 }
194 return ElementTy ? ElementTy : Global->getValueType();
195 }
196
197 // Map a machine operand that represents a use of a function via function
198 // pointer to a machine operand that represents the function definition.
199 // Return either the register or invalid value, because we have no context for
200 // a good diagnostic message in case of unexpectedly missing references.
202 auto ResF = InstrToFunction.find(Use);
203 if (ResF == InstrToFunction.end())
204 return nullptr;
205 auto ResReg = FunctionToInstr.find(ResF->second);
206 return ResReg == FunctionToInstr.end() ? nullptr : ResReg->second;
207 }
208
209 // Map a Function to a machine instruction that represents the function
210 // definition.
212 if (!F)
213 return nullptr;
214 auto MOIt = FunctionToInstr.find(F);
215 return MOIt == FunctionToInstr.end() ? nullptr : MOIt->second->getParent();
216 }
217
218 // Map a Function to a machine instruction that represents the function
219 // definition.
221 if (!MI)
222 return nullptr;
223 auto FIt = FunctionToInstrRev.find(MI);
224 return FIt == FunctionToInstrRev.end() ? nullptr : FIt->second;
225 }
226
227 // map function pointer (as a machine instruction operand) to the used
228 // Function
230 InstrToFunction[MO] = F;
231 }
232
233 // map a Function to its definition (as a machine instruction)
235 FunctionToInstr[F] = MO;
236 FunctionToInstrRev[MO->getParent()] = F;
237 }
238
239 // Return true if any OpConstantFunctionPointerINTEL were generated
240 bool hasConstFunPtr() { return !InstrToFunction.empty(); }
241
242 // Add a record about forward function call.
244 auto It = ForwardCalls.find(F);
245 if (It == ForwardCalls.end())
246 ForwardCalls[F] = {MI};
247 else
248 It->second.insert(MI);
249 }
250
251 // Map a Function to the vector of machine instructions that represents
252 // forward function calls or to nullptr if not found.
254 auto It = ForwardCalls.find(F);
255 return It == ForwardCalls.end() ? nullptr : &It->second;
256 }
257
258 // Get or create a SPIR-V type corresponding the given LLVM IR type,
259 // and map it to the given VReg by creating an ASSIGN_TYPE instruction.
261 MachineIRBuilder &MIRBuilder,
262 SPIRV::AccessQualifier::AccessQualifier AQ =
263 SPIRV::AccessQualifier::ReadWrite,
264 bool EmitIR = true);
269 SPIRVType *assignVectTypeToVReg(SPIRVType *BaseType, unsigned NumElements,
270 Register VReg, MachineInstr &I,
271 const SPIRVInstrInfo &TII);
272
273 // In cases where the SPIR-V type is already known, this function can be
274 // used to map it to the given VReg via an ASSIGN_TYPE instruction.
276 MachineFunction &MF);
277
278 // Either generate a new OpTypeXXX instruction or return an existing one
279 // corresponding to the given LLVM IR type.
280 // EmitIR controls if we emit GMIR or SPV constants (e.g. for array sizes)
281 // because this method may be called from InstructionSelector and we don't
282 // want to emit extra IR instructions there.
284 MachineIRBuilder &MIRBuilder,
285 SPIRV::AccessQualifier::AccessQualifier AQ =
286 SPIRV::AccessQualifier::ReadWrite,
287 bool EmitIR = true);
288
289 const Type *getTypeForSPIRVType(const SPIRVType *Ty) const {
290 auto Res = SPIRVToLLVMType.find(Ty);
291 assert(Res != SPIRVToLLVMType.end());
292 return Res->second;
293 }
294
295 // Return a pointee's type op code, or 0 otherwise.
296 unsigned getPointeeTypeOp(Register PtrReg);
297
298 // Either generate a new OpTypeXXX instruction or return an existing one
299 // corresponding to the given string containing the name of the builtin type.
300 // Return nullptr if unable to recognize SPIRV type name from `TypeStr`.
302 StringRef TypeStr, MachineIRBuilder &MIRBuilder,
303 SPIRV::StorageClass::StorageClass SC = SPIRV::StorageClass::Function,
304 SPIRV::AccessQualifier::AccessQualifier AQ =
305 SPIRV::AccessQualifier::ReadWrite);
306
307 // Return the SPIR-V type instruction corresponding to the given VReg, or
308 // nullptr if no such type instruction exists. The second argument MF
309 // allows to search for the association in a context of the machine functions
310 // than the current one, without switching between different "current" machine
311 // functions.
313 const MachineFunction *MF = nullptr) const;
314
315 // Whether the given VReg has a SPIR-V type mapped to it yet.
316 bool hasSPIRVTypeForVReg(Register VReg) const {
317 return getSPIRVTypeForVReg(VReg) != nullptr;
318 }
319
320 // Return the VReg holding the result of the given OpTypeXXX instruction.
321 Register getSPIRVTypeID(const SPIRVType *SpirvType) const;
322
323 // Return previous value of the current machine function
325 MachineFunction *Ret = CurMF;
326 CurMF = &MF;
327 return Ret;
328 }
329
330 // Whether the given VReg has an OpTypeXXX instruction mapped to it with the
331 // given opcode (e.g. OpTypeFloat).
332 bool isScalarOfType(Register VReg, unsigned TypeOpcode) const;
333
334 // Return true if the given VReg's assigned SPIR-V type is either a scalar
335 // matching the given opcode, or a vector with an element type matching that
336 // opcode (e.g. OpTypeBool, or OpTypeVector %x 4, where %x is OpTypeBool).
337 bool isScalarOrVectorOfType(Register VReg, unsigned TypeOpcode) const;
338
339 // Return number of elements in a vector if the argument is associated with
340 // a vector type. Return 1 for a scalar type, and 0 for a missing type.
341 unsigned getScalarOrVectorComponentCount(Register VReg) const;
343
344 // For vectors or scalars of booleans, integers and floats, return the scalar
345 // type's bitwidth. Otherwise calls llvm_unreachable().
346 unsigned getScalarOrVectorBitWidth(const SPIRVType *Type) const;
347
348 // For vectors or scalars of integers and floats, return total bitwidth of the
349 // argument. Otherwise returns 0.
350 unsigned getNumScalarOrVectorTotalBitWidth(const SPIRVType *Type) const;
351
352 // Returns either pointer to integer type, that may be a type of vector
353 // elements or an original type, or nullptr if the argument is niether
354 // an integer scalar, nor an integer vector
356
357 // For integer vectors or scalars, return whether the integers are signed.
358 bool isScalarOrVectorSigned(const SPIRVType *Type) const;
359
360 // Gets the storage class of the pointer type assigned to this vreg.
361 SPIRV::StorageClass::StorageClass getPointerStorageClass(Register VReg) const;
362
363 // Return the number of bits SPIR-V pointers and size_t variables require.
364 unsigned getPointerSize() const { return PointerSize; }
365
366 // Returns true if two types are defined and are compatible in a sense of
367 // OpBitcast instruction
368 bool isBitcastCompatible(const SPIRVType *Type1,
369 const SPIRVType *Type2) const;
370
371private:
372 SPIRVType *getOpTypeBool(MachineIRBuilder &MIRBuilder);
373
374 const Type *adjustIntTypeByWidth(const Type *Ty) const;
375 unsigned adjustOpTypeIntWidth(unsigned Width) const;
376
377 SPIRVType *getOpTypeInt(unsigned Width, MachineIRBuilder &MIRBuilder,
378 bool IsSigned = false);
379
380 SPIRVType *getOpTypeFloat(uint32_t Width, MachineIRBuilder &MIRBuilder);
381
382 SPIRVType *getOpTypeVoid(MachineIRBuilder &MIRBuilder);
383
384 SPIRVType *getOpTypeVector(uint32_t NumElems, SPIRVType *ElemType,
385 MachineIRBuilder &MIRBuilder);
386
387 SPIRVType *getOpTypeArray(uint32_t NumElems, SPIRVType *ElemType,
388 MachineIRBuilder &MIRBuilder, bool EmitIR = true);
389
390 SPIRVType *getOpTypeOpaque(const StructType *Ty,
391 MachineIRBuilder &MIRBuilder);
392
393 SPIRVType *getOpTypeStruct(const StructType *Ty, MachineIRBuilder &MIRBuilder,
394 bool EmitIR = true);
395
396 SPIRVType *getOpTypePointer(SPIRV::StorageClass::StorageClass SC,
397 SPIRVType *ElemType, MachineIRBuilder &MIRBuilder,
398 Register Reg);
399
400 SPIRVType *getOpTypeForwardPointer(SPIRV::StorageClass::StorageClass SC,
401 MachineIRBuilder &MIRBuilder);
402
403 SPIRVType *getOpTypeFunction(SPIRVType *RetType,
404 const SmallVectorImpl<SPIRVType *> &ArgTypes,
405 MachineIRBuilder &MIRBuilder);
406
407 SPIRVType *
408 getOrCreateSpecialType(const Type *Ty, MachineIRBuilder &MIRBuilder,
409 SPIRV::AccessQualifier::AccessQualifier AccQual);
410
411 std::tuple<Register, ConstantInt *, bool> getOrCreateConstIntReg(
412 uint64_t Val, SPIRVType *SpvType, MachineIRBuilder *MIRBuilder,
413 MachineInstr *I = nullptr, const SPIRVInstrInfo *TII = nullptr);
414 std::tuple<Register, ConstantFP *, bool, unsigned> getOrCreateConstFloatReg(
415 APFloat Val, SPIRVType *SpvType, MachineIRBuilder *MIRBuilder,
416 MachineInstr *I = nullptr, const SPIRVInstrInfo *TII = nullptr);
417 SPIRVType *finishCreatingSPIRVType(const Type *LLVMTy, SPIRVType *SpirvType);
418 Register getOrCreateBaseRegister(Constant *Val, MachineInstr &I,
419 SPIRVType *SpvType,
420 const SPIRVInstrInfo &TII,
421 unsigned BitWidth);
422 Register getOrCreateCompositeOrNull(Constant *Val, MachineInstr &I,
423 SPIRVType *SpvType,
424 const SPIRVInstrInfo &TII, Constant *CA,
425 unsigned BitWidth, unsigned ElemCnt,
426 bool ZeroAsNull = true);
427
428 Register getOrCreateIntCompositeOrNull(uint64_t Val,
429 MachineIRBuilder &MIRBuilder,
430 SPIRVType *SpvType, bool EmitIR,
431 Constant *CA, unsigned BitWidth,
432 unsigned ElemCnt);
433
434public:
436 SPIRVType *SpvType = nullptr, bool EmitIR = true);
438 SPIRVType *SpvType, const SPIRVInstrInfo &TII,
439 bool ZeroAsNull = true);
441 const SPIRVInstrInfo &TII,
442 bool ZeroAsNull = true);
444 SPIRVType *SpvType = nullptr);
445
447 SPIRVType *SpvType, const SPIRVInstrInfo &TII,
448 bool ZeroAsNull = true);
450 SPIRVType *SpvType, const SPIRVInstrInfo &TII,
451 bool ZeroAsNull = true);
453 SPIRVType *SpvType,
454 const SPIRVInstrInfo &TII);
456 SPIRVType *SpvType, bool EmitIR = true);
458 SPIRVType *SpvType, bool EmitIR = true);
460 SPIRVType *SpvType);
461 Register buildConstantSampler(Register Res, unsigned AddrMode, unsigned Param,
462 unsigned FilerMode,
463 MachineIRBuilder &MIRBuilder,
464 SPIRVType *SpvType);
466 const SPIRVInstrInfo &TII);
468 StringRef Name, const GlobalValue *GV,
469 SPIRV::StorageClass::StorageClass Storage,
470 const MachineInstr *Init, bool IsConst,
471 bool HasLinkageTy,
472 SPIRV::LinkageType::LinkageType LinkageType,
473 MachineIRBuilder &MIRBuilder,
474 bool IsInstSelector);
475
476 // Convenient helpers for getting types with check for duplicates.
478 MachineIRBuilder &MIRBuilder);
480 const SPIRVInstrInfo &TII);
482 const SPIRVInstrInfo &TII,
483 unsigned SPIRVOPcode, Type *LLVMTy);
485 const SPIRVInstrInfo &TII);
488 const SPIRVInstrInfo &TII);
490 unsigned NumElements,
491 MachineIRBuilder &MIRBuilder);
493 unsigned NumElements, MachineInstr &I,
494 const SPIRVInstrInfo &TII);
496 unsigned NumElements, MachineInstr &I,
497 const SPIRVInstrInfo &TII);
498
500 SPIRVType *BaseType, MachineIRBuilder &MIRBuilder,
501 SPIRV::StorageClass::StorageClass SClass = SPIRV::StorageClass::Function);
504 SPIRV::StorageClass::StorageClass SClass = SPIRV::StorageClass::Function);
505
506 SPIRVType *
507 getOrCreateOpTypeImage(MachineIRBuilder &MIRBuilder, SPIRVType *SampledType,
508 SPIRV::Dim::Dim Dim, uint32_t Depth, uint32_t Arrayed,
509 uint32_t Multisampled, uint32_t Sampled,
510 SPIRV::ImageFormat::ImageFormat ImageFormat,
511 SPIRV::AccessQualifier::AccessQualifier AccQual);
512
514
516 MachineIRBuilder &MIRBuilder);
517
518 SPIRVType *
520 SPIRV::AccessQualifier::AccessQualifier AccQual);
523 const Type *Ty, SPIRVType *RetType,
524 const SmallVectorImpl<SPIRVType *> &ArgTypes,
525 MachineIRBuilder &MIRBuilder);
527 MachineIRBuilder &MIRBuilder,
528 unsigned Opcode);
529};
530} // end namespace llvm
531#endif // LLLVM_LIB_TARGET_SPIRV_SPIRVTYPEMANAGER_H
std::string Name
ELFYAML::ELF_REL Type2
Definition: ELFYAML.cpp:1812
const HexagonInstrInfo * TII
IRTranslator LLVM IR MI
#define F(x, y, z)
Definition: MD5.cpp:55
#define I(x, y, z)
Definition: MD5.cpp:58
This file declares the MachineIRBuilder class.
unsigned Reg
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This class represents an incoming formal argument to a Function.
Definition: Argument.h:31
This class represents a function call, abstracting a target machine's calling convention.
This is an important base class in LLVM.
Definition: Constant.h:41
iterator find(const_arg_type_t< KeyT > Val)
Definition: DenseMap.h:155
bool empty() const
Definition: DenseMap.h:98
iterator end()
Definition: DenseMap.h:84
Helper class to build MachineInstr.
Representation of each machine instruction.
Definition: MachineInstr.h:69
This class contains meta information specific to a module.
MachineOperand class - Representation of each machine instruction operand.
MachineInstr * getParent()
getParent - Return the instruction that this operand belongs to.
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
void add(const Type *Ty, const MachineFunction *MF, Register R)
Register find(const Type *Ty, const MachineFunction *MF)
void buildDepsGraph(std::vector< SPIRV::DTSortableEntry * > &Graph, MachineModuleInfo *MMI)
SPIRVType * getOrCreateOpTypePipe(MachineIRBuilder &MIRBuilder, SPIRV::AccessQualifier::AccessQualifier AccQual)
void recordFunctionDefinition(const Function *F, const MachineOperand *MO)
unsigned getNumScalarOrVectorTotalBitWidth(const SPIRVType *Type) const
SPIRVType * getSPIRVTypeForVReg(Register VReg, const MachineFunction *MF=nullptr) const
const TypedPointerType * findReturnType(const Function *ArgF)
void addForwardCall(const Function *F, MachineInstr *MI)
Register getOrCreateConstInt(uint64_t Val, MachineInstr &I, SPIRVType *SpvType, const SPIRVInstrInfo &TII, bool ZeroAsNull=true)
void addAssignPtrTypeInstr(Value *Val, CallInst *AssignPtrTyCI)
SPIRVType * assignFloatTypeToVReg(unsigned BitWidth, Register VReg, MachineInstr &I, const SPIRVInstrInfo &TII)
SPIRVType * assignVectTypeToVReg(SPIRVType *BaseType, unsigned NumElements, Register VReg, MachineInstr &I, const SPIRVInstrInfo &TII)
Register getOrCreateUndef(MachineInstr &I, SPIRVType *SpvType, const SPIRVInstrInfo &TII)
void add(const Constant *C, MachineFunction *MF, Register R)
Type * findDeducedCompositeType(const Value *Val)
void add(const MachineInstr *MI, MachineFunction *MF, Register R)
SPIRVType * getOrCreateSPIRVBoolType(MachineIRBuilder &MIRBuilder)
Register getOrCreateConsIntVector(uint64_t Val, MachineIRBuilder &MIRBuilder, SPIRVType *SpvType, bool EmitIR=true)
const Type * getTypeForSPIRVType(const SPIRVType *Ty) const
Register buildConstantSampler(Register Res, unsigned AddrMode, unsigned Param, unsigned FilerMode, MachineIRBuilder &MIRBuilder, SPIRVType *SpvType)
bool isBitcastCompatible(const SPIRVType *Type1, const SPIRVType *Type2) const
unsigned getScalarOrVectorComponentCount(Register VReg) const
SPIRVType * getOrCreateSPIRVFloatType(unsigned BitWidth, MachineInstr &I, const SPIRVInstrInfo &TII)
SPIRVType * getOrCreateOpTypeImage(MachineIRBuilder &MIRBuilder, SPIRVType *SampledType, SPIRV::Dim::Dim Dim, uint32_t Depth, uint32_t Arrayed, uint32_t Multisampled, uint32_t Sampled, SPIRV::ImageFormat::ImageFormat ImageFormat, SPIRV::AccessQualifier::AccessQualifier AccQual)
bool isScalarOrVectorSigned(const SPIRVType *Type) const
void addDeducedElementType(Value *Val, Type *Ty)
void add(const GlobalVariable *GV, MachineFunction *MF, Register R)
Register find(const Constant *C, MachineFunction *MF)
void add(const Argument *Arg, MachineFunction *MF, Register R)
const MachineInstr * getFunctionDefinition(const Function *F)
void addReturnType(const Function *ArgF, TypedPointerType *DerivedTy)
const MachineOperand * getFunctionDefinitionByUse(const MachineOperand *Use)
SPIRVType * getOrCreateOpTypeByOpcode(const Type *Ty, MachineIRBuilder &MIRBuilder, unsigned Opcode)
Register buildConstantFP(APFloat Val, MachineIRBuilder &MIRBuilder, SPIRVType *SpvType=nullptr)
Register getSPIRVTypeID(const SPIRVType *SpirvType) const
SPIRVType * getOrCreateSPIRVType(const Type *Type, MachineIRBuilder &MIRBuilder, SPIRV::AccessQualifier::AccessQualifier AQ=SPIRV::AccessQualifier::ReadWrite, bool EmitIR=true)
void assignSPIRVTypeToVReg(SPIRVType *Type, Register VReg, MachineFunction &MF)
bool isScalarOfType(Register VReg, unsigned TypeOpcode) const
Register find(const Function *F, MachineFunction *MF)
Register buildGlobalVariable(Register Reg, SPIRVType *BaseType, StringRef Name, const GlobalValue *GV, SPIRV::StorageClass::StorageClass Storage, const MachineInstr *Init, bool IsConst, bool HasLinkageTy, SPIRV::LinkageType::LinkageType LinkageType, MachineIRBuilder &MIRBuilder, bool IsInstSelector)
void add(const Function *F, MachineFunction *MF, Register R)
SPIRVType * assignIntTypeToVReg(unsigned BitWidth, Register VReg, MachineInstr &I, const SPIRVInstrInfo &TII)
unsigned getPointeeTypeOp(Register PtrReg)
SPIRVType * getOrCreateOpTypeSampledImage(SPIRVType *ImageType, MachineIRBuilder &MIRBuilder)
SPIRVType * getOrCreateSPIRVTypeByName(StringRef TypeStr, MachineIRBuilder &MIRBuilder, SPIRV::StorageClass::StorageClass SC=SPIRV::StorageClass::Function, SPIRV::AccessQualifier::AccessQualifier AQ=SPIRV::AccessQualifier::ReadWrite)
Register find(const GlobalVariable *GV, MachineFunction *MF)
bool hasSPIRVTypeForVReg(Register VReg) const
void addDeducedCompositeType(Value *Val, Type *Ty)
void buildDepsGraph(std::vector< SPIRV::DTSortableEntry * > &Graph, MachineModuleInfo *MMI=nullptr)
SPIRVType * assignTypeToVReg(const Type *Type, Register VReg, MachineIRBuilder &MIRBuilder, SPIRV::AccessQualifier::AccessQualifier AQ=SPIRV::AccessQualifier::ReadWrite, bool EmitIR=true)
SPIRVType * getOrCreateOpTypeFunctionWithArgs(const Type *Ty, SPIRVType *RetType, const SmallVectorImpl< SPIRVType * > &ArgTypes, MachineIRBuilder &MIRBuilder)
void recordFunctionPointer(const MachineOperand *MO, const Function *F)
SmallPtrSet< MachineInstr *, 8 > * getForwardCalls(const Function *F)
bool isScalarOrVectorOfType(Register VReg, unsigned TypeOpcode) const
MachineFunction * setCurrentFunc(MachineFunction &MF)
Register getOrCreateConstVector(uint64_t Val, MachineInstr &I, SPIRVType *SpvType, const SPIRVInstrInfo &TII, bool ZeroAsNull=true)
SPIRVType * getOrCreateOpTypeDeviceEvent(MachineIRBuilder &MIRBuilder)
Register find(const MachineInstr *MI, MachineFunction *MF)
SPIRVType * getOrCreateSPIRVPointerType(SPIRVType *BaseType, MachineIRBuilder &MIRBuilder, SPIRV::StorageClass::StorageClass SClass=SPIRV::StorageClass::Function)
SPIRVType * getOrCreateSPIRVVectorType(SPIRVType *BaseType, unsigned NumElements, MachineIRBuilder &MIRBuilder)
SPIRVType * getOrCreateSPIRVIntegerType(unsigned BitWidth, MachineIRBuilder &MIRBuilder)
Type * getDeducedGlobalValueType(const GlobalValue *Global)
Register getOrCreateConsIntArray(uint64_t Val, MachineInstr &I, SPIRVType *SpvType, const SPIRVInstrInfo &TII)
const Function * getFunctionByDefinition(const MachineInstr *MI)
SPIRVType * getOrCreateSPIRVArrayType(SPIRVType *BaseType, unsigned NumElements, MachineInstr &I, const SPIRVInstrInfo &TII)
SPIRV::StorageClass::StorageClass getPointerStorageClass(Register VReg) const
SPIRVType * getOrCreateOpTypeSampler(MachineIRBuilder &MIRBuilder)
Type * findDeducedElementType(const Value *Val)
Register buildConstantInt(uint64_t Val, MachineIRBuilder &MIRBuilder, SPIRVType *SpvType=nullptr, bool EmitIR=true)
Register getOrCreateConstFP(APFloat Val, MachineInstr &I, SPIRVType *SpvType, const SPIRVInstrInfo &TII, bool ZeroAsNull=true)
CallInst * findAssignPtrTypeInstr(const Value *Val)
Register getOrCreateConstNullPtr(MachineIRBuilder &MIRBuilder, SPIRVType *SpvType)
unsigned getScalarOrVectorBitWidth(const SPIRVType *Type) const
const SPIRVType * retrieveScalarOrVectorIntType(const SPIRVType *Type) const
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
Definition: SmallPtrSet.h:427
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: SmallVector.h:586
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
Class to represent struct types.
Definition: DerivedTypes.h:216
The instances of the Type class are immutable: once they are created, they are never changed.
Definition: Type.h:45
A few GPU targets, such as DXIL and SPIR-V, have typed pointers.
A Use represents the edge between a Value definition and its users.
Definition: Use.h:43
LLVM Value Representation.
Definition: Value.h:74
@ C
The default llvm calling convention, compatible with C.
Definition: CallingConv.h:34
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
@ Global
Append to llvm.global_dtors.
constexpr unsigned BitWidth
Definition: BitmaskEnum.h:191