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SPIRVGlobalRegistry.h
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1 //===-- SPIRVGlobalRegistry.h - SPIR-V Global Registry ----------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // SPIRVGlobalRegistry is used to maintain rich type information required for
10 // SPIR-V even after lowering from LLVM IR to GMIR. It can convert an llvm::Type
11 // into an OpTypeXXX instruction, and map it to a virtual register. Also it
12 // builds and supports consistency of constants and global variables.
13 //
14 //===----------------------------------------------------------------------===//
15 
16 #ifndef LLVM_LIB_TARGET_SPIRV_SPIRVTYPEMANAGER_H
17 #define LLVM_LIB_TARGET_SPIRV_SPIRVTYPEMANAGER_H
18 
20 #include "SPIRVDuplicatesTracker.h"
21 #include "SPIRVInstrInfo.h"
23 
24 namespace llvm {
25 using SPIRVType = const MachineInstr;
26 
28  // Registers holding values which have types associated with them.
29  // Initialized upon VReg definition in IRTranslator.
30  // Do not confuse this with DuplicatesTracker as DT maps Type* to <MF, Reg>
31  // where Reg = OpType...
32  // while VRegToTypeMap tracks SPIR-V type assigned to other regs (i.e. not
33  // type-declaring ones)
35  VRegToTypeMap;
36 
38 
40 
41  // Number of bits pointers and size_t integers require.
42  const unsigned PointerSize;
43 
44  // Add a new OpTypeXXX instruction without checking for duplicates.
45  SPIRVType *
46  createSPIRVType(const Type *Type, MachineIRBuilder &MIRBuilder,
48  bool EmitIR = true);
49 
50 public:
51  SPIRVGlobalRegistry(unsigned PointerSize);
52 
54 
55  void add(const Constant *C, MachineFunction *MF, Register R) {
56  DT.add(C, MF, R);
57  }
58 
59  void add(const GlobalVariable *GV, MachineFunction *MF, Register R) {
60  DT.add(GV, MF, R);
61  }
62 
63  void add(const Function *F, MachineFunction *MF, Register R) {
64  DT.add(F, MF, R);
65  }
66 
67  void add(const Argument *Arg, MachineFunction *MF, Register R) {
68  DT.add(Arg, MF, R);
69  }
70 
72  return DT.find(C, MF);
73  }
74 
76  return DT.find(GV, MF);
77  }
78 
80  return DT.find(F, MF);
81  }
82 
83  void buildDepsGraph(std::vector<SPIRV::DTSortableEntry *> &Graph,
84  MachineModuleInfo *MMI = nullptr) {
85  DT.buildDepsGraph(Graph, MMI);
86  }
87 
88  // Get or create a SPIR-V type corresponding the given LLVM IR type,
89  // and map it to the given VReg by creating an ASSIGN_TYPE instruction.
91  const Type *Type, Register VReg, MachineIRBuilder &MIRBuilder,
93  bool EmitIR = true);
94 
95  // In cases where the SPIR-V type is already known, this function can be
96  // used to map it to the given VReg via an ASSIGN_TYPE instruction.
98  MachineFunction &MF);
99 
100  // Either generate a new OpTypeXXX instruction or return an existing one
101  // corresponding to the given LLVM IR type.
102  // EmitIR controls if we emit GMIR or SPV constants (e.g. for array sizes)
103  // because this method may be called from InstructionSelector and we don't
104  // want to emit extra IR instructions there.
106  const Type *Type, MachineIRBuilder &MIRBuilder,
108  bool EmitIR = true);
109 
110  const Type *getTypeForSPIRVType(const SPIRVType *Ty) const {
111  auto Res = SPIRVToLLVMType.find(Ty);
112  assert(Res != SPIRVToLLVMType.end());
113  return Res->second;
114  }
115 
116  // Return the SPIR-V type instruction corresponding to the given VReg, or
117  // nullptr if no such type instruction exists.
119 
120  // Whether the given VReg has a SPIR-V type mapped to it yet.
121  bool hasSPIRVTypeForVReg(Register VReg) const {
122  return getSPIRVTypeForVReg(VReg) != nullptr;
123  }
124 
125  // Return the VReg holding the result of the given OpTypeXXX instruction.
126  Register getSPIRVTypeID(const SPIRVType *SpirvType) const {
127  assert(SpirvType && "Attempting to get type id for nullptr type.");
128  return SpirvType->defs().begin()->getReg();
129  }
130 
131  void setCurrentFunc(MachineFunction &MF) { CurMF = &MF; }
132 
133  // Whether the given VReg has an OpTypeXXX instruction mapped to it with the
134  // given opcode (e.g. OpTypeFloat).
135  bool isScalarOfType(Register VReg, unsigned TypeOpcode) const;
136 
137  // Return true if the given VReg's assigned SPIR-V type is either a scalar
138  // matching the given opcode, or a vector with an element type matching that
139  // opcode (e.g. OpTypeBool, or OpTypeVector %x 4, where %x is OpTypeBool).
140  bool isScalarOrVectorOfType(Register VReg, unsigned TypeOpcode) const;
141 
142  // For vectors or scalars of ints/floats, return the scalar type's bitwidth.
143  unsigned getScalarOrVectorBitWidth(const SPIRVType *Type) const;
144 
145  // For integer vectors or scalars, return whether the integers are signed.
146  bool isScalarOrVectorSigned(const SPIRVType *Type) const;
147 
148  // Gets the storage class of the pointer type assigned to this vreg.
150 
151  // Return the number of bits SPIR-V pointers and size_t variables require.
152  unsigned getPointerSize() const { return PointerSize; }
153 
154 private:
155  SPIRVType *getOpTypeBool(MachineIRBuilder &MIRBuilder);
156 
157  SPIRVType *getOpTypeInt(uint32_t Width, MachineIRBuilder &MIRBuilder,
158  bool IsSigned = false);
159 
160  SPIRVType *getOpTypeFloat(uint32_t Width, MachineIRBuilder &MIRBuilder);
161 
162  SPIRVType *getOpTypeVoid(MachineIRBuilder &MIRBuilder);
163 
164  SPIRVType *getOpTypeVector(uint32_t NumElems, SPIRVType *ElemType,
165  MachineIRBuilder &MIRBuilder);
166 
167  SPIRVType *getOpTypeArray(uint32_t NumElems, SPIRVType *ElemType,
168  MachineIRBuilder &MIRBuilder, bool EmitIR = true);
169 
170  SPIRVType *getOpTypePointer(SPIRV::StorageClass SC, SPIRVType *ElemType,
171  MachineIRBuilder &MIRBuilder);
172 
173  SPIRVType *getOpTypeFunction(SPIRVType *RetType,
174  const SmallVectorImpl<SPIRVType *> &ArgTypes,
175  MachineIRBuilder &MIRBuilder);
176  SPIRVType *restOfCreateSPIRVType(const Type *LLVMTy, SPIRVType *SpirvType);
177 
178 public:
180  SPIRVType *SpvType = nullptr, bool EmitIR = true);
182  SPIRVType *SpvType = nullptr);
183  Register
185  const GlobalValue *GV, SPIRV::StorageClass Storage,
186  const MachineInstr *Init, bool IsConst, bool HasLinkageTy,
188  MachineIRBuilder &MIRBuilder, bool IsInstSelector);
189 
190  // Convenient helpers for getting types with check for duplicates.
192  MachineIRBuilder &MIRBuilder);
194  const SPIRVInstrInfo &TII);
197  unsigned NumElements,
198  MachineIRBuilder &MIRBuilder);
200  unsigned NumElements, MachineInstr &I,
201  const SPIRVInstrInfo &TII);
202 
204  SPIRVType *BaseType, MachineIRBuilder &MIRBuilder,
209 };
210 } // end namespace llvm
211 #endif // LLLVM_LIB_TARGET_SPIRV_SPIRVTYPEMANAGER_H
llvm::Argument
This class represents an incoming formal argument to a Function.
Definition: Argument.h:28
llvm::SPIRVGlobalRegistry::find
Register find(const GlobalVariable *GV, MachineFunction *MF)
Definition: SPIRVGlobalRegistry.h:75
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:17
llvm::SPIRVGlobalRegistry::isScalarOrVectorOfType
bool isScalarOrVectorOfType(Register VReg, unsigned TypeOpcode) const
Definition: SPIRVGlobalRegistry.cpp:340
llvm::SPIRV::LinkageType
LinkageType
Definition: SPIRVBaseInfo.h:431
llvm::SPIRVGlobalRegistry::isScalarOfType
bool isScalarOfType(Register VReg, unsigned TypeOpcode) const
Definition: SPIRVGlobalRegistry.cpp:333
llvm::SPIRVGlobalRegistry::SPIRVGlobalRegistry
SPIRVGlobalRegistry(unsigned PointerSize)
Definition: SPIRVGlobalRegistry.cpp:24
llvm::Function
Definition: Function.h:60
llvm::SPIRVGlobalRegistry::getScalarOrVectorBitWidth
unsigned getScalarOrVectorBitWidth(const SPIRVType *Type) const
Definition: SPIRVGlobalRegistry.cpp:355
llvm::X86Disassembler::Reg
Reg
All possible values of the reg field in the ModR/M byte.
Definition: X86DisassemblerDecoder.h:462
llvm::GlobalVariable
Definition: GlobalVariable.h:39
llvm::SPIRVGeneralDuplicatesTracker::buildDepsGraph
void buildDepsGraph(std::vector< SPIRV::DTSortableEntry * > &Graph, MachineModuleInfo *MMI)
Definition: SPIRVDuplicatesTracker.cpp:33
llvm::MachineInstr::defs
iterator_range< mop_iterator > defs()
Returns a range over all explicit operands that are register definitions.
Definition: MachineInstr.h:656
llvm::SPIRVGeneralDuplicatesTracker::find
Register find(const Type *T, const MachineFunction *MF)
Definition: SPIRVDuplicatesTracker.h:153
llvm::Type
The instances of the Type class are immutable: once they are created, they are never changed.
Definition: Type.h:45
llvm::SPIRVGlobalRegistry::assignSPIRVTypeToVReg
void assignSPIRVTypeToVReg(SPIRVType *Type, Register VReg, MachineFunction &MF)
Definition: SPIRVGlobalRegistry.cpp:37
llvm::SPIRVGlobalRegistry::setCurrentFunc
void setCurrentFunc(MachineFunction &MF)
Definition: SPIRVGlobalRegistry.h:131
MachineIRBuilder.h
BaseType
llvm::SPIRVGlobalRegistry::CurMF
MachineFunction * CurMF
Definition: SPIRVGlobalRegistry.h:53
llvm::SPIRVGlobalRegistry::getSPIRVTypeForVReg
SPIRVType * getSPIRVTypeForVReg(Register VReg) const
Definition: SPIRVGlobalRegistry.cpp:313
F
#define F(x, y, z)
Definition: MD5.cpp:55
llvm::SPIRVGlobalRegistry::buildGlobalVariable
Register buildGlobalVariable(Register Reg, SPIRVType *BaseType, StringRef Name, const GlobalValue *GV, SPIRV::StorageClass Storage, const MachineInstr *Init, bool IsConst, bool HasLinkageTy, SPIRV::LinkageType LinkageType, MachineIRBuilder &MIRBuilder, bool IsInstSelector)
Definition: SPIRVGlobalRegistry.cpp:150
llvm::SPIRVGlobalRegistry::getTypeForSPIRVType
const Type * getTypeForSPIRVType(const SPIRVType *Ty) const
Definition: SPIRVGlobalRegistry.h:110
Arg
amdgpu Simplify well known AMD library false FunctionCallee Value * Arg
Definition: AMDGPULibCalls.cpp:186
llvm::SPIRVGlobalRegistry::add
void add(const Argument *Arg, MachineFunction *MF, Register R)
Definition: SPIRVGlobalRegistry.h:67
llvm::SPIRVGlobalRegistry::buildConstantFP
Register buildConstantFP(APFloat Val, MachineIRBuilder &MIRBuilder, SPIRVType *SpvType=nullptr)
Definition: SPIRVGlobalRegistry.cpp:127
llvm::PPCISD::SC
@ SC
CHAIN = SC CHAIN, Imm128 - System call.
Definition: PPCISelLowering.h:418
llvm::SPIRVGlobalRegistry::add
void add(const GlobalVariable *GV, MachineFunction *MF, Register R)
Definition: SPIRVGlobalRegistry.h:59
SPIRVBaseInfo.h
C
(vector float) vec_cmpeq(*A, *B) C
Definition: README_ALTIVEC.txt:86
llvm::SPIRV::AccessQualifier
AccessQualifier
Definition: SPIRVBaseInfo.h:437
TII
const HexagonInstrInfo * TII
Definition: HexagonCopyToCombine.cpp:125
llvm::MachineModuleInfo
This class contains meta information specific to a module.
Definition: MachineModuleInfo.h:74
llvm::SPIRVGlobalRegistry::getPointerSize
unsigned getPointerSize() const
Definition: SPIRVGlobalRegistry.h:152
SPIRVInstrInfo.h
llvm::APFloat
Definition: APFloat.h:701
llvm::GlobalValue
Definition: GlobalValue.h:44
llvm::Constant
This is an important base class in LLVM.
Definition: Constant.h:41
llvm::MachineIRBuilder
Helper class to build MachineInstr.
Definition: MachineIRBuilder.h:219
llvm::SPIRVGlobalRegistry::add
void add(const Constant *C, MachineFunction *MF, Register R)
Definition: SPIRVGlobalRegistry.h:55
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:66
llvm::SPIRV::StorageClass
StorageClass
Definition: SPIRVBaseInfo.h:255
uint64_t
llvm::DenseMap
Definition: DenseMap.h:716
I
#define I(x, y, z)
Definition: MD5.cpp:58
llvm::SPIRVGlobalRegistry::add
void add(const Function *F, MachineFunction *MF, Register R)
Definition: SPIRVGlobalRegistry.h:63
llvm::DenseMapBase< DenseMap< KeyT, ValueT, DenseMapInfo< KeyT >, llvm::detail::DenseMapPair< KeyT, ValueT > >, KeyT, ValueT, DenseMapInfo< KeyT >, llvm::detail::DenseMapPair< KeyT, ValueT > >::find
iterator find(const_arg_type_t< KeyT > Val)
Definition: DenseMap.h:152
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::SPIRV::AccessQualifier::ReadWrite
@ ReadWrite
llvm::SPIRVGlobalRegistry::buildDepsGraph
void buildDepsGraph(std::vector< SPIRV::DTSortableEntry * > &Graph, MachineModuleInfo *MMI=nullptr)
Definition: SPIRVGlobalRegistry.h:83
llvm::SPIRVGlobalRegistry
Definition: SPIRVGlobalRegistry.h:27
SPIRVDuplicatesTracker.h
llvm::MachineFunction
Definition: MachineFunction.h:257
llvm::AMDGPU::HSAMD::Kernel::Arg::Key::IsConst
constexpr char IsConst[]
Key for Kernel::Arg::Metadata::mIsConst.
Definition: AMDGPUMetadata.h:195
llvm::SPIRVInstrInfo
Definition: SPIRVInstrInfo.h:24
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:58
llvm::SPIRVGeneralDuplicatesTracker
Definition: SPIRVDuplicatesTracker.h:110
uint32_t
llvm::SPIRVGlobalRegistry::getOrCreateSPIRVBoolType
SPIRVType * getOrCreateSPIRVBoolType(MachineIRBuilder &MIRBuilder)
Definition: SPIRVGlobalRegistry.cpp:420
llvm::Init
Definition: Record.h:281
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
llvm::SPIRVGlobalRegistry::getOrCreateSPIRVPointerType
SPIRVType * getOrCreateSPIRVPointerType(SPIRVType *BaseType, MachineIRBuilder &MIRBuilder, SPIRV::StorageClass SClass=SPIRV::StorageClass::Function)
Definition: SPIRVGlobalRegistry.cpp:448
llvm::GraphProgram::Name
Name
Definition: GraphWriter.h:50
llvm::DenseMapBase< DenseMap< KeyT, ValueT, DenseMapInfo< KeyT >, llvm::detail::DenseMapPair< KeyT, ValueT > >, KeyT, ValueT, DenseMapInfo< KeyT >, llvm::detail::DenseMapPair< KeyT, ValueT > >::end
iterator end()
Definition: DenseMap.h:84
llvm::SPIRVGlobalRegistry::getOrCreateSPIRVIntegerType
SPIRVType * getOrCreateSPIRVIntegerType(unsigned BitWidth, MachineIRBuilder &MIRBuilder)
Definition: SPIRVGlobalRegistry.cpp:389
llvm::BitWidth
constexpr unsigned BitWidth
Definition: BitmaskEnum.h:147
llvm::SPIRVGlobalRegistry::find
Register find(const Constant *C, MachineFunction *MF)
Definition: SPIRVGlobalRegistry.h:71
llvm::SPIRVGlobalRegistry::getSPIRVTypeID
Register getSPIRVTypeID(const SPIRVType *SpirvType) const
Definition: SPIRVGlobalRegistry.h:126
llvm::AMDGPU::Hwreg::Width
Width
Definition: SIDefines.h:439
llvm::SPIRVGlobalRegistry::getPointerStorageClass
SPIRV::StorageClass getPointerStorageClass(Register VReg) const
Definition: SPIRVGlobalRegistry.cpp:381
llvm::SPIRVGlobalRegistry::buildConstantInt
Register buildConstantInt(uint64_t Val, MachineIRBuilder &MIRBuilder, SPIRVType *SpvType=nullptr, bool EmitIR=true)
Definition: SPIRVGlobalRegistry.cpp:99
llvm::SPIRVGlobalRegistry::assignTypeToVReg
SPIRVType * assignTypeToVReg(const Type *Type, Register VReg, MachineIRBuilder &MIRBuilder, SPIRV::AccessQualifier AQ=SPIRV::AccessQualifier::ReadWrite, bool EmitIR=true)
Definition: SPIRVGlobalRegistry.cpp:27
llvm::SmallVectorImpl
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:42
llvm::SPIRV::StorageClass::Function
@ Function
llvm::SPIRVGlobalRegistry::hasSPIRVTypeForVReg
bool hasSPIRVTypeForVReg(Register VReg) const
Definition: SPIRVGlobalRegistry.h:121
llvm::SPIRVGlobalRegistry::getOrCreateSPIRVType
SPIRVType * getOrCreateSPIRVType(const Type *Type, MachineIRBuilder &MIRBuilder, SPIRV::AccessQualifier AQ=SPIRV::AccessQualifier::ReadWrite, bool EmitIR=true)
Definition: SPIRVGlobalRegistry.cpp:323
llvm::SPIRVGeneralDuplicatesTracker::add
void add(const Type *T, const MachineFunction *MF, Register R)
Definition: SPIRVDuplicatesTracker.h:133
llvm::SPIRVGlobalRegistry::isScalarOrVectorSigned
bool isScalarOrVectorSigned(const SPIRVType *Type) const
Definition: SPIRVGlobalRegistry.cpp:369
llvm::SPIRVGlobalRegistry::getOrCreateSPIRVVectorType
SPIRVType * getOrCreateSPIRVVectorType(SPIRVType *BaseType, unsigned NumElements, MachineIRBuilder &MIRBuilder)
Definition: SPIRVGlobalRegistry.cpp:426
llvm::SPIRVGlobalRegistry::find
Register find(const Function *F, MachineFunction *MF)
Definition: SPIRVGlobalRegistry.h:79