LLVM  14.0.0git
SystemZSelectionDAGInfo.cpp
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1 //===-- SystemZSelectionDAGInfo.cpp - SystemZ SelectionDAG Info -----------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the SystemZSelectionDAGInfo class.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "SystemZTargetMachine.h"
15 
16 using namespace llvm;
17 
18 #define DEBUG_TYPE "systemz-selectiondag-info"
19 
20 static SDVTList getMemMemVTs(unsigned Op, SelectionDAG &DAG) {
22  : DAG.getVTList(MVT::Other);
23 }
24 
25 // Emit a mem-mem operation after subtracting one from size, which will be
26 // added back during pseudo expansion. As the Reg case emitted here may be
27 // converted by DAGCombiner into having an Imm length, they are both emitted
28 // the same way.
29 static SDValue emitMemMemImm(SelectionDAG &DAG, const SDLoc &DL, unsigned Op,
30  SDValue Chain, SDValue Dst, SDValue Src,
31  uint64_t Size) {
32  return DAG.getNode(Op, DL, getMemMemVTs(Op, DAG), Chain, Dst, Src,
33  DAG.getConstant(Size - 1, DL, Src.getValueType()));
34 }
35 
36 static SDValue emitMemMemReg(SelectionDAG &DAG, const SDLoc &DL, unsigned Op,
37  SDValue Chain, SDValue Dst, SDValue Src,
38  SDValue Size) {
39  SDValue LenMinus1 = DAG.getNode(ISD::ADD, DL, MVT::i64,
41  DAG.getConstant(-1, DL, MVT::i64));
42  return DAG.getNode(Op, DL, getMemMemVTs(Op, DAG), Chain, Dst, Src, LenMinus1);
43 }
44 
46  SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dst, SDValue Src,
47  SDValue Size, Align Alignment, bool IsVolatile, bool AlwaysInline,
48  MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const {
49  if (IsVolatile)
50  return SDValue();
51 
52  if (auto *CSize = dyn_cast<ConstantSDNode>(Size))
53  return emitMemMemImm(DAG, DL, SystemZISD::MVC, Chain, Dst, Src,
54  CSize->getZExtValue());
55 
56  return emitMemMemReg(DAG, DL, SystemZISD::MVC, Chain, Dst, Src, Size);
57 }
58 
59 // Handle a memset of 1, 2, 4 or 8 bytes with the operands given by
60 // Chain, Dst, ByteVal and Size. These cases are expected to use
61 // MVI, MVHHI, MVHI and MVGHI respectively.
62 static SDValue memsetStore(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain,
63  SDValue Dst, uint64_t ByteVal, uint64_t Size,
64  unsigned Align, MachinePointerInfo DstPtrInfo) {
65  uint64_t StoreVal = ByteVal;
66  for (unsigned I = 1; I < Size; ++I)
67  StoreVal |= ByteVal << (I * 8);
68  return DAG.getStore(
69  Chain, DL, DAG.getConstant(StoreVal, DL, MVT::getIntegerVT(Size * 8)),
70  Dst, DstPtrInfo, Align);
71 }
72 
74  SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dst,
75  SDValue Byte, SDValue Size, Align Alignment, bool IsVolatile,
76  MachinePointerInfo DstPtrInfo) const {
77  EVT PtrVT = Dst.getValueType();
78 
79  if (IsVolatile)
80  return SDValue();
81 
82  auto *CByte = dyn_cast<ConstantSDNode>(Byte);
83  if (auto *CSize = dyn_cast<ConstantSDNode>(Size)) {
84  uint64_t Bytes = CSize->getZExtValue();
85  if (Bytes == 0)
86  return SDValue();
87  if (CByte) {
88  // Handle cases that can be done using at most two of
89  // MVI, MVHI, MVHHI and MVGHI. The latter two can only be
90  // used if ByteVal is all zeros or all ones; in other casees,
91  // we can move at most 2 halfwords.
92  uint64_t ByteVal = CByte->getZExtValue();
93  if (ByteVal == 0 || ByteVal == 255 ?
94  Bytes <= 16 && countPopulation(Bytes) <= 2 :
95  Bytes <= 4) {
96  unsigned Size1 = Bytes == 16 ? 8 : 1 << findLastSet(Bytes);
97  unsigned Size2 = Bytes - Size1;
98  SDValue Chain1 = memsetStore(DAG, DL, Chain, Dst, ByteVal, Size1,
99  Alignment.value(), DstPtrInfo);
100  if (Size2 == 0)
101  return Chain1;
102  Dst = DAG.getNode(ISD::ADD, DL, PtrVT, Dst,
103  DAG.getConstant(Size1, DL, PtrVT));
104  DstPtrInfo = DstPtrInfo.getWithOffset(Size1);
105  SDValue Chain2 = memsetStore(
106  DAG, DL, Chain, Dst, ByteVal, Size2,
107  std::min((unsigned)Alignment.value(), Size1), DstPtrInfo);
108  return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Chain1, Chain2);
109  }
110  } else {
111  // Handle one and two bytes using STC.
112  if (Bytes <= 2) {
113  SDValue Chain1 =
114  DAG.getStore(Chain, DL, Byte, Dst, DstPtrInfo, Alignment);
115  if (Bytes == 1)
116  return Chain1;
117  SDValue Dst2 = DAG.getNode(ISD::ADD, DL, PtrVT, Dst,
118  DAG.getConstant(1, DL, PtrVT));
119  SDValue Chain2 = DAG.getStore(Chain, DL, Byte, Dst2,
120  DstPtrInfo.getWithOffset(1), Align(1));
121  return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Chain1, Chain2);
122  }
123  }
124  assert(Bytes >= 2 && "Should have dealt with 0- and 1-byte cases already");
125 
126  // Handle the special case of a memset of 0, which can use XC.
127  if (CByte && CByte->getZExtValue() == 0)
128  return emitMemMemImm(DAG, DL, SystemZISD::XC, Chain, Dst, Dst, Bytes);
129 
130  // Copy the byte to the first location and then use MVC to copy
131  // it to the rest.
132  Chain = DAG.getStore(Chain, DL, Byte, Dst, DstPtrInfo, Alignment);
133  SDValue DstPlus1 = DAG.getNode(ISD::ADD, DL, PtrVT, Dst,
134  DAG.getConstant(1, DL, PtrVT));
135  return emitMemMemImm(DAG, DL, SystemZISD::MVC, Chain, DstPlus1, Dst,
136  Bytes - 1);
137  }
138 
139  // Variable length
140  if (CByte && CByte->getZExtValue() == 0)
141  // Handle the special case of a variable length memset of 0 with XC.
142  return emitMemMemReg(DAG, DL, SystemZISD::XC, Chain, Dst, Dst, Size);
143 
144  return SDValue();
145 }
146 
147 // Convert the current CC value into an integer that is 0 if CC == 0,
148 // greater than zero if CC == 1 and less than zero if CC >= 2.
149 // The sequence starts with IPM, which puts CC into bits 29 and 28
150 // of an integer and clears bits 30 and 31.
151 static SDValue addIPMSequence(const SDLoc &DL, SDValue CCReg,
152  SelectionDAG &DAG) {
153  SDValue IPM = DAG.getNode(SystemZISD::IPM, DL, MVT::i32, CCReg);
155  DAG.getConstant(30 - SystemZ::IPM_CC, DL, MVT::i32));
157  DAG.getConstant(30, DL, MVT::i32));
158  return SRA;
159 }
160 
162  SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src1,
163  SDValue Src2, SDValue Size, MachinePointerInfo Op1PtrInfo,
164  MachinePointerInfo Op2PtrInfo) const {
165  SDValue CCReg;
166  // Swap operands to invert CC == 1 vs. CC == 2 cases.
167  if (auto *CSize = dyn_cast<ConstantSDNode>(Size)) {
168  uint64_t Bytes = CSize->getZExtValue();
169  assert(Bytes > 0 && "Caller should have handled 0-size case");
170  CCReg = emitMemMemImm(DAG, DL, SystemZISD::CLC, Chain, Src2, Src1, Bytes);
171  } else
172  CCReg = emitMemMemReg(DAG, DL, SystemZISD::CLC, Chain, Src2, Src1, Size);
173  Chain = CCReg.getValue(1);
174  return std::make_pair(addIPMSequence(DL, CCReg, DAG), Chain);
175 }
176 
178  SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src,
179  SDValue Char, SDValue Length, MachinePointerInfo SrcPtrInfo) const {
180  // Use SRST to find the character. End is its address on success.
181  EVT PtrVT = Src.getValueType();
182  SDVTList VTs = DAG.getVTList(PtrVT, MVT::i32, MVT::Other);
183  Length = DAG.getZExtOrTrunc(Length, DL, PtrVT);
184  Char = DAG.getZExtOrTrunc(Char, DL, MVT::i32);
185  Char = DAG.getNode(ISD::AND, DL, MVT::i32, Char,
186  DAG.getConstant(255, DL, MVT::i32));
187  SDValue Limit = DAG.getNode(ISD::ADD, DL, PtrVT, Src, Length);
188  SDValue End = DAG.getNode(SystemZISD::SEARCH_STRING, DL, VTs, Chain,
189  Limit, Src, Char);
190  SDValue CCReg = End.getValue(1);
191  Chain = End.getValue(2);
192 
193  // Now select between End and null, depending on whether the character
194  // was found.
195  SDValue Ops[] = {
196  End, DAG.getConstant(0, DL, PtrVT),
199  End = DAG.getNode(SystemZISD::SELECT_CCMASK, DL, PtrVT, Ops);
200  return std::make_pair(End, Chain);
201 }
202 
204  SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dest,
205  SDValue Src, MachinePointerInfo DestPtrInfo, MachinePointerInfo SrcPtrInfo,
206  bool isStpcpy) const {
207  SDVTList VTs = DAG.getVTList(Dest.getValueType(), MVT::Other);
208  SDValue EndDest = DAG.getNode(SystemZISD::STPCPY, DL, VTs, Chain, Dest, Src,
209  DAG.getConstant(0, DL, MVT::i32));
210  return std::make_pair(isStpcpy ? EndDest : Dest, EndDest.getValue(1));
211 }
212 
214  SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src1,
215  SDValue Src2, MachinePointerInfo Op1PtrInfo,
216  MachinePointerInfo Op2PtrInfo) const {
217  SDVTList VTs = DAG.getVTList(Src1.getValueType(), MVT::i32, MVT::Other);
218  // Swap operands to invert CC == 1 vs. CC == 2 cases.
219  SDValue Unused = DAG.getNode(SystemZISD::STRCMP, DL, VTs, Chain, Src2, Src1,
220  DAG.getConstant(0, DL, MVT::i32));
221  SDValue CCReg = Unused.getValue(1);
222  Chain = Unused.getValue(2);
223  return std::make_pair(addIPMSequence(DL, CCReg, DAG), Chain);
224 }
225 
226 // Search from Src for a null character, stopping once Src reaches Limit.
227 // Return a pair of values, the first being the number of nonnull characters
228 // and the second being the out chain.
229 //
230 // This can be used for strlen by setting Limit to 0.
231 static std::pair<SDValue, SDValue> getBoundedStrlen(SelectionDAG &DAG,
232  const SDLoc &DL,
233  SDValue Chain, SDValue Src,
234  SDValue Limit) {
235  EVT PtrVT = Src.getValueType();
236  SDVTList VTs = DAG.getVTList(PtrVT, MVT::i32, MVT::Other);
237  SDValue End = DAG.getNode(SystemZISD::SEARCH_STRING, DL, VTs, Chain,
238  Limit, Src, DAG.getConstant(0, DL, MVT::i32));
239  Chain = End.getValue(2);
240  SDValue Len = DAG.getNode(ISD::SUB, DL, PtrVT, End, Src);
241  return std::make_pair(Len, Chain);
242 }
243 
245  SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src,
246  MachinePointerInfo SrcPtrInfo) const {
247  EVT PtrVT = Src.getValueType();
248  return getBoundedStrlen(DAG, DL, Chain, Src, DAG.getConstant(0, DL, PtrVT));
249 }
250 
252  SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src,
253  SDValue MaxLength, MachinePointerInfo SrcPtrInfo) const {
254  EVT PtrVT = Src.getValueType();
255  MaxLength = DAG.getZExtOrTrunc(MaxLength, DL, PtrVT);
256  SDValue Limit = DAG.getNode(ISD::ADD, DL, PtrVT, Src, MaxLength);
257  return getBoundedStrlen(DAG, DL, Chain, Src, Limit);
258 }
llvm::ISD::SUB
@ SUB
Definition: ISDOpcodes.h:240
llvm::Check::Size
@ Size
Definition: FileCheck.h:73
llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrcmp
std::pair< SDValue, SDValue > EmitTargetCodeForStrcmp(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src1, SDValue Src2, MachinePointerInfo Op1PtrInfo, MachinePointerInfo Op2PtrInfo) const override
Emit target-specific code that performs a strcmp, in cases where that is faster than a libcall.
Definition: SystemZSelectionDAGInfo.cpp:213
llvm::SystemZISD::SELECT_CCMASK
@ SELECT_CCMASK
Definition: SystemZISelLowering.h:77
memsetStore
static SDValue memsetStore(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dst, uint64_t ByteVal, uint64_t Size, unsigned Align, MachinePointerInfo DstPtrInfo)
Definition: SystemZSelectionDAGInfo.cpp:62
llvm
This file implements support for optimizing divisions by a constant.
Definition: AllocatorList.h:23
llvm::SDLoc
Wrapper class for IR location info (IR ordering and DebugLoc) to be passed into SDNode creation funct...
Definition: SelectionDAGNodes.h:1086
getBoundedStrlen
static std::pair< SDValue, SDValue > getBoundedStrlen(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src, SDValue Limit)
Definition: SystemZSelectionDAGInfo.cpp:231
llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrnlen
std::pair< SDValue, SDValue > EmitTargetCodeForStrnlen(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src, SDValue MaxLength, MachinePointerInfo SrcPtrInfo) const override
Definition: SystemZSelectionDAGInfo.cpp:251
emitMemMemReg
static SDValue emitMemMemReg(SelectionDAG &DAG, const SDLoc &DL, unsigned Op, SDValue Chain, SDValue Dst, SDValue Src, SDValue Size)
Definition: SystemZSelectionDAGInfo.cpp:36
llvm::SelectionDAG::getVTList
SDVTList getVTList(EVT VT)
Return an SDVTList that represents the list of values specified.
Definition: SelectionDAG.cpp:8580
llvm::SystemZISD::CLC
@ CLC
Definition: SystemZISelLowering.h:127
llvm::SelectionDAG::getStore
SDValue getStore(SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr, MachinePointerInfo PtrInfo, Align Alignment, MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const AAMDNodes &AAInfo=AAMDNodes())
Helper function to build ISD::STORE nodes.
Definition: SelectionDAG.cpp:7541
emitMemMemImm
static SDValue emitMemMemImm(SelectionDAG &DAG, const SDLoc &DL, unsigned Op, SDValue Chain, SDValue Dst, SDValue Src, uint64_t Size)
Definition: SystemZSelectionDAGInfo.cpp:29
llvm::SelectionDAG::getZExtOrTrunc
SDValue getZExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT)
Convert Op, which must be of integer type, to the integer type VT, by either zero-extending or trunca...
Definition: SelectionDAG.cpp:1325
SelectionDAG.h
llvm::SystemZ::CCMASK_SRST_FOUND
const unsigned CCMASK_SRST_FOUND
Definition: SystemZ.h:71
addIPMSequence
static SDValue addIPMSequence(const SDLoc &DL, SDValue CCReg, SelectionDAG &DAG)
Definition: SystemZSelectionDAGInfo.cpp:151
llvm::SDValue::getValueType
EVT getValueType() const
Return the ValueType of the referenced return value.
Definition: SelectionDAGNodes.h:1121
llvm::SelectionDAG
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
Definition: SelectionDAG.h:216
getMemMemVTs
static SDVTList getMemMemVTs(unsigned Op, SelectionDAG &DAG)
Definition: SystemZSelectionDAGInfo.cpp:20
llvm::EVT
Extended Value Type.
Definition: ValueTypes.h:35
llvm::SelectionDAG::getConstant
SDValue getConstant(uint64_t Val, const SDLoc &DL, EVT VT, bool isTarget=false, bool isOpaque=false)
Create a ConstantSDNode wrapping a constant value.
Definition: SelectionDAG.cpp:1395
llvm::ISD::SRA
@ SRA
Definition: ISDOpcodes.h:658
llvm::SystemZISD::STRCMP
@ STRCMP
Definition: SystemZISelLowering.h:134
llvm::ISD::AND
@ AND
Bitwise operators - logical and, logical or, logical xor.
Definition: ISDOpcodes.h:632
llvm::Align
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:39
llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrcpy
std::pair< SDValue, SDValue > EmitTargetCodeForStrcpy(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dest, SDValue Src, MachinePointerInfo DestPtrInfo, MachinePointerInfo SrcPtrInfo, bool isStpcpy) const override
Emit target-specific code that performs a strcpy or stpcpy, in cases where that is faster than a libc...
Definition: SystemZSelectionDAGInfo.cpp:203
llvm::countPopulation
unsigned countPopulation(T Value)
Count the number of set bits in a value.
Definition: MathExtras.h:567
SystemZTargetMachine.h
llvm::SystemZ::CCMASK_SRST
const unsigned CCMASK_SRST
Definition: SystemZ.h:73
llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrlen
std::pair< SDValue, SDValue > EmitTargetCodeForStrlen(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src, MachinePointerInfo SrcPtrInfo) const override
Definition: SystemZSelectionDAGInfo.cpp:244
uint64_t
llvm::SystemZISD::MVC
@ MVC
Definition: SystemZISelLowering.h:118
llvm::MachinePointerInfo
This class contains a discriminated union of information about pointers in memory operands,...
Definition: MachineMemOperand.h:38
I
#define I(x, y, z)
Definition: MD5.cpp:59
llvm::SystemZSelectionDAGInfo::EmitTargetCodeForMemchr
std::pair< SDValue, SDValue > EmitTargetCodeForMemchr(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src, SDValue Char, SDValue Length, MachinePointerInfo SrcPtrInfo) const override
Emit target-specific code that performs a memchr, in cases where that is faster than a libcall.
Definition: SystemZSelectionDAGInfo.cpp:177
llvm::SelectionDAG::getNode
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, ArrayRef< SDUse > Ops)
Gets or creates the specified node.
Definition: SelectionDAG.cpp:8345
llvm::SystemZISD::XC
@ XC
Definition: SystemZISelLowering.h:123
llvm::SDValue::getValue
SDValue getValue(unsigned R) const
Definition: SelectionDAGNodes.h:172
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::MVT::Other
@ Other
Definition: MachineValueType.h:42
llvm::SystemZISD::SEARCH_STRING
@ SEARCH_STRING
Definition: SystemZISelLowering.h:140
llvm::findLastSet
T findLastSet(T Val, ZeroBehavior ZB=ZB_Max)
Get the index of the last set bit starting from the least significant bit.
Definition: MathExtras.h:280
llvm::MachinePointerInfo::getWithOffset
MachinePointerInfo getWithOffset(int64_t O) const
Definition: MachineMemOperand.h:80
llvm::min
Expected< ExpressionValue > min(const ExpressionValue &Lhs, const ExpressionValue &Rhs)
Definition: FileCheck.cpp:357
llvm::MVT::i64
@ i64
Definition: MachineValueType.h:47
DL
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Definition: AArch64SLSHardening.cpp:76
llvm::SystemZSelectionDAGInfo::EmitTargetCodeForMemcpy
SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dst, SDValue Src, SDValue Size, Align Alignment, bool IsVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const override
Emit target-specific code that performs a memcpy.
Definition: SystemZSelectionDAGInfo.cpp:45
llvm::AMDGPU::HSAMD::Kernel::Arg::Key::IsVolatile
constexpr char IsVolatile[]
Key for Kernel::Arg::Metadata::mIsVolatile.
Definition: AMDGPUMetadata.h:194
llvm::SDVTList
This represents a list of ValueType's that has been intern'd by a SelectionDAG.
Definition: SelectionDAGNodes.h:79
llvm::AMDGPU::SendMsg::Op
Op
Definition: SIDefines.h:324
llvm::Align::value
uint64_t value() const
This is a hole in the type system and should not be abused.
Definition: Alignment.h:85
llvm::SystemZ::IPM_CC
const unsigned IPM_CC
Definition: SystemZ.h:111
llvm::MVT::i32
@ i32
Definition: MachineValueType.h:46
llvm::SystemZSelectionDAGInfo::EmitTargetCodeForMemcmp
std::pair< SDValue, SDValue > EmitTargetCodeForMemcmp(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src1, SDValue Src2, SDValue Size, MachinePointerInfo Op1PtrInfo, MachinePointerInfo Op2PtrInfo) const override
Emit target-specific code that performs a memcmp/bcmp, in cases where that is faster than a libcall.
Definition: SystemZSelectionDAGInfo.cpp:161
llvm::SDValue
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
Definition: SelectionDAGNodes.h:138
llvm::ISD::ADD
@ ADD
Simple integer binary arithmetic operators.
Definition: ISDOpcodes.h:239
llvm::ISD::SHL
@ SHL
Shift and rotation operations.
Definition: ISDOpcodes.h:657
llvm::SelectionDAG::getTargetConstant
SDValue getTargetConstant(uint64_t Val, const SDLoc &DL, EVT VT, bool isOpaque=false)
Definition: SelectionDAG.h:637
llvm::SystemZISD::STPCPY
@ STPCPY
Definition: SystemZISelLowering.h:130
llvm::SystemZISD::IPM
@ IPM
Definition: SystemZISelLowering.h:143
llvm::ISD::TokenFactor
@ TokenFactor
TokenFactor - This node takes multiple tokens as input and produces a single token result.
Definition: ISDOpcodes.h:52
llvm::SystemZSelectionDAGInfo::EmitTargetCodeForMemset
SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dst, SDValue Byte, SDValue Size, Align Alignment, bool IsVolatile, MachinePointerInfo DstPtrInfo) const override
Emit target-specific code that performs a memset.
Definition: SystemZSelectionDAGInfo.cpp:73
llvm::MVT::getIntegerVT
static MVT getIntegerVT(unsigned BitWidth)
Definition: MachineValueType.h:1158