LLVM 18.0.0git
X86LegalizerInfo.h
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1//===- X86LegalizerInfo.h ------------------------------------------*- C++
2//-*-==//
3//
4// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
5// See https://llvm.org/LICENSE.txt for license information.
6// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7//
8//===----------------------------------------------------------------------===//
9/// \file
10/// This file declares the targeting of the Machinelegalizer class for X86.
11/// \todo This should be generated by TableGen.
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_LIB_TARGET_X86_X86MACHINELEGALIZER_H
15#define LLVM_LIB_TARGET_X86_X86MACHINELEGALIZER_H
16
18
19namespace llvm {
20
21class X86Subtarget;
22class X86TargetMachine;
23
24/// This class provides the information for the target register banks.
26private:
27 /// Keep a reference to the X86Subtarget around so that we can
28 /// make the right decision when generating code for different targets.
29 const X86Subtarget &Subtarget;
30
31public:
33
35 MachineInstr &MI) const override;
36};
37} // namespace llvm
38#endif
IRTranslator LLVM IR MI
Interface for Targets to specify which operations they can successfully select and how the others sho...
const char LLVMTargetMachineRef TM
Representation of each machine instruction.
Definition: MachineInstr.h:68
This class provides the information for the target register banks.
bool legalizeIntrinsic(LegalizerHelper &Helper, MachineInstr &MI) const override
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18