LLVM  16.0.0git
LegalizerHelper.h
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1 //== llvm/CodeGen/GlobalISel/LegalizerHelper.h ---------------- -*- C++ -*-==//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 /// \file A pass to convert the target-illegal operations created by IR -> MIR
10 /// translation into ones the target expects to be able to select. This may
11 /// occur in multiple phases, for example G_ADD <2 x i8> -> G_ADD <2 x i16> ->
12 /// G_ADD <4 x i16>.
13 ///
14 /// The LegalizerHelper class is where most of the work happens, and is
15 /// designed to be callable from other passes that find themselves with an
16 /// illegal instruction.
17 //
18 //===----------------------------------------------------------------------===//
19 
20 #ifndef LLVM_CODEGEN_GLOBALISEL_LEGALIZERHELPER_H
21 #define LLVM_CODEGEN_GLOBALISEL_LEGALIZERHELPER_H
22 
26 
27 namespace llvm {
28 // Forward declarations.
29 class APInt;
30 class GAnyLoad;
31 class GLoadStore;
32 class GStore;
33 class GenericMachineInstr;
34 class MachineFunction;
35 class MachineIRBuilder;
36 class MachineInstr;
37 class MachineInstrBuilder;
38 struct MachinePointerInfo;
39 template <typename T> class SmallVectorImpl;
40 class LegalizerInfo;
41 class MachineRegisterInfo;
42 class GISelChangeObserver;
43 class LostDebugLocObserver;
44 class TargetLowering;
45 
47 public:
48  /// Expose MIRBuilder so clients can set their own RecordInsertInstruction
49  /// functions
51 
52  /// To keep track of changes made by the LegalizerHelper.
54 
55 private:
57  const LegalizerInfo &LI;
58  const TargetLowering &TLI;
59 
60 public:
62  /// Instruction was already legal and no change was made to the
63  /// MachineFunction.
65 
66  /// Instruction has been legalized and the MachineFunction changed.
68 
69  /// Some kind of error has occurred and we could not legalize this
70  /// instruction.
72  };
73 
74  /// Expose LegalizerInfo so the clients can re-use.
75  const LegalizerInfo &getLegalizerInfo() const { return LI; }
76  const TargetLowering &getTargetLowering() const { return TLI; }
77 
82 
83  /// Replace \p MI by a sequence of legal instructions that can implement the
84  /// same operation. Note that this means \p MI may be deleted, so any iterator
85  /// steps should be performed before calling this function. \p Helper should
86  /// be initialized to the MachineFunction containing \p MI.
87  ///
88  /// Considered as an opaque blob, the legal code will use and define the same
89  /// registers as \p MI.
91  LostDebugLocObserver &LocObserver);
92 
93  /// Legalize an instruction by emiting a runtime library call instead.
95 
96  /// Legalize an instruction by reducing the width of the underlying scalar
97  /// type.
98  LegalizeResult narrowScalar(MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy);
99 
100  /// Legalize an instruction by performing the operation on a wider scalar type
101  /// (for example a 16-bit addition can be safely performed at 32-bits
102  /// precision, ignoring the unused bits).
103  LegalizeResult widenScalar(MachineInstr &MI, unsigned TypeIdx, LLT WideTy);
104 
105  /// Legalize an instruction by replacing the value type
106  LegalizeResult bitcast(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
107 
108  /// Legalize an instruction by splitting it into simpler parts, hopefully
109  /// understood by the target.
110  LegalizeResult lower(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
111 
112  /// Legalize a vector instruction by splitting into multiple components, each
113  /// acting on the same scalar type as the original but with fewer elements.
115  LLT NarrowTy);
116 
117  /// Legalize a vector instruction by increasing the number of vector elements
118  /// involved and ignoring the added elements later.
120  LLT MoreTy);
121 
122  /// Cast the given value to an LLT::scalar with an equivalent size. Returns
123  /// the register to use if an instruction was inserted. Returns the original
124  /// register if no coercion was necessary.
125  //
126  // This may also fail and return Register() if there is no legal way to cast.
128 
129  /// Legalize a single operand \p OpIdx of the machine instruction \p MI as a
130  /// Use by extending the operand's type to \p WideTy using the specified \p
131  /// ExtOpcode for the extension instruction, and replacing the vreg of the
132  /// operand in place.
133  void widenScalarSrc(MachineInstr &MI, LLT WideTy, unsigned OpIdx,
134  unsigned ExtOpcode);
135 
136  /// Legalize a single operand \p OpIdx of the machine instruction \p MI as a
137  /// Use by truncating the operand's type to \p NarrowTy using G_TRUNC, and
138  /// replacing the vreg of the operand in place.
139  void narrowScalarSrc(MachineInstr &MI, LLT NarrowTy, unsigned OpIdx);
140 
141  /// Legalize a single operand \p OpIdx of the machine instruction \p MI as a
142  /// Def by extending the operand's type to \p WideTy and truncating it back
143  /// with the \p TruncOpcode, and replacing the vreg of the operand in place.
144  void widenScalarDst(MachineInstr &MI, LLT WideTy, unsigned OpIdx = 0,
145  unsigned TruncOpcode = TargetOpcode::G_TRUNC);
146 
147  // Legalize a single operand \p OpIdx of the machine instruction \p MI as a
148  // Def by truncating the operand's type to \p NarrowTy, replacing in place and
149  // extending back with \p ExtOpcode.
150  void narrowScalarDst(MachineInstr &MI, LLT NarrowTy, unsigned OpIdx,
151  unsigned ExtOpcode);
152  /// Legalize a single operand \p OpIdx of the machine instruction \p MI as a
153  /// Def by performing it with additional vector elements and extracting the
154  /// result elements, and replacing the vreg of the operand in place.
155  void moreElementsVectorDst(MachineInstr &MI, LLT MoreTy, unsigned OpIdx);
156 
157  /// Legalize a single operand \p OpIdx of the machine instruction \p MI as a
158  /// Use by producing a vector with undefined high elements, extracting the
159  /// original vector type, and replacing the vreg of the operand in place.
160  void moreElementsVectorSrc(MachineInstr &MI, LLT MoreTy, unsigned OpIdx);
161 
162  /// Legalize a single operand \p OpIdx of the machine instruction \p MI as a
163  /// use by inserting a G_BITCAST to \p CastTy
164  void bitcastSrc(MachineInstr &MI, LLT CastTy, unsigned OpIdx);
165 
166  /// Legalize a single operand \p OpIdx of the machine instruction \p MI as a
167  /// def by inserting a G_BITCAST from \p CastTy
168  void bitcastDst(MachineInstr &MI, LLT CastTy, unsigned OpIdx);
169 
170 private:
172  widenScalarMergeValues(MachineInstr &MI, unsigned TypeIdx, LLT WideTy);
174  widenScalarUnmergeValues(MachineInstr &MI, unsigned TypeIdx, LLT WideTy);
176  widenScalarExtract(MachineInstr &MI, unsigned TypeIdx, LLT WideTy);
178  widenScalarInsert(MachineInstr &MI, unsigned TypeIdx, LLT WideTy);
179  LegalizeResult widenScalarAddSubOverflow(MachineInstr &MI, unsigned TypeIdx,
180  LLT WideTy);
181  LegalizeResult widenScalarAddSubShlSat(MachineInstr &MI, unsigned TypeIdx,
182  LLT WideTy);
183  LegalizeResult widenScalarMulo(MachineInstr &MI, unsigned TypeIdx,
184  LLT WideTy);
185 
186  /// Helper function to split a wide generic register into bitwise blocks with
187  /// the given Type (which implies the number of blocks needed). The generic
188  /// registers created are appended to Ops, starting at bit 0 of Reg.
189  void extractParts(Register Reg, LLT Ty, int NumParts,
191 
192  /// Version which handles irregular splits.
193  bool extractParts(Register Reg, LLT RegTy, LLT MainTy,
194  LLT &LeftoverTy,
196  SmallVectorImpl<Register> &LeftoverVRegs);
197 
198  /// Version which handles irregular sub-vector splits.
199  void extractVectorParts(Register Reg, unsigned NumElst,
201 
202  /// Helper function to build a wide generic register \p DstReg of type \p
203  /// RegTy from smaller parts. This will produce a G_MERGE_VALUES,
204  /// G_BUILD_VECTOR, G_CONCAT_VECTORS, or sequence of G_INSERT as appropriate
205  /// for the types.
206  ///
207  /// \p PartRegs must be registers of type \p PartTy.
208  ///
209  /// If \p ResultTy does not evenly break into \p PartTy sized pieces, the
210  /// remainder must be specified with \p LeftoverRegs of type \p LeftoverTy.
211  void insertParts(Register DstReg, LLT ResultTy,
212  LLT PartTy, ArrayRef<Register> PartRegs,
213  LLT LeftoverTy = LLT(), ArrayRef<Register> LeftoverRegs = {});
214 
215  /// Merge \p PartRegs with different types into \p DstReg.
216  void mergeMixedSubvectors(Register DstReg, ArrayRef<Register> PartRegs);
217 
218  void appendVectorElts(SmallVectorImpl<Register> &Elts, Register Reg);
219 
220  /// Unmerge \p SrcReg into smaller sized values, and append them to \p
221  /// Parts. The elements of \p Parts will be the greatest common divisor type
222  /// of \p DstTy, \p NarrowTy and the type of \p SrcReg. This will compute and
223  /// return the GCD type.
224  LLT extractGCDType(SmallVectorImpl<Register> &Parts, LLT DstTy,
225  LLT NarrowTy, Register SrcReg);
226 
227  /// Unmerge \p SrcReg into \p GCDTy typed registers. This will append all of
228  /// the unpacked registers to \p Parts. This version is if the common unmerge
229  /// type is already known.
230  void extractGCDType(SmallVectorImpl<Register> &Parts, LLT GCDTy,
231  Register SrcReg);
232 
233  /// Produce a merge of values in \p VRegs to define \p DstReg. Perform a merge
234  /// from the least common multiple type, and convert as appropriate to \p
235  /// DstReg.
236  ///
237  /// \p VRegs should each have type \p GCDTy. This type should be greatest
238  /// common divisor type of \p DstReg, \p NarrowTy, and an undetermined source
239  /// type.
240  ///
241  /// \p NarrowTy is the desired result merge source type. If the source value
242  /// needs to be widened to evenly cover \p DstReg, inserts high bits
243  /// corresponding to the extension opcode \p PadStrategy.
244  ///
245  /// \p VRegs will be cleared, and the the result \p NarrowTy register pieces
246  /// will replace it. Returns The complete LCMTy that \p VRegs will cover when
247  /// merged.
248  LLT buildLCMMergePieces(LLT DstTy, LLT NarrowTy, LLT GCDTy,
249  SmallVectorImpl<Register> &VRegs,
250  unsigned PadStrategy = TargetOpcode::G_ANYEXT);
251 
252  /// Merge the values in \p RemergeRegs to an \p LCMTy typed value. Extract the
253  /// low bits into \p DstReg. This is intended to use the outputs from
254  /// buildLCMMergePieces after processing.
255  void buildWidenedRemergeToDst(Register DstReg, LLT LCMTy,
256  ArrayRef<Register> RemergeRegs);
257 
258  /// Perform generic multiplication of values held in multiple registers.
259  /// Generated instructions use only types NarrowTy and i1.
260  /// Destination can be same or two times size of the source.
261  void multiplyRegisters(SmallVectorImpl<Register> &DstRegs,
262  ArrayRef<Register> Src1Regs,
263  ArrayRef<Register> Src2Regs, LLT NarrowTy);
264 
265  void changeOpcode(MachineInstr &MI, unsigned NewOpcode);
266 
267  LegalizeResult tryNarrowPow2Reduction(MachineInstr &MI, Register SrcReg,
268  LLT SrcTy, LLT NarrowTy,
269  unsigned ScalarOpc);
270 
271  // Memcpy family legalization helpers.
272  LegalizeResult lowerMemset(MachineInstr &MI, Register Dst, Register Val,
273  uint64_t KnownLen, Align Alignment,
274  bool IsVolatile);
275  LegalizeResult lowerMemcpyInline(MachineInstr &MI, Register Dst, Register Src,
276  uint64_t KnownLen, Align DstAlign,
277  Align SrcAlign, bool IsVolatile);
278  LegalizeResult lowerMemcpy(MachineInstr &MI, Register Dst, Register Src,
279  uint64_t KnownLen, uint64_t Limit, Align DstAlign,
280  Align SrcAlign, bool IsVolatile);
281  LegalizeResult lowerMemmove(MachineInstr &MI, Register Dst, Register Src,
282  uint64_t KnownLen, Align DstAlign, Align SrcAlign,
283  bool IsVolatile);
284 
285 public:
286  /// Return the alignment to use for a stack temporary object with the given
287  /// type.
288  Align getStackTemporaryAlignment(LLT Type, Align MinAlign = Align()) const;
289 
290  /// Create a stack temporary based on the size in bytes and the alignment
291  MachineInstrBuilder createStackTemporary(TypeSize Bytes, Align Alignment,
292  MachinePointerInfo &PtrInfo);
293 
294  /// Get a pointer to vector element \p Index located in memory for a vector of
295  /// type \p VecTy starting at a base address of \p VecPtr. If \p Index is out
296  /// of bounds the returned pointer is unspecified, but will be within the
297  /// vector bounds.
298  Register getVectorElementPointer(Register VecPtr, LLT VecTy, Register Index);
299 
300  /// Handles most opcodes. Split \p MI into same instruction on sub-vectors or
301  /// scalars with \p NumElts elements (1 for scalar). Supports uneven splits:
302  /// there can be leftover sub-vector with fewer then \p NumElts or a leftover
303  /// scalar. To avoid this use moreElements first and set MI number of elements
304  /// to multiple of \p NumElts. Non-vector operands that should be used on all
305  /// sub-instructions without split are listed in \p NonVecOpIndices.
307  GenericMachineInstr &MI, unsigned NumElts,
308  std::initializer_list<unsigned> NonVecOpIndices = {});
309 
310  LegalizeResult fewerElementsVectorPhi(GenericMachineInstr &MI,
311  unsigned NumElts);
312 
313  LegalizeResult moreElementsVectorPhi(MachineInstr &MI, unsigned TypeIdx,
314  LLT MoreTy);
315  LegalizeResult moreElementsVectorShuffle(MachineInstr &MI, unsigned TypeIdx,
316  LLT MoreTy);
317 
319  unsigned TypeIdx,
320  LLT NarrowTy);
321  LegalizeResult fewerElementsVectorMerge(MachineInstr &MI, unsigned TypeIdx,
322  LLT NarrowTy);
324  unsigned TypeIdx,
325  LLT NarrowTy);
326 
327  LegalizeResult reduceLoadStoreWidth(GLoadStore &MI, unsigned TypeIdx,
328  LLT NarrowTy);
329 
330  LegalizeResult narrowScalarShiftByConstant(MachineInstr &MI, const APInt &Amt,
331  LLT HalfTy, LLT ShiftAmtTy);
332 
334  unsigned TypeIdx, LLT NarrowTy);
335 
336  LegalizeResult fewerElementsVectorShuffle(MachineInstr &MI, unsigned TypeIdx,
337  LLT NarrowTy);
338 
339  LegalizeResult narrowScalarShift(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
340  LegalizeResult narrowScalarAddSub(MachineInstr &MI, unsigned TypeIdx,
341  LLT NarrowTy);
342  LegalizeResult narrowScalarMul(MachineInstr &MI, LLT Ty);
343  LegalizeResult narrowScalarFPTOI(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
344  LegalizeResult narrowScalarExtract(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
345  LegalizeResult narrowScalarInsert(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
346 
347  LegalizeResult narrowScalarBasic(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
348  LegalizeResult narrowScalarExt(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
349  LegalizeResult narrowScalarSelect(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
350  LegalizeResult narrowScalarCTLZ(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
351  LegalizeResult narrowScalarCTTZ(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
352  LegalizeResult narrowScalarCTPOP(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
353 
354  /// Perform Bitcast legalize action on G_EXTRACT_VECTOR_ELT.
355  LegalizeResult bitcastExtractVectorElt(MachineInstr &MI, unsigned TypeIdx,
356  LLT CastTy);
357 
358  /// Perform Bitcast legalize action on G_INSERT_VECTOR_ELT.
359  LegalizeResult bitcastInsertVectorElt(MachineInstr &MI, unsigned TypeIdx,
360  LLT CastTy);
361 
362  LegalizeResult lowerBitcast(MachineInstr &MI);
363  LegalizeResult lowerLoad(GAnyLoad &MI);
364  LegalizeResult lowerStore(GStore &MI);
365  LegalizeResult lowerBitCount(MachineInstr &MI);
368  LegalizeResult lowerFunnelShift(MachineInstr &MI);
370  LegalizeResult lowerRotate(MachineInstr &MI);
371 
372  LegalizeResult lowerU64ToF32BitOps(MachineInstr &MI);
373  LegalizeResult lowerUITOFP(MachineInstr &MI);
374  LegalizeResult lowerSITOFP(MachineInstr &MI);
375  LegalizeResult lowerFPTOUI(MachineInstr &MI);
376  LegalizeResult lowerFPTOSI(MachineInstr &MI);
377 
379  LegalizeResult lowerFPTRUNC(MachineInstr &MI);
380  LegalizeResult lowerFPOWI(MachineInstr &MI);
381 
382  LegalizeResult lowerMinMax(MachineInstr &MI);
383  LegalizeResult lowerFCopySign(MachineInstr &MI);
384  LegalizeResult lowerFMinNumMaxNum(MachineInstr &MI);
385  LegalizeResult lowerFMad(MachineInstr &MI);
386  LegalizeResult lowerIntrinsicRound(MachineInstr &MI);
387  LegalizeResult lowerFFloor(MachineInstr &MI);
388  LegalizeResult lowerMergeValues(MachineInstr &MI);
389  LegalizeResult lowerUnmergeValues(MachineInstr &MI);
391  LegalizeResult lowerShuffleVector(MachineInstr &MI);
392  LegalizeResult lowerDynStackAlloc(MachineInstr &MI);
393  LegalizeResult lowerExtract(MachineInstr &MI);
394  LegalizeResult lowerInsert(MachineInstr &MI);
395  LegalizeResult lowerSADDO_SSUBO(MachineInstr &MI);
398  LegalizeResult lowerShlSat(MachineInstr &MI);
399  LegalizeResult lowerBswap(MachineInstr &MI);
400  LegalizeResult lowerBitreverse(MachineInstr &MI);
402  LegalizeResult lowerSMULH_UMULH(MachineInstr &MI);
403  LegalizeResult lowerSelect(MachineInstr &MI);
404  LegalizeResult lowerDIVREM(MachineInstr &MI);
405  LegalizeResult lowerAbsToAddXor(MachineInstr &MI);
406  LegalizeResult lowerAbsToMaxNeg(MachineInstr &MI);
407  LegalizeResult lowerVectorReduction(MachineInstr &MI);
408  LegalizeResult lowerMemcpyInline(MachineInstr &MI);
409  LegalizeResult lowerMemCpyFamily(MachineInstr &MI, unsigned MaxLen = 0);
410 };
411 
412 /// Helper function that creates a libcall to the given \p Name using the given
413 /// calling convention \p CC.
415 createLibcall(MachineIRBuilder &MIRBuilder, const char *Name,
416  const CallLowering::ArgInfo &Result,
417  ArrayRef<CallLowering::ArgInfo> Args, CallingConv::ID CC);
418 
419 /// Helper function that creates the given libcall.
421 createLibcall(MachineIRBuilder &MIRBuilder, RTLIB::Libcall Libcall,
422  const CallLowering::ArgInfo &Result,
423  ArrayRef<CallLowering::ArgInfo> Args);
424 
425 /// Create a libcall to memcpy et al.
427 createMemLibcall(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI,
428  MachineInstr &MI, LostDebugLocObserver &LocObserver);
429 
430 } // End namespace llvm.
431 
432 #endif
llvm::LegalizerHelper::createStackTemporary
MachineInstrBuilder createStackTemporary(TypeSize Bytes, Align Alignment, MachinePointerInfo &PtrInfo)
Create a stack temporary based on the size in bytes and the alignment.
Definition: LegalizerHelper.cpp:3553
llvm::LegalizerHelper::narrowScalarShiftByConstant
LegalizeResult narrowScalarShiftByConstant(MachineInstr &MI, const APInt &Amt, LLT HalfTy, LLT ShiftAmtTy)
Definition: LegalizerHelper.cpp:4569
llvm::LegalizerHelper::narrowScalarBasic
LegalizeResult narrowScalarBasic(MachineInstr &MI, unsigned TypeIdx, LLT Ty)
Definition: LegalizerHelper.cpp:5338
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:108
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
llvm::LegalizerHelper::moreElementsVectorPhi
LegalizeResult moreElementsVectorPhi(MachineInstr &MI, unsigned TypeIdx, LLT MoreTy)
Definition: LegalizerHelper.cpp:4767
llvm::LostDebugLocObserver
Definition: LostDebugLocObserver.h:19
llvm::LegalizerHelper::lowerFPTOSI
LegalizeResult lowerFPTOSI(MachineInstr &MI)
Definition: LegalizerHelper.cpp:6106
llvm::LegalizerHelper::libcall
LegalizeResult libcall(MachineInstr &MI, LostDebugLocObserver &LocObserver)
Legalize an instruction by emiting a runtime library call instead.
Definition: LegalizerHelper.cpp:793
llvm::LegalizerHelper::lowerFPTRUNC_F64_TO_F16
LegalizeResult lowerFPTRUNC_F64_TO_F16(MachineInstr &MI)
Definition: LegalizerHelper.cpp:6175
CallLowering.h
llvm::MachineRegisterInfo
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Definition: MachineRegisterInfo.h:50
llvm::LegalizerHelper::lowerFCopySign
LegalizeResult lowerFCopySign(MachineInstr &MI)
Definition: LegalizerHelper.cpp:6340
llvm::LegalizerHelper::lowerBitreverse
LegalizeResult lowerBitreverse(MachineInstr &MI)
Definition: LegalizerHelper.cpp:7145
llvm::X86Disassembler::Reg
Reg
All possible values of the reg field in the ModR/M byte.
Definition: X86DisassemblerDecoder.h:462
llvm::LegalizerHelper::widenScalarSrc
void widenScalarSrc(MachineInstr &MI, LLT WideTy, unsigned OpIdx, unsigned ExtOpcode)
Legalize a single operand OpIdx of the machine instruction MI as a Use by extending the operand's typ...
Definition: LegalizerHelper.cpp:1437
llvm::LegalizerHelper::lowerBitcast
LegalizeResult lowerBitcast(MachineInstr &MI)
Definition: LegalizerHelper.cpp:2631
llvm::LegalizerHelper::lowerExtract
LegalizeResult lowerExtract(MachineInstr &MI)
Definition: LegalizerHelper.cpp:6734
llvm::LegalizerHelper::lowerFPTOUI
LegalizeResult lowerFPTOUI(MachineInstr &MI)
Definition: LegalizerHelper.cpp:6063
llvm::LegalizerHelper::bitcastSrc
void bitcastSrc(MachineInstr &MI, LLT CastTy, unsigned OpIdx)
Legalize a single operand OpIdx of the machine instruction MI as a use by inserting a G_BITCAST to Ca...
Definition: LegalizerHelper.cpp:1486
llvm::RTLIB::Libcall
Libcall
RTLIB::Libcall enum - This enum defines all of the runtime library calls the backend can emit.
Definition: RuntimeLibcalls.h:30
llvm::LegalizerHelper::lowerFMad
LegalizeResult lowerFMad(MachineInstr &MI)
Definition: LegalizerHelper.cpp:6414
llvm::LegalizerHelper::UnableToLegalize
@ UnableToLegalize
Some kind of error has occurred and we could not legalize this instruction.
Definition: LegalizerHelper.h:71
llvm::LegalizerHelper::lowerShlSat
LegalizeResult lowerShlSat(MachineInstr &MI)
Definition: LegalizerHelper.cpp:7065
llvm::LegalizerHelper::lower
LegalizeResult lower(MachineInstr &MI, unsigned TypeIdx, LLT Ty)
Legalize an instruction by splitting it into simpler parts, hopefully understood by the target.
Definition: LegalizerHelper.cpp:3244
llvm::LegalizerHelper::lowerSelect
LegalizeResult lowerSelect(MachineInstr &MI)
Definition: LegalizerHelper.cpp:7223
llvm::LegalizerHelper::lowerDIVREM
LegalizeResult lowerDIVREM(MachineInstr &MI)
Definition: LegalizerHelper.cpp:7282
llvm::LegalizerHelper
Definition: LegalizerHelper.h:46
llvm::LegalizerHelper::lowerAbsToAddXor
LegalizeResult lowerAbsToAddXor(MachineInstr &MI)
Definition: LegalizerHelper.cpp:7299
llvm::LegalizerHelper::lowerFFloor
LegalizeResult lowerFFloor(MachineInstr &MI)
Definition: LegalizerHelper.cpp:6461
llvm::LegalizerHelper::LegalizerHelper
LegalizerHelper(MachineFunction &MF, GISelChangeObserver &Observer, MachineIRBuilder &B)
Definition: LegalizerHelper.cpp:99
llvm::LegalizerHelper::lowerVectorReduction
LegalizeResult lowerVectorReduction(MachineInstr &MI)
Definition: LegalizerHelper.cpp:7331
llvm::LegalizerHelper::moreElementsVectorSrc
void moreElementsVectorSrc(MachineInstr &MI, LLT MoreTy, unsigned OpIdx)
Legalize a single operand OpIdx of the machine instruction MI as a Use by producing a vector with und...
Definition: LegalizerHelper.cpp:1479
llvm::LegalizerHelper::getStackTemporaryAlignment
Align getStackTemporaryAlignment(LLT Type, Align MinAlign=Align()) const
Return the alignment to use for a stack temporary object with the given type.
Definition: LegalizerHelper.cpp:3542
llvm::MinAlign
constexpr uint64_t MinAlign(uint64_t A, uint64_t B)
A and B are either alignments or offsets.
Definition: MathExtras.h:601
llvm::LegalizerHelper::lowerBswap
LegalizeResult lowerBswap(MachineInstr &MI)
Definition: LegalizerHelper.cpp:7099
llvm::LegalizerHelper::lowerFunnelShiftAsShifts
LegalizeResult lowerFunnelShiftAsShifts(MachineInstr &MI)
Definition: LegalizerHelper.cpp:5762
llvm::LegalizerHelper::narrowScalarSelect
LegalizeResult narrowScalarSelect(MachineInstr &MI, unsigned TypeIdx, LLT Ty)
Definition: LegalizerHelper.cpp:5401
llvm::LegalizerHelper::lowerSITOFP
LegalizeResult lowerSITOFP(MachineInstr &MI)
Definition: LegalizerHelper.cpp:6017
llvm::LegalizerHelper::narrowScalarMul
LegalizeResult narrowScalarMul(MachineInstr &MI, LLT Ty)
Definition: LegalizerHelper.cpp:5130
llvm::LegalizerHelper::narrowScalarCTPOP
LegalizeResult narrowScalarCTPOP(MachineInstr &MI, unsigned TypeIdx, LLT Ty)
Definition: LegalizerHelper.cpp:5519
llvm::LegalizerHelper::lowerSADDO_SSUBO
LegalizeResult lowerSADDO_SSUBO(MachineInstr &MI)
Definition: LegalizerHelper.cpp:6884
llvm::LegalizerHelper::lowerShuffleVector
LegalizeResult lowerShuffleVector(MachineInstr &MI)
Definition: LegalizerHelper.cpp:6641
llvm::LegalizerHelper::lowerFPTRUNC
LegalizeResult lowerFPTRUNC(MachineInstr &MI)
Definition: LegalizerHelper.cpp:6280
llvm::LegalizerHelper::narrowScalarCTLZ
LegalizeResult narrowScalarCTLZ(MachineInstr &MI, unsigned TypeIdx, LLT Ty)
Definition: LegalizerHelper.cpp:5447
llvm::LegalizerHelper::moreElementsVectorDst
void moreElementsVectorDst(MachineInstr &MI, LLT MoreTy, unsigned OpIdx)
Legalize a single operand OpIdx of the machine instruction MI as a Def by performing it with addition...
Definition: LegalizerHelper.cpp:1469
llvm::TargetLowering
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
Definition: TargetLowering.h:3434
llvm::LegalizerHelper::narrowScalar
LegalizeResult narrowScalar(MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy)
Legalize an instruction by reducing the width of the underlying scalar type.
Definition: LegalizerHelper.cpp:903
llvm::LegalizerHelper::bitcast
LegalizeResult bitcast(MachineInstr &MI, unsigned TypeIdx, LLT Ty)
Legalize an instruction by replacing the value type.
Definition: LegalizerHelper.cpp:3167
TargetOpcodes.h
B
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
llvm::LegalizerHelper::lowerU64ToF32BitOps
LegalizeResult lowerU64ToF32BitOps(MachineInstr &MI)
Definition: LegalizerHelper.cpp:5933
llvm::LegalizerHelper::fewerElementsVectorMultiEltType
LegalizeResult fewerElementsVectorMultiEltType(GenericMachineInstr &MI, unsigned NumElts, std::initializer_list< unsigned > NonVecOpIndices={})
Handles most opcodes.
Definition: LegalizerHelper.cpp:3693
llvm::LegalizerHelper::lowerInsert
LegalizeResult lowerInsert(MachineInstr &MI)
Definition: LegalizerHelper.cpp:6792
llvm::LegalizerHelper::lowerAddSubSatToMinMax
LegalizeResult lowerAddSubSatToMinMax(MachineInstr &MI)
Definition: LegalizerHelper.cpp:6920
Align
uint64_t Align
Definition: ELFObjHandler.cpp:81
llvm::LegalizerHelper::lowerUITOFP
LegalizeResult lowerUITOFP(MachineInstr &MI)
Definition: LegalizerHelper.cpp:5989
llvm::LegalizerHelper::narrowScalarCTTZ
LegalizeResult narrowScalarCTTZ(MachineInstr &MI, unsigned TypeIdx, LLT Ty)
Definition: LegalizerHelper.cpp:5483
llvm::CallingConv::ID
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
llvm::LegalizerHelper::fewerElementsVector
LegalizeResult fewerElementsVector(MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy)
Legalize a vector instruction by splitting into multiple components, each acting on the same scalar t...
Definition: LegalizerHelper.cpp:4116
llvm::LegalizerHelper::lowerIntrinsicRound
LegalizeResult lowerIntrinsicRound(MachineInstr &MI)
Definition: LegalizerHelper.cpp:6428
llvm::LegalizerHelper::lowerExtractInsertVectorElt
LegalizeResult lowerExtractInsertVectorElt(MachineInstr &MI)
Lower a vector extract or insert by writing the vector to a stack temporary and reloading the element...
Definition: LegalizerHelper.cpp:6569
llvm::LegalizerHelper::getVectorElementPointer
Register getVectorElementPointer(Register VecPtr, LLT VecTy, Register Index)
Get a pointer to vector element Index located in memory for a vector of type VecTy starting at a base...
Definition: LegalizerHelper.cpp:3583
llvm::LegalizerHelper::lowerAbsToMaxNeg
LegalizeResult lowerAbsToMaxNeg(MachineInstr &MI)
Definition: LegalizerHelper.cpp:7316
llvm::LegalizerHelper::lowerFunnelShift
LegalizeResult lowerFunnelShift(MachineInstr &MI)
Definition: LegalizerHelper.cpp:5820
llvm::LegalizerHelper::lowerReadWriteRegister
LegalizeResult lowerReadWriteRegister(MachineInstr &MI)
Definition: LegalizerHelper.cpp:7176
llvm::LegalizerHelper::lowerFunnelShiftWithInverse
LegalizeResult lowerFunnelShiftWithInverse(MachineInstr &MI)
Definition: LegalizerHelper.cpp:5720
llvm::LegalizerHelper::getLegalizerInfo
const LegalizerInfo & getLegalizerInfo() const
Expose LegalizerInfo so the clients can re-use.
Definition: LegalizerHelper.h:75
llvm::LegalizerHelper::fewerElementsVectorPhi
LegalizeResult fewerElementsVectorPhi(GenericMachineInstr &MI, unsigned NumElts)
Definition: LegalizerHelper.cpp:3763
llvm::MachineIRBuilder
Helper class to build MachineInstr.
Definition: MachineIRBuilder.h:221
Index
uint32_t Index
Definition: ELFObjHandler.cpp:82
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:66
uint64_t
RuntimeLibcalls.h
llvm::createLibcall
LegalizerHelper::LegalizeResult createLibcall(MachineIRBuilder &MIRBuilder, const char *Name, const CallLowering::ArgInfo &Result, ArrayRef< CallLowering::ArgInfo > Args, CallingConv::ID CC)
Helper function that creates a libcall to the given Name using the given calling convention CC.
Definition: LegalizerHelper.cpp:632
llvm::LegalizerHelper::narrowScalarAddSub
LegalizeResult narrowScalarAddSub(MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy)
Definition: LegalizerHelper.cpp:5036
llvm::LegalizerHelper::lowerMergeValues
LegalizeResult lowerMergeValues(MachineInstr &MI)
Definition: LegalizerHelper.cpp:6488
llvm::LegalizerHelper::lowerSMULH_UMULH
LegalizeResult lowerSMULH_UMULH(MachineInstr &MI)
Definition: LegalizerHelper.cpp:7202
llvm::LegalizerHelper::lowerMinMax
LegalizeResult lowerMinMax(MachineInstr &MI)
Definition: LegalizerHelper.cpp:6324
llvm::LegalizerHelper::moreElementsVectorShuffle
LegalizeResult moreElementsVectorShuffle(MachineInstr &MI, unsigned TypeIdx, LLT MoreTy)
Definition: LegalizerHelper.cpp:4930
llvm::LegalizerHelper::fewerElementsVectorShuffle
LegalizeResult fewerElementsVectorShuffle(MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy)
Definition: LegalizerHelper.cpp:4257
llvm::LegalizerHelper::narrowScalarDst
void narrowScalarDst(MachineInstr &MI, LLT NarrowTy, unsigned OpIdx, unsigned ExtOpcode)
Definition: LegalizerHelper.cpp:1460
llvm::LegalizerHelper::lowerStore
LegalizeResult lowerStore(GStore &MI)
Definition: LegalizerHelper.cpp:3067
llvm::LegalizerHelper::fewerElementsVectorExtractInsertVectorElt
LegalizeResult fewerElementsVectorExtractInsertVectorElt(MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy)
Definition: LegalizerHelper.cpp:3946
llvm::LegalizerHelper::fewerElementsVectorUnmergeValues
LegalizeResult fewerElementsVectorUnmergeValues(MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy)
Definition: LegalizerHelper.cpp:3811
llvm::LegalizerHelper::widenScalar
LegalizeResult widenScalar(MachineInstr &MI, unsigned TypeIdx, LLT WideTy)
Legalize an instruction by performing the operation on a wider scalar type (for example a 16-bit addi...
Definition: LegalizerHelper.cpp:2028
llvm::LegalizerHelper::narrowScalarExtract
LegalizeResult narrowScalarExtract(MachineInstr &MI, unsigned TypeIdx, LLT Ty)
Definition: LegalizerHelper.cpp:5187
llvm::MachineFunction
Definition: MachineFunction.h:257
llvm::LegalizerHelper::AlreadyLegal
@ AlreadyLegal
Instruction was already legal and no change was made to the MachineFunction.
Definition: LegalizerHelper.h:64
llvm::LegalizerHelper::lowerLoad
LegalizeResult lowerLoad(GAnyLoad &MI)
Definition: LegalizerHelper.cpp:2930
llvm::LegalizerHelper::lowerBitCount
LegalizeResult lowerBitCount(MachineInstr &MI)
Definition: LegalizerHelper.cpp:5544
llvm::LegalizerHelper::narrowScalarExt
LegalizeResult narrowScalarExt(MachineInstr &MI, unsigned TypeIdx, LLT Ty)
Definition: LegalizerHelper.cpp:5379
llvm::ArrayRef
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: APInt.h:32
llvm::LegalizerHelper::Observer
GISelChangeObserver & Observer
To keep track of changes made by the LegalizerHelper.
Definition: LegalizerHelper.h:53
CC
auto CC
Definition: RISCVRedundantCopyElimination.cpp:79
llvm::LegalizerHelper::narrowScalarSrc
void narrowScalarSrc(MachineInstr &MI, LLT NarrowTy, unsigned OpIdx)
Legalize a single operand OpIdx of the machine instruction MI as a Use by truncating the operand's ty...
Definition: LegalizerHelper.cpp:1444
llvm::AMDGPU::HSAMD::Kernel::Arg::Key::IsVolatile
constexpr char IsVolatile[]
Key for Kernel::Arg::Metadata::mIsVolatile.
Definition: AMDGPUMetadata.h:199
llvm::LegalizerHelper::lowerUnmergeValues
LegalizeResult lowerUnmergeValues(MachineInstr &MI)
Definition: LegalizerHelper.cpp:6529
llvm::GISelChangeObserver
Abstract class that contains various methods for clients to notify about changes.
Definition: GISelChangeObserver.h:29
llvm::LegalizerHelper::bitcastDst
void bitcastDst(MachineInstr &MI, LLT CastTy, unsigned OpIdx)
Legalize a single operand OpIdx of the machine instruction MI as a def by inserting a G_BITCAST from ...
Definition: LegalizerHelper.cpp:1491
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
llvm::LegalizerHelper::getTargetLowering
const TargetLowering & getTargetLowering() const
Definition: LegalizerHelper.h:76
llvm::GraphProgram::Name
Name
Definition: GraphWriter.h:50
llvm::LegalizerHelper::widenScalarDst
void widenScalarDst(MachineInstr &MI, LLT WideTy, unsigned OpIdx=0, unsigned TruncOpcode=TargetOpcode::G_TRUNC)
Legalize a single operand OpIdx of the machine instruction MI as a Def by extending the operand's typ...
Definition: LegalizerHelper.cpp:1451
llvm::LegalizerHelper::bitcastInsertVectorElt
LegalizeResult bitcastInsertVectorElt(MachineInstr &MI, unsigned TypeIdx, LLT CastTy)
Perform Bitcast legalize action on G_INSERT_VECTOR_ELT.
Definition: LegalizerHelper.cpp:2867
llvm::LegalizerHelper::lowerMemCpyFamily
LegalizeResult lowerMemCpyFamily(MachineInstr &MI, unsigned MaxLen=0)
Definition: LegalizerHelper.cpp:7833
llvm::LegalizerHelper::narrowScalarShift
LegalizeResult narrowScalarShift(MachineInstr &MI, unsigned TypeIdx, LLT Ty)
Definition: LegalizerHelper.cpp:4658
llvm::LegalizerHelper::lowerAddSubSatToAddoSubo
LegalizeResult lowerAddSubSatToAddoSubo(MachineInstr &MI)
Definition: LegalizerHelper.cpp:6997
llvm::LegalizerHelper::narrowScalarFPTOI
LegalizeResult narrowScalarFPTOI(MachineInstr &MI, unsigned TypeIdx, LLT Ty)
Definition: LegalizerHelper.cpp:5162
llvm::LegalizerHelper::lowerFMinNumMaxNum
LegalizeResult lowerFMinNumMaxNum(MachineInstr &MI)
Definition: LegalizerHelper.cpp:6384
llvm::LegalizerHelper::fewerElementsVectorReductions
LegalizeResult fewerElementsVectorReductions(MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy)
Definition: LegalizerHelper.cpp:4447
llvm::LegalizerHelper::narrowScalarInsert
LegalizeResult narrowScalarInsert(MachineInstr &MI, unsigned TypeIdx, LLT Ty)
Definition: LegalizerHelper.cpp:5254
llvm::LegalizerHelper::lowerFPOWI
LegalizeResult lowerFPOWI(MachineInstr &MI)
Definition: LegalizerHelper.cpp:6297
llvm::LegalizerHelper::lowerDynStackAlloc
LegalizeResult lowerDynStackAlloc(MachineInstr &MI)
Definition: LegalizerHelper.cpp:6697
llvm::LegalizerHelper::LegalizeResult
LegalizeResult
Definition: LegalizerHelper.h:61
llvm::createMemLibcall
LegalizerHelper::LegalizeResult createMemLibcall(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, MachineInstr &MI, LostDebugLocObserver &LocObserver)
Create a libcall to memcpy et al.
Definition: LegalizerHelper.cpp:674
llvm::LegalizerHelper::lowerRotateWithReverseRotate
LegalizeResult lowerRotateWithReverseRotate(MachineInstr &MI)
Definition: LegalizerHelper.cpp:5844
llvm::LegalizerHelper::MIRBuilder
MachineIRBuilder & MIRBuilder
Expose MIRBuilder so clients can set their own RecordInsertInstruction functions.
Definition: LegalizerHelper.h:50
llvm::SmallVectorImpl
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:42
llvm::LegalizerHelper::reduceLoadStoreWidth
LegalizeResult reduceLoadStoreWidth(GLoadStore &MI, unsigned TypeIdx, LLT NarrowTy)
Definition: LegalizerHelper.cpp:4021
llvm::LegalizerInfo
Definition: LegalizerInfo.h:1182
llvm::LegalizerHelper::coerceToScalar
Register coerceToScalar(Register Val)
Cast the given value to an LLT::scalar with an equivalent size.
Definition: LegalizerHelper.cpp:1415
llvm::LegalizerHelper::fewerElementsVectorMerge
LegalizeResult fewerElementsVectorMerge(MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy)
Definition: LegalizerHelper.cpp:3860
llvm::AMDGPU::HSAMD::Kernel::Key::Args
constexpr char Args[]
Key for Kernel::Metadata::mArgs.
Definition: AMDGPUMetadata.h:394
llvm::LegalizerHelper::moreElementsVector
LegalizeResult moreElementsVector(MachineInstr &MI, unsigned TypeIdx, LLT MoreTy)
Legalize a vector instruction by increasing the number of vector elements involved and ignoring the a...
Definition: LegalizerHelper.cpp:4786
llvm::LegalizerHelper::lowerRotate
LegalizeResult lowerRotate(MachineInstr &MI)
Definition: LegalizerHelper.cpp:5858
llvm::LegalizerHelper::legalizeInstrStep
LegalizeResult legalizeInstrStep(MachineInstr &MI, LostDebugLocObserver &LocObserver)
Replace MI by a sequence of legal instructions that can implement the same operation.
Definition: LegalizerHelper.cpp:113
llvm::LegalizerHelper::Legalized
@ Legalized
Instruction has been legalized and the MachineFunction changed.
Definition: LegalizerHelper.h:67
llvm::LegalizerHelper::bitcastExtractVectorElt
LegalizeResult bitcastExtractVectorElt(MachineInstr &MI, unsigned TypeIdx, LLT CastTy)
Perform Bitcast legalize action on G_EXTRACT_VECTOR_ELT.
Definition: LegalizerHelper.cpp:2727
llvm::LLT
Definition: LowLevelTypeImpl.h:39