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AArch64CleanupLocalDynamicTLSPass.cpp
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1 //===-- AArch64CleanupLocalDynamicTLSPass.cpp ---------------------*- C++ -*-=//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // Local-dynamic access to thread-local variables proceeds in three stages.
10 //
11 // 1. The offset of this Module's thread-local area from TPIDR_EL0 is calculated
12 // in much the same way as a general-dynamic TLS-descriptor access against
13 // the special symbol _TLS_MODULE_BASE.
14 // 2. The variable's offset from _TLS_MODULE_BASE_ is calculated using
15 // instructions with "dtprel" modifiers.
16 // 3. These two are added, together with TPIDR_EL0, to obtain the variable's
17 // true address.
18 //
19 // This is only better than general-dynamic access to the variable if two or
20 // more of the first stage TLS-descriptor calculations can be combined. This
21 // pass looks through a function and performs such combinations.
22 //
23 //===----------------------------------------------------------------------===//
24 #include "AArch64.h"
25 #include "AArch64InstrInfo.h"
32 using namespace llvm;
33 
34 #define TLSCLEANUP_PASS_NAME "AArch64 Local Dynamic TLS Access Clean-up"
35 
36 namespace {
37 struct LDTLSCleanup : public MachineFunctionPass {
38  static char ID;
39  LDTLSCleanup() : MachineFunctionPass(ID) {
41  }
42 
43  bool runOnMachineFunction(MachineFunction &MF) override {
44  if (skipFunction(MF.getFunction()))
45  return false;
46 
48  if (AFI->getNumLocalDynamicTLSAccesses() < 2) {
49  // No point folding accesses if there isn't at least two.
50  return false;
51  }
52 
53  MachineDominatorTree *DT = &getAnalysis<MachineDominatorTree>();
54  return VisitNode(DT->getRootNode(), 0);
55  }
56 
57  // Visit the dominator subtree rooted at Node in pre-order.
58  // If TLSBaseAddrReg is non-null, then use that to replace any
59  // TLS_base_addr instructions. Otherwise, create the register
60  // when the first such instruction is seen, and then use it
61  // as we encounter more instructions.
62  bool VisitNode(MachineDomTreeNode *Node, unsigned TLSBaseAddrReg) {
63  MachineBasicBlock *BB = Node->getBlock();
64  bool Changed = false;
65 
66  // Traverse the current block.
67  for (MachineBasicBlock::iterator I = BB->begin(), E = BB->end(); I != E;
68  ++I) {
69  switch (I->getOpcode()) {
71  // Make sure it's a local dynamic access.
72  if (!I->getOperand(0).isSymbol() ||
73  strcmp(I->getOperand(0).getSymbolName(), "_TLS_MODULE_BASE_"))
74  break;
75 
76  if (TLSBaseAddrReg)
77  I = replaceTLSBaseAddrCall(*I, TLSBaseAddrReg);
78  else
79  I = setRegister(*I, &TLSBaseAddrReg);
80  Changed = true;
81  break;
82  default:
83  break;
84  }
85  }
86 
87  // Visit the children of this block in the dominator tree.
88  for (MachineDomTreeNode *N : *Node) {
89  Changed |= VisitNode(N, TLSBaseAddrReg);
90  }
91 
92  return Changed;
93  }
94 
95  // Replace the TLS_base_addr instruction I with a copy from
96  // TLSBaseAddrReg, returning the new instruction.
97  MachineInstr *replaceTLSBaseAddrCall(MachineInstr &I,
98  unsigned TLSBaseAddrReg) {
99  MachineFunction *MF = I.getParent()->getParent();
100  const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
101 
102  // Insert a Copy from TLSBaseAddrReg to x0, which is where the rest of the
103  // code sequence assumes the address will be.
104  MachineInstr *Copy = BuildMI(*I.getParent(), I, I.getDebugLoc(),
105  TII->get(TargetOpcode::COPY), AArch64::X0)
106  .addReg(TLSBaseAddrReg);
107 
108  // Update the call site info.
109  if (I.shouldUpdateCallSiteInfo())
110  I.getMF()->eraseCallSiteInfo(&I);
111 
112  // Erase the TLS_base_addr instruction.
113  I.eraseFromParent();
114 
115  return Copy;
116  }
117 
118  // Create a virtual register in *TLSBaseAddrReg, and populate it by
119  // inserting a copy instruction after I. Returns the new instruction.
120  MachineInstr *setRegister(MachineInstr &I, unsigned *TLSBaseAddrReg) {
121  MachineFunction *MF = I.getParent()->getParent();
122  const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
123 
124  // Create a virtual register for the TLS base address.
125  MachineRegisterInfo &RegInfo = MF->getRegInfo();
126  *TLSBaseAddrReg = RegInfo.createVirtualRegister(&AArch64::GPR64RegClass);
127 
128  // Insert a copy from X0 to TLSBaseAddrReg for later.
129  MachineInstr *Copy =
130  BuildMI(*I.getParent(), ++I.getIterator(), I.getDebugLoc(),
131  TII->get(TargetOpcode::COPY), *TLSBaseAddrReg)
132  .addReg(AArch64::X0);
133 
134  return Copy;
135  }
136 
137  StringRef getPassName() const override { return TLSCLEANUP_PASS_NAME; }
138 
139  void getAnalysisUsage(AnalysisUsage &AU) const override {
140  AU.setPreservesCFG();
143  }
144 };
145 }
146 
147 INITIALIZE_PASS(LDTLSCleanup, "aarch64-local-dynamic-tls-cleanup",
148  TLSCLEANUP_PASS_NAME, false, false)
149 
150 char LDTLSCleanup::ID = 0;
152  return new LDTLSCleanup();
153 }
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AllocatorList.h:23
AArch64MachineFunctionInfo.h
AArch64.h
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Register createVirtualRegister(const TargetRegisterClass *RegClass, StringRef Name="")
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Definition: MachineRegisterInfo.cpp:158
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Definition: MachineRegisterInfo.h:52
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virtual const TargetInstrInfo * getInstrInfo() const
Definition: TargetSubtargetInfo.h:92
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Definition: MachineFunctionPass.h:30
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MachineDomTreeNode * getRootNode() const
Definition: MachineDominators.h:100
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@ TLSDESC_CALLSEQ
Definition: AArch64ISelLowering.h:60
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getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
Definition: MachineFunctionPass.cpp:102
MachineRegisterInfo.h
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getRegInfo - Return information about the registers currently in use.
Definition: MachineFunction.h:644
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TargetInstrInfo - Interface to description of machine instruction set.
Definition: TargetInstrInfo.h:97
AArch64InstrInfo.h
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static PassRegistry * getPassRegistry()
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Definition: PassRegistry.cpp:31
E
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
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Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
Definition: MachineFunction.h:732
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#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
Definition: PassSupport.h:37
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Represent the analysis usage information of a pass.
Definition: PassAnalysisSupport.h:47
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Definition: HexagonCopyToCombine.cpp:129
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unsigned getNumLocalDynamicTLSAccesses() const
Definition: AArch64MachineFunctionInfo.h:300
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Definition: MachineBasicBlock.h:95
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const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Definition: MachineFunction.h:634
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:64
llvm::AArch64FunctionInfo
AArch64FunctionInfo - This class is derived from MachineFunctionInfo and contains private AArch64-spe...
Definition: AArch64MachineFunctionInfo.h:37
I
#define I(x, y, z)
Definition: MD5.cpp:59
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void initializeLDTLSCleanupPass(PassRegistry &)
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const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
Definition: MachineInstrBuilder.h:97
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Definition: MachineFunction.h:234
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void setPreservesCFG()
This function should be called by the pass, iff they do not:
Definition: Pass.cpp:253
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StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:57
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Base class for the actual dominator tree node.
Definition: LiveIntervalCalc.h:24
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Function & getFunction()
Return the LLVM function that this machine code represents.
Definition: MachineFunction.h:600
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#define TLSCLEANUP_PASS_NAME
Definition: AArch64CleanupLocalDynamicTLSPass.cpp:34
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Builder interface. Specify how to create the initial instruction itself.
Definition: MachineInstrBuilder.h:328
N
#define N
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Definition: Pass.h:298
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Common register allocation spilling lr str ldr sxth r3 ldr mla r4 can lr mov lr str ldr sxth r3 mla r4 and then merge mul and lr str ldr sxth r3 mla r4 It also increase the likelihood the store may become dead bb27 Successors according to LLVM BB
Definition: README.txt:39
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AnalysisUsage & addRequired()
Definition: PassAnalysisSupport.h:75
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FunctionPass * createAArch64CleanupLocalDynamicTLSPass()
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Definition: MachineDominators.h:46
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Definition: TargetTransformInfo.h:38