LLVM 20.0.0git
AMDKernelCodeTUtils.cpp
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1//===- AMDKernelCodeTUtils.cpp --------------------------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9/// \file - utility functions to parse/print AMDGPUMCKernelCodeT structure
10//
11//===----------------------------------------------------------------------===//
12
13#include "AMDKernelCodeTUtils.h"
14#include "AMDKernelCodeT.h"
15#include "SIDefines.h"
18#include "llvm/ADT/IndexedMap.h"
19#include "llvm/ADT/StringRef.h"
20#include "llvm/MC/MCContext.h"
21#include "llvm/MC/MCExpr.h"
24#include "llvm/MC/MCStreamer.h"
27
28using namespace llvm;
29using namespace llvm::AMDGPU;
30
31// Generates the following for AMDGPUMCKernelCodeT struct members:
32// - HasMemberXXXXX class
33// A check to see if AMDGPUMCKernelCodeT has a specific member so it can
34// determine which of the original amd_kernel_code_t members are duplicated
35// (if the names don't match, the table driven strategy won't work).
36// - IsMCExprXXXXX class
37// Check whether a AMDGPUMCKernelcodeT struct member is MCExpr-ified or not.
38// - GetMemberXXXXX class
39// A retrieval helper for said member (of type const MCExpr *&). Will return
40// a `Phony` const MCExpr * initialized to nullptr to preserve reference
41// returns.
42#define GEN_HAS_MEMBER(member) \
43 class HasMember##member { \
44 private: \
45 struct KnownWithMember { \
46 int member; \
47 }; \
48 class AmbiguousDerived : public AMDGPUMCKernelCodeT, \
49 public KnownWithMember {}; \
50 template <typename U> \
51 static constexpr std::false_type Test(decltype(U::member) *); \
52 template <typename U> static constexpr std::true_type Test(...); \
53 \
54 public: \
55 static constexpr bool RESULT = \
56 std::is_same_v<decltype(Test<AmbiguousDerived>(nullptr)), \
57 std::true_type>; \
58 }; \
59 class IsMCExpr##member { \
60 template <typename U, \
61 typename std::enable_if_t< \
62 HasMember##member::RESULT && \
63 std::is_same_v<decltype(U::member), const MCExpr *>, \
64 U> * = nullptr> \
65 static constexpr std::true_type HasMCExprType(decltype(U::member) *); \
66 template <typename U> static constexpr std::false_type HasMCExprType(...); \
67 \
68 public: \
69 static constexpr bool RESULT = \
70 std::is_same_v<decltype(HasMCExprType<AMDGPUMCKernelCodeT>(nullptr)), \
71 std::true_type>; \
72 }; \
73 class GetMember##member { \
74 public: \
75 static const MCExpr *Phony; \
76 template <typename U, typename std::enable_if_t<IsMCExpr##member::RESULT, \
77 U> * = nullptr> \
78 static const MCExpr *&Get(U &C) { \
79 assert(IsMCExpr##member::RESULT && \
80 "Trying to retrieve member that does not exist."); \
81 return C.member; \
82 } \
83 template <typename U, typename std::enable_if_t<!IsMCExpr##member::RESULT, \
84 U> * = nullptr> \
85 static const MCExpr *&Get(U &C) { \
86 return Phony; \
87 } \
88 }; \
89 const MCExpr *GetMember##member::Phony = nullptr;
90
91// Cannot generate class declarations using the table driver approach (see table
92// in AMDKernelCodeTInfo.h). Luckily, if any are missing here or eventually
93// added to the table, an error should occur when trying to retrieve the table
94// in getMCExprIndexTable.
95GEN_HAS_MEMBER(amd_code_version_major)
96GEN_HAS_MEMBER(amd_code_version_minor)
97GEN_HAS_MEMBER(amd_machine_kind)
98GEN_HAS_MEMBER(amd_machine_version_major)
99GEN_HAS_MEMBER(amd_machine_version_minor)
100GEN_HAS_MEMBER(amd_machine_version_stepping)
101
102GEN_HAS_MEMBER(kernel_code_entry_byte_offset)
103GEN_HAS_MEMBER(kernel_code_prefetch_byte_size)
104
105GEN_HAS_MEMBER(granulated_workitem_vgpr_count)
106GEN_HAS_MEMBER(granulated_wavefront_sgpr_count)
107GEN_HAS_MEMBER(priority)
108GEN_HAS_MEMBER(float_mode)
109GEN_HAS_MEMBER(priv)
110GEN_HAS_MEMBER(enable_dx10_clamp)
111GEN_HAS_MEMBER(debug_mode)
112GEN_HAS_MEMBER(enable_ieee_mode)
113GEN_HAS_MEMBER(enable_wgp_mode)
114GEN_HAS_MEMBER(enable_mem_ordered)
115GEN_HAS_MEMBER(enable_fwd_progress)
116
117GEN_HAS_MEMBER(enable_sgpr_private_segment_wave_byte_offset)
118GEN_HAS_MEMBER(user_sgpr_count)
119GEN_HAS_MEMBER(enable_trap_handler)
120GEN_HAS_MEMBER(enable_sgpr_workgroup_id_x)
121GEN_HAS_MEMBER(enable_sgpr_workgroup_id_y)
122GEN_HAS_MEMBER(enable_sgpr_workgroup_id_z)
123GEN_HAS_MEMBER(enable_sgpr_workgroup_info)
124GEN_HAS_MEMBER(enable_vgpr_workitem_id)
125GEN_HAS_MEMBER(enable_exception_msb)
126GEN_HAS_MEMBER(granulated_lds_size)
127GEN_HAS_MEMBER(enable_exception)
128
129GEN_HAS_MEMBER(enable_sgpr_private_segment_buffer)
130GEN_HAS_MEMBER(enable_sgpr_dispatch_ptr)
131GEN_HAS_MEMBER(enable_sgpr_queue_ptr)
132GEN_HAS_MEMBER(enable_sgpr_kernarg_segment_ptr)
133GEN_HAS_MEMBER(enable_sgpr_dispatch_id)
134GEN_HAS_MEMBER(enable_sgpr_flat_scratch_init)
135GEN_HAS_MEMBER(enable_sgpr_private_segment_size)
136GEN_HAS_MEMBER(enable_sgpr_grid_workgroup_count_x)
137GEN_HAS_MEMBER(enable_sgpr_grid_workgroup_count_y)
138GEN_HAS_MEMBER(enable_sgpr_grid_workgroup_count_z)
139GEN_HAS_MEMBER(enable_wavefront_size32)
140GEN_HAS_MEMBER(enable_ordered_append_gds)
141GEN_HAS_MEMBER(private_element_size)
142GEN_HAS_MEMBER(is_ptr64)
143GEN_HAS_MEMBER(is_dynamic_callstack)
144GEN_HAS_MEMBER(is_debug_enabled)
145GEN_HAS_MEMBER(is_xnack_enabled)
146
147GEN_HAS_MEMBER(workitem_private_segment_byte_size)
148GEN_HAS_MEMBER(workgroup_group_segment_byte_size)
149GEN_HAS_MEMBER(gds_segment_byte_size)
150GEN_HAS_MEMBER(kernarg_segment_byte_size)
151GEN_HAS_MEMBER(workgroup_fbarrier_count)
152GEN_HAS_MEMBER(wavefront_sgpr_count)
153GEN_HAS_MEMBER(workitem_vgpr_count)
154GEN_HAS_MEMBER(reserved_vgpr_first)
155GEN_HAS_MEMBER(reserved_vgpr_count)
156GEN_HAS_MEMBER(reserved_sgpr_first)
157GEN_HAS_MEMBER(reserved_sgpr_count)
158GEN_HAS_MEMBER(debug_wavefront_private_segment_offset_sgpr)
159GEN_HAS_MEMBER(debug_private_segment_buffer_sgpr)
160GEN_HAS_MEMBER(kernarg_segment_alignment)
161GEN_HAS_MEMBER(group_segment_alignment)
162GEN_HAS_MEMBER(private_segment_alignment)
163GEN_HAS_MEMBER(wavefront_size)
164GEN_HAS_MEMBER(call_convention)
165GEN_HAS_MEMBER(runtime_loader_kernel_symbol)
166
168 static constexpr StringLiteral const Table[] = {
169 "", // not found placeholder
170#define RECORD(name, altName, print, parse) #name
172#undef RECORD
173 };
174 return ArrayRef(Table);
175}
176
178 static constexpr StringLiteral const Table[] = {
179 "", // not found placeholder
180#define RECORD(name, altName, print, parse) #altName
182#undef RECORD
183 };
184 return ArrayRef(Table);
185}
186
188 static bool const Table[] = {
189#define RECORD(name, altName, print, parse) (IsMCExpr##name::RESULT)
191#undef RECORD
192 };
193 return ArrayRef(Table);
194}
195
196using RetrieveFx = const MCExpr *&(*)(AMDGPUMCKernelCodeT &);
197
199 static const RetrieveFx Table[] = {
200#define RECORD(name, altName, print, parse) GetMember##name::Get
202#undef RECORD
203 };
204 return ArrayRef(Table);
205}
206
208 ArrayRef<StringLiteral> altNames) {
209 StringMap<int> map;
210 assert(names.size() == altNames.size());
211 for (unsigned i = 0; i < names.size(); ++i) {
212 map.insert(std::pair(names[i], i));
213 map.insert(std::pair(altNames[i], i));
214 }
215 return map;
216}
217
219 static const auto map = createIndexMap(get_amd_kernel_code_t_FldNames(),
221 return map.lookup(name) - 1; // returns -1 if not found
222}
223
225public:
226 template <typename T, T AMDGPUMCKernelCodeT::*ptr,
227 typename std::enable_if_t<!std::is_integral_v<T>, T> * = nullptr>
229 raw_ostream &OS, MCContext &Ctx,
231 OS << Name << " = ";
232 const MCExpr *Value = C.*ptr;
233 Helper(Value, OS, Ctx.getAsmInfo());
234 }
235
236 template <typename T, T AMDGPUMCKernelCodeT::*ptr,
237 typename std::enable_if_t<std::is_integral_v<T>, T> * = nullptr>
241 OS << Name << " = " << (int)(C.*ptr);
242 }
243};
244
245template <typename T, T AMDGPUMCKernelCodeT::*ptr, int shift, int width = 1>
249 const auto Mask = (static_cast<T>(1) << width) - 1;
250 OS << Name << " = " << (int)((C.*ptr >> shift) & Mask);
251}
252
255
258 static const PrintFx Table[] = {
259#define COMPPGM1(name, aname, AccMacro) \
260 COMPPGM(name, aname, C_00B848_##AccMacro, S_00B848_##AccMacro, 0)
261#define COMPPGM2(name, aname, AccMacro) \
262 COMPPGM(name, aname, C_00B84C_##AccMacro, S_00B84C_##AccMacro, 32)
263#define PRINTFIELD(sname, aname, name) PrintField::printField<FLD_T(name)>
264#define PRINTCOMP(Complement, PGMType) \
265 [](StringRef Name, const AMDGPUMCKernelCodeT &C, raw_ostream &OS, \
266 MCContext &Ctx, AMDGPUMCKernelCodeT::PrintHelper Helper) { \
267 OS << Name << " = "; \
268 auto [Shift, Mask] = getShiftMask(Complement); \
269 const MCExpr *Value; \
270 if (PGMType == 0) { \
271 Value = \
272 maskShiftGet(C.compute_pgm_resource1_registers, Mask, Shift, Ctx); \
273 } else { \
274 Value = \
275 maskShiftGet(C.compute_pgm_resource2_registers, Mask, Shift, Ctx); \
276 } \
277 Helper(Value, OS, Ctx.getAsmInfo()); \
278 }
279#define RECORD(name, altName, print, parse) print
281#undef RECORD
282 };
283 return ArrayRef(Table);
284}
285
286static bool expectAbsExpression(MCAsmParser &MCParser, int64_t &Value,
287 raw_ostream &Err) {
288
289 if (MCParser.getLexer().isNot(AsmToken::Equal)) {
290 Err << "expected '='";
291 return false;
292 }
293 MCParser.getLexer().Lex();
294
295 if (MCParser.parseAbsoluteExpression(Value)) {
296 Err << "integer absolute expression expected";
297 return false;
298 }
299 return true;
300}
301
302template <typename T, T AMDGPUMCKernelCodeT::*ptr>
304 raw_ostream &Err) {
305 int64_t Value = 0;
306 if (!expectAbsExpression(MCParser, Value, Err))
307 return false;
308 C.*ptr = (T)Value;
309 return true;
310}
311
312template <typename T, T AMDGPUMCKernelCodeT::*ptr, int shift, int width = 1>
314 raw_ostream &Err) {
315 int64_t Value = 0;
316 if (!expectAbsExpression(MCParser, Value, Err))
317 return false;
318 const uint64_t Mask = ((UINT64_C(1) << width) - 1) << shift;
319 C.*ptr &= (T)~Mask;
320 C.*ptr |= (T)((Value << shift) & Mask);
321 return true;
322}
323
324static bool parseExpr(MCAsmParser &MCParser, const MCExpr *&Value,
325 raw_ostream &Err) {
326 if (MCParser.getLexer().isNot(AsmToken::Equal)) {
327 Err << "expected '='";
328 return false;
329 }
330 MCParser.getLexer().Lex();
331
332 if (MCParser.parseExpression(Value)) {
333 Err << "Could not parse expression";
334 return false;
335 }
336 return true;
337}
338
340
342 static const ParseFx Table[] = {
343#define COMPPGM1(name, aname, AccMacro) \
344 COMPPGM(name, aname, G_00B848_##AccMacro, C_00B848_##AccMacro, 0)
345#define COMPPGM2(name, aname, AccMacro) \
346 COMPPGM(name, aname, G_00B84C_##AccMacro, C_00B84C_##AccMacro, 32)
347#define PARSECOMP(Complement, PGMType) \
348 [](AMDGPUMCKernelCodeT &C, MCAsmParser &MCParser, \
349 raw_ostream &Err) -> bool { \
350 MCContext &Ctx = MCParser.getContext(); \
351 const MCExpr *Value; \
352 if (!parseExpr(MCParser, Value, Err)) \
353 return false; \
354 auto [Shift, Mask] = getShiftMask(Complement); \
355 Value = maskShiftSet(Value, Mask, Shift, Ctx); \
356 const MCExpr *Compl = MCConstantExpr::create(Complement, Ctx); \
357 if (PGMType == 0) { \
358 C.compute_pgm_resource1_registers = MCBinaryExpr::createAnd( \
359 C.compute_pgm_resource1_registers, Compl, Ctx); \
360 C.compute_pgm_resource1_registers = MCBinaryExpr::createOr( \
361 C.compute_pgm_resource1_registers, Value, Ctx); \
362 } else { \
363 C.compute_pgm_resource2_registers = MCBinaryExpr::createAnd( \
364 C.compute_pgm_resource2_registers, Compl, Ctx); \
365 C.compute_pgm_resource2_registers = MCBinaryExpr::createOr( \
366 C.compute_pgm_resource2_registers, Value, Ctx); \
367 } \
368 return true; \
369 }
370#define RECORD(name, altName, print, parse) parse
372#undef RECORD
373 };
374 return ArrayRef(Table);
375}
376
377static void printAmdKernelCodeField(const AMDGPUMCKernelCodeT &C, int FldIndex,
378 raw_ostream &OS, MCContext &Ctx,
380 auto Printer = getPrinterTable(Helper)[FldIndex];
381 if (Printer)
382 Printer(get_amd_kernel_code_t_FldNames()[FldIndex + 1], C, OS, Ctx, Helper);
383}
384
386 MCContext &Ctx, bool InitMCExpr) {
388
390
391 if (InitMCExpr) {
392 const MCExpr *ZeroExpr = MCConstantExpr::create(0, Ctx);
397 is_dynamic_callstack = ZeroExpr;
398 wavefront_sgpr_count = ZeroExpr;
399 workitem_vgpr_count = ZeroExpr;
401 }
402}
403
405 int64_t Value;
406 if (!compute_pgm_resource1_registers->evaluateAsAbsolute(Value))
407 return;
408
410 Ctx.reportError({}, "enable_dx10_clamp=1 is not allowed on GFX12+");
411 return;
412 }
413
415 Ctx.reportError({}, "enable_ieee_mode=1 is not allowed on GFX12+");
416 return;
417 }
418
420 Ctx.reportError({}, "enable_wgp_mode=1 is only allowed on GFX10+");
421 return;
422 }
423
425 Ctx.reportError({}, "enable_mem_ordered=1 is only allowed on GFX10+");
426 return;
427 }
428
430 Ctx.reportError({}, "enable_fwd_progress=1 is only allowed on GFX10+");
431 return;
432 }
433}
434
436 static const auto IndexTable = getMCExprIndexTable();
437 return IndexTable[Index](*this);
438}
439
441 raw_ostream &Err) {
443 if (Idx < 0) {
444 Err << "unexpected amd_kernel_code_t field name " << ID;
445 return false;
446 }
447
448 if (hasMCExprVersionTable()[Idx]) {
449 const MCExpr *Value;
450 if (!parseExpr(MCParser, Value, Err))
451 return false;
453 return true;
454 }
455 auto Parser = getParserTable()[Idx];
456 return Parser ? Parser(*this, MCParser, Err) : false;
457}
458
460 PrintHelper Helper) {
461 const int Size = hasMCExprVersionTable().size();
462 for (int i = 0; i < Size; ++i) {
463 OS << "\t\t";
464 if (hasMCExprVersionTable()[i]) {
465 OS << get_amd_kernel_code_t_FldNames()[i + 1] << " = ";
466 const MCExpr *Value = getMCExprForIndex(i);
467 Helper(Value, OS, Ctx.getAsmInfo());
468 } else {
469 printAmdKernelCodeField(*this, i, OS, Ctx, Helper);
470 }
471 OS << '\n';
472 }
473}
474
476 OS.emitIntValue(amd_kernel_code_version_major, /*Size=*/4);
477 OS.emitIntValue(amd_kernel_code_version_minor, /*Size=*/4);
478 OS.emitIntValue(amd_machine_kind, /*Size=*/2);
479 OS.emitIntValue(amd_machine_version_major, /*Size=*/2);
480 OS.emitIntValue(amd_machine_version_minor, /*Size=*/2);
481 OS.emitIntValue(amd_machine_version_stepping, /*Size=*/2);
482 OS.emitIntValue(kernel_code_entry_byte_offset, /*Size=*/8);
483 OS.emitIntValue(kernel_code_prefetch_byte_offset, /*Size=*/8);
484 OS.emitIntValue(kernel_code_prefetch_byte_size, /*Size=*/8);
485 OS.emitIntValue(reserved0, /*Size=*/8);
486
487 if (compute_pgm_resource1_registers != nullptr)
488 OS.emitValue(compute_pgm_resource1_registers, /*Size=*/4);
489 else
491 /*Size=*/4);
492
493 if (compute_pgm_resource2_registers != nullptr)
494 OS.emitValue(compute_pgm_resource2_registers, /*Size=*/4);
495 else
497 /*Size=*/4);
498
499 if (is_dynamic_callstack != nullptr) {
500 const MCExpr *CodeProps = MCConstantExpr::create(code_properties, Ctx);
501 CodeProps = MCBinaryExpr::createOr(
502 CodeProps,
506 Ctx);
507 OS.emitValue(CodeProps, /*Size=*/4);
508 } else
509 OS.emitIntValue(code_properties, /*Size=*/4);
510
512 OS.emitValue(workitem_private_segment_byte_size, /*Size=*/4);
513 else
514 OS.emitIntValue(0, /*Size=*/4);
515
516 OS.emitIntValue(workgroup_group_segment_byte_size, /*Size=*/4);
517 OS.emitIntValue(gds_segment_byte_size, /*Size=*/4);
518 OS.emitIntValue(kernarg_segment_byte_size, /*Size=*/8);
519 OS.emitIntValue(workgroup_fbarrier_count, /*Size=*/4);
520
521 if (wavefront_sgpr_count != nullptr)
522 OS.emitValue(wavefront_sgpr_count, /*Size=*/2);
523 else
524 OS.emitIntValue(0, /*Size=*/2);
525
526 if (workitem_vgpr_count != nullptr)
527 OS.emitValue(workitem_vgpr_count, /*Size=*/2);
528 else
529 OS.emitIntValue(0, /*Size=*/2);
530
531 OS.emitIntValue(reserved_vgpr_first, /*Size=*/2);
532 OS.emitIntValue(reserved_vgpr_count, /*Size=*/2);
533 OS.emitIntValue(reserved_sgpr_first, /*Size=*/2);
534 OS.emitIntValue(reserved_sgpr_count, /*Size=*/2);
536 /*Size=*/2);
537 OS.emitIntValue(debug_private_segment_buffer_sgpr, /*Size=*/2);
538 OS.emitIntValue(kernarg_segment_alignment, /*Size=*/1);
539 OS.emitIntValue(group_segment_alignment, /*Size=*/1);
540 OS.emitIntValue(private_segment_alignment, /*Size=*/1);
541 OS.emitIntValue(wavefront_size, /*Size=*/1);
542
543 OS.emitIntValue(call_convention, /*Size=*/4);
544 OS.emitBytes(StringRef((const char *)reserved3, /*Size=*/12));
545 OS.emitIntValue(runtime_loader_kernel_symbol, /*Size=*/8);
546 OS.emitBytes(StringRef((const char *)control_directives, /*Size=*/16 * 8));
547}
static void printBitField(StringRef Name, const AMDGPUMCKernelCodeT &C, raw_ostream &OS, MCContext &, AMDGPUMCKernelCodeT::PrintHelper)
static ArrayRef< StringLiteral > get_amd_kernel_code_t_FldNames()
static ArrayRef< StringLiteral > get_amd_kernel_code_t_FldAltNames()
static ArrayRef< bool > hasMCExprVersionTable()
static bool expectAbsExpression(MCAsmParser &MCParser, int64_t &Value, raw_ostream &Err)
void(*)(StringRef, const AMDGPUMCKernelCodeT &, raw_ostream &, MCContext &, AMDGPUMCKernelCodeT::PrintHelper Helper) PrintFx
static bool parseExpr(MCAsmParser &MCParser, const MCExpr *&Value, raw_ostream &Err)
static bool parseField(AMDGPUMCKernelCodeT &C, MCAsmParser &MCParser, raw_ostream &Err)
const MCExpr *&(*)(AMDGPUMCKernelCodeT &) RetrieveFx
static ArrayRef< RetrieveFx > getMCExprIndexTable()
bool(*)(AMDGPUMCKernelCodeT &, MCAsmParser &, raw_ostream &) ParseFx
#define GEN_HAS_MEMBER(member)
static bool parseBitField(AMDGPUMCKernelCodeT &C, MCAsmParser &MCParser, raw_ostream &Err)
static void printAmdKernelCodeField(const AMDGPUMCKernelCodeT &C, int FldIndex, raw_ostream &OS, MCContext &Ctx, AMDGPUMCKernelCodeT::PrintHelper Helper)
static ArrayRef< PrintFx > getPrinterTable(AMDGPUMCKernelCodeT::PrintHelper Helper)
static StringMap< int > createIndexMap(ArrayRef< StringLiteral > names, ArrayRef< StringLiteral > altNames)
static ArrayRef< ParseFx > getParserTable()
static int get_amd_kernel_code_t_FieldIndex(StringRef name)
MC layer struct for AMDGPUMCKernelCodeT, provides MCExpr functionality where required.
@ AMD_CODE_PROPERTY_IS_DYNAMIC_CALLSTACK_SHIFT
Indicate if the generated ISA is using a dynamically sized call stack.
@ AMD_CODE_PROPERTY_IS_DYNAMIC_CALLSTACK_WIDTH
dxil pretty DXIL Metadata Pretty Printer
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
std::string Name
uint64_t Size
This file implements an indexed map.
#define G_00B848_FWD_PROGRESS(x)
Definition: SIDefines.h:1155
#define G_00B848_MEM_ORDERED(x)
Definition: SIDefines.h:1152
#define G_00B848_IEEE_MODE(x)
Definition: SIDefines.h:1146
#define G_00B848_DX10_CLAMP(x)
Definition: SIDefines.h:1137
#define G_00B848_WGP_MODE(x)
Definition: SIDefines.h:1149
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static const char * name
Definition: SMEABIPass.cpp:50
raw_pwrite_stream & OS
static void printField(StringRef Name, const AMDGPUMCKernelCodeT &C, raw_ostream &OS, MCContext &Ctx, AMDGPUMCKernelCodeT::PrintHelper Helper)
static void printField(StringRef Name, const AMDGPUMCKernelCodeT &C, raw_ostream &OS, MCContext &, AMDGPUMCKernelCodeT::PrintHelper)
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: ArrayRef.h:41
size_t size() const
size - Get the array size.
Definition: ArrayRef.h:165
bool isNot(AsmToken::TokenKind K) const
Check if the current token has kind K.
Definition: MCAsmLexer.h:144
const AsmToken & Lex()
Consume the next token from the input stream and return it.
Definition: MCAsmLexer.h:79
Generic assembler parser interface, for use by target specific assembly parsers.
Definition: MCAsmParser.h:123
virtual bool parseExpression(const MCExpr *&Res, SMLoc &EndLoc)=0
Parse an arbitrary expression.
virtual MCAsmLexer & getLexer()=0
virtual bool parseAbsoluteExpression(int64_t &Res)=0
Parse an expression which must evaluate to an absolute value.
static const MCBinaryExpr * createOr(const MCExpr *LHS, const MCExpr *RHS, MCContext &Ctx)
Definition: MCExpr.h:597
static const MCConstantExpr * create(int64_t Value, MCContext &Ctx, bool PrintInHex=false, unsigned SizeInBytes=0)
Definition: MCExpr.cpp:193
Context object for machine code objects.
Definition: MCContext.h:83
const MCAsmInfo * getAsmInfo() const
Definition: MCContext.h:412
void reportError(SMLoc L, const Twine &Msg)
Definition: MCContext.cpp:1068
Base class for the full range of assembler expressions which are needed for parsing.
Definition: MCExpr.h:34
Streaming machine code generation interface.
Definition: MCStreamer.h:213
Generic base class for all target subtargets.
A wrapper around a string literal that serves as a proxy for constructing global tables of StringRefs...
Definition: StringRef.h:838
StringMap - This is an unconventional map that is specialized for handling keys that are "strings",...
Definition: StringMap.h:128
bool insert(MapEntryTy *KeyValue)
insert - Insert the specified key/value pair into the map.
Definition: StringMap.h:308
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
LLVM Value Representation.
Definition: Value.h:74
An efficient, type-erasing, non-owning reference to a callable.
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:52
bool isGFX12Plus(const MCSubtargetInfo &STI)
const MCExpr * maskShiftSet(const MCExpr *Val, uint32_t Mask, uint32_t Shift, MCContext &Ctx)
Provided with the MCExpr * Val, uint32 Mask and Shift, will return the masked and left shifted,...
bool isGFX10Plus(const MCSubtargetInfo &STI)
void initDefaultAMDKernelCodeT(AMDGPUMCKernelCodeT &KernelCode, const MCSubtargetInfo *STI)
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
@ C
The default llvm calling convention, compatible with C.
Definition: CallingConv.h:34
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
constexpr uint32_t Hi_32(uint64_t Value)
Return the high 32 bits of a 64 bit value.
Definition: MathExtras.h:154
constexpr uint32_t Lo_32(uint64_t Value)
Return the low 32 bits of a 64 bit value.
Definition: MathExtras.h:159
void EmitKernelCodeT(raw_ostream &OS, MCContext &Ctx, PrintHelper Helper)
void validate(const MCSubtargetInfo *STI, MCContext &Ctx)
void initDefault(const MCSubtargetInfo *STI, MCContext &Ctx, bool InitMCExpr=true)
bool ParseKernelCodeT(StringRef ID, MCAsmParser &MCParser, raw_ostream &Err)
const MCExpr *& getMCExprForIndex(int Index)