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ARMAsmBackend.h
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1 //===-- ARMAsmBackend.h - ARM Assembler Backend -----------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #ifndef LLVM_LIB_TARGET_ARM_ARMASMBACKEND_H
10 #define LLVM_LIB_TARGET_ARM_ARMASMBACKEND_H
11 
14 #include "llvm/MC/MCAsmBackend.h"
17 
18 namespace llvm {
19 
20 class ARMAsmBackend : public MCAsmBackend {
21  // The STI from the target triple the MCAsmBackend was instantiated with
22  // note that MCFragments may have a different local STI that should be
23  // used in preference.
24  const MCSubtargetInfo &STI;
25  bool isThumbMode; // Currently emitting Thumb code.
26 public:
27  ARMAsmBackend(const Target &T, const MCSubtargetInfo &STI,
29  : MCAsmBackend(Endian), STI(STI),
30  isThumbMode(STI.getTargetTriple().isThumb()) {}
31 
32  unsigned getNumFixupKinds() const override {
34  }
35 
36  // FIXME: this should be calculated per fragment as the STI may be
37  // different.
38  bool hasNOP() const { return STI.getFeatureBits()[ARM::HasV6T2Ops]; }
39 
41 
42  const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
43 
44  bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
45  const MCValue &Target) override;
46 
47  unsigned adjustFixupValue(const MCAssembler &Asm, const MCFixup &Fixup,
48  const MCValue &Target, uint64_t Value,
49  bool IsResolved, MCContext &Ctx,
50  const MCSubtargetInfo *STI) const;
51 
52  void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
54  uint64_t Value, bool IsResolved,
55  const MCSubtargetInfo *STI) const override;
56 
57  unsigned getRelaxedOpcode(unsigned Op, const MCSubtargetInfo &STI) const;
58 
59  bool mayNeedRelaxation(const MCInst &Inst,
60  const MCSubtargetInfo &STI) const override;
61 
62  const char *reasonForFixupRelaxation(const MCFixup &Fixup,
63  uint64_t Value) const;
64 
65  bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
66  const MCRelaxableFragment *DF,
67  const MCAsmLayout &Layout) const override;
68 
69  void relaxInstruction(MCInst &Inst,
70  const MCSubtargetInfo &STI) const override;
71 
72  bool writeNopData(raw_ostream &OS, uint64_t Count) const override;
73 
75 
76  unsigned getPointerSize() const { return 4; }
77  bool isThumb() const { return isThumbMode; }
78  void setIsThumb(bool it) { isThumbMode = it; }
79 };
80 } // end namespace llvm
81 
82 #endif
llvm::ARMAsmBackend
Definition: ARMAsmBackend.h:20
llvm
Definition: AllocatorList.h:23
llvm::MCRelaxableFragment
A relaxable fragment holds on to its MCInst, since it may need to be relaxed during the assembler lay...
Definition: MCFragment.h:271
ARMMCTargetDesc.h
llvm::MCContext
Context object for machine code objects.
Definition: MCContext.h:71
llvm::ARMAsmBackend::getNumFixupKinds
unsigned getNumFixupKinds() const override
Get the number of target specific fixup kinds.
Definition: ARMAsmBackend.h:32
it
Reference model for inliner Oz decision policy Note this model is also referenced by test Transforms Inline ML tests if replacing it
Definition: README.txt:3
llvm::Target
Target - Wrapper for Target specific information.
Definition: TargetRegistry.h:124
llvm::ARMAsmBackend::applyFixup
void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, const MCValue &Target, MutableArrayRef< char > Data, uint64_t Value, bool IsResolved, const MCSubtargetInfo *STI) const override
Apply the Value for given Fixup into the provided data fragment, at the offset specified by the fixup...
Definition: ARMAsmBackend.cpp:1042
llvm::ARMAsmBackend::fixupNeedsRelaxation
bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value, const MCRelaxableFragment *DF, const MCAsmLayout &Layout) const override
Simple predicate for targets where !Resolved implies requiring relaxation.
Definition: ARMAsmBackend.cpp:323
llvm::Optional
Definition: APInt.h:33
llvm::MCInst
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:183
llvm::MCAssemblerFlag
MCAssemblerFlag
Definition: MCDirectives.h:50
llvm::Data
@ Data
Definition: SIMachineScheduler.h:56
llvm::MCAsmBackend::Endian
const support::endianness Endian
Definition: MCAsmBackend.h:45
ARMFixupKinds.h
llvm::MCAsmBackend
Generic interface to target specific assembler backends.
Definition: MCAsmBackend.h:36
MCAsmBackend.h
llvm::MutableArrayRef
MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...
Definition: ArrayRef.h:305
llvm::ARMAsmBackend::reasonForFixupRelaxation
const char * reasonForFixupRelaxation(const MCFixup &Fixup, uint64_t Value) const
Definition: ARMAsmBackend.cpp:244
MCSubtargetInfo.h
llvm::MCSubtargetInfo::getFeatureBits
const FeatureBitset & getFeatureBits() const
Definition: MCSubtargetInfo.h:111
llvm::MCID::Flag
Flag
These should be considered private to the implementation of the MCInstrDesc class.
Definition: MCInstrDesc.h:146
llvm::raw_ostream
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:50
llvm::lltok::Kind
Kind
Definition: LLToken.h:18
DF
static RegisterPass< DebugifyFunctionPass > DF("debugify-function", "Attach debug info to a function")
llvm::ARMAsmBackend::handleAssemblerFlag
void handleAssemblerFlag(MCAssemblerFlag Flag) override
Handle any target-specific assembler flags. By default, do nothing.
Definition: ARMAsmBackend.cpp:194
llvm::ARMAsmBackend::getFixupKindInfo
const MCFixupKindInfo & getFixupKindInfo(MCFixupKind Kind) const override
Get information on a fixup kind.
Definition: ARMAsmBackend.cpp:68
llvm::ARMAsmBackend::isThumb
bool isThumb() const
Definition: ARMAsmBackend.h:77
llvm::ARMAsmBackend::ARMAsmBackend
ARMAsmBackend(const Target &T, const MCSubtargetInfo &STI, support::endianness Endian)
Definition: ARMAsmBackend.h:27
llvm::MCAssembler
Definition: MCAssembler.h:60
llvm::ARMAsmBackend::getRelaxedOpcode
unsigned getRelaxedOpcode(unsigned Op, const MCSubtargetInfo &STI) const
Definition: ARMAsmBackend.cpp:207
llvm::ARMAsmBackend::getPointerSize
unsigned getPointerSize() const
Definition: ARMAsmBackend.h:76
llvm::ARMAsmBackend::mayNeedRelaxation
bool mayNeedRelaxation(const MCInst &Inst, const MCSubtargetInfo &STI) const override
Check whether the given instruction may need relaxation.
Definition: ARMAsmBackend.cpp:230
llvm::ARMAsmBackend::hasNOP
bool hasNOP() const
Definition: ARMAsmBackend.h:38
llvm::MCFixupKindInfo
Target independent information on a fixup kind.
Definition: MCFixupKindInfo.h:15
llvm::ARMAsmBackend::relaxInstruction
void relaxInstruction(MCInst &Inst, const MCSubtargetInfo &STI) const override
Relax the instruction in the given fragment to the next wider instruction.
Definition: ARMAsmBackend.cpp:329
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:57
llvm::ARMAsmBackend::shouldForceRelocation
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup, const MCValue &Target) override
Hook to check if a relocation is needed for some target specific reason.
Definition: ARMAsmBackend.cpp:879
llvm::ARMAsmBackend::setIsThumb
void setIsThumb(bool it)
Definition: ARMAsmBackend.h:78
llvm::GraphProgram::Name
Name
Definition: GraphWriter.h:52
llvm::MCAsmLayout
Encapsulates the layout of an assembly file at a particular point in time.
Definition: MCAsmLayout.h:28
llvm::AMDGPU::SendMsg::Op
Op
Definition: SIDefines.h:314
llvm::MCFixupKind
MCFixupKind
Extensible enumeration to represent the type of a fixup.
Definition: MCFixup.h:21
llvm::ARM::NumTargetFixupKinds
@ NumTargetFixupKinds
Definition: ARMFixupKinds.h:119
llvm::ARMAsmBackend::writeNopData
bool writeNopData(raw_ostream &OS, uint64_t Count) const override
Write an (optimal) nop sequence of Count bytes to the given output.
Definition: ARMAsmBackend.cpp:360
llvm::ARMAsmBackend::adjustFixupValue
unsigned adjustFixupValue(const MCAssembler &Asm, const MCFixup &Fixup, const MCValue &Target, uint64_t Value, bool IsResolved, MCContext &Ctx, const MCSubtargetInfo *STI) const
Definition: ARMAsmBackend.cpp:426
llvm::support::endianness
endianness
Definition: Endian.h:27
llvm::HexStyle::Asm
@ Asm
0ffh
Definition: MCInstPrinter.h:34
llvm::MCValue
This represents an "assembler immediate".
Definition: MCValue.h:37
llvm::ARMAsmBackend::getFixupKind
Optional< MCFixupKind > getFixupKind(StringRef Name) const override
Map a relocation name used in .reloc to a fixup kind.
Definition: ARMAsmBackend.cpp:50
TargetRegistry.h
llvm::MCSubtargetInfo
Generic base class for all target subtargets.
Definition: MCSubtargetInfo.h:75
llvm::MCFixup
Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...
Definition: MCFixup.h:81
llvm::Value
LLVM Value Representation.
Definition: Value.h:75