LLVM 19.0.0git
Public Member Functions | List of all members
llvm::ARMAsmBackend Class Reference

#include "Target/ARM/MCTargetDesc/ARMAsmBackend.h"

Inheritance diagram for llvm::ARMAsmBackend:
Inheritance graph
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Public Member Functions

 ARMAsmBackend (const Target &T, bool isThumb, llvm::endianness Endian)
 
unsigned getNumFixupKinds () const override
 Get the number of target specific fixup kinds.
 
bool hasNOP (const MCSubtargetInfo *STI) const
 
std::optional< MCFixupKindgetFixupKind (StringRef Name) const override
 Map a relocation name used in .reloc to a fixup kind.
 
const MCFixupKindInfogetFixupKindInfo (MCFixupKind Kind) const override
 Get information on a fixup kind.
 
bool shouldForceRelocation (const MCAssembler &Asm, const MCFixup &Fixup, const MCValue &Target, const MCSubtargetInfo *STI) override
 Hook to check if a relocation is needed for some target specific reason.
 
unsigned adjustFixupValue (const MCAssembler &Asm, const MCFixup &Fixup, const MCValue &Target, uint64_t Value, bool IsResolved, MCContext &Ctx, const MCSubtargetInfo *STI) const
 
void applyFixup (const MCAssembler &Asm, const MCFixup &Fixup, const MCValue &Target, MutableArrayRef< char > Data, uint64_t Value, bool IsResolved, const MCSubtargetInfo *STI) const override
 Apply the Value for given Fixup into the provided data fragment, at the offset specified by the fixup and following the fixup kind as appropriate.
 
unsigned getRelaxedOpcode (unsigned Op, const MCSubtargetInfo &STI) const
 
bool mayNeedRelaxation (const MCInst &Inst, const MCSubtargetInfo &STI) const override
 Check whether the given instruction may need relaxation.
 
const charreasonForFixupRelaxation (const MCFixup &Fixup, uint64_t Value) const
 
bool fixupNeedsRelaxation (const MCFixup &Fixup, uint64_t Value, const MCRelaxableFragment *DF, const MCAsmLayout &Layout) const override
 Simple predicate for targets where !Resolved implies requiring relaxation.
 
void relaxInstruction (MCInst &Inst, const MCSubtargetInfo &STI) const override
 Relax the instruction in the given fragment to the next wider instruction.
 
bool writeNopData (raw_ostream &OS, uint64_t Count, const MCSubtargetInfo *STI) const override
 Write an (optimal) nop sequence of Count bytes to the given output.
 
void handleAssemblerFlag (MCAssemblerFlag Flag) override
 Handle any target-specific assembler flags. By default, do nothing.
 
unsigned getPointerSize () const
 
bool isThumb () const
 
void setIsThumb (bool it)
 
- Public Member Functions inherited from llvm::MCAsmBackend
 MCAsmBackend (const MCAsmBackend &)=delete
 
MCAsmBackendoperator= (const MCAsmBackend &)=delete
 
virtual ~MCAsmBackend ()
 
virtual bool allowAutoPadding () const
 Return true if this target might automatically pad instructions and thus need to emit padding enable/disable directives around sensative code.
 
virtual bool allowEnhancedRelaxation () const
 Return true if this target allows an unrelaxable instruction to be emitted into RelaxableFragment and then we can increase its size in a tricky way for optimization.
 
virtual void emitInstructionBegin (MCObjectStreamer &OS, const MCInst &Inst, const MCSubtargetInfo &STI)
 Give the target a chance to manipulate state related to instruction alignment (e.g.
 
virtual void emitInstructionEnd (MCObjectStreamer &OS, const MCInst &Inst)
 
virtual void reset ()
 lifetime management
 
std::unique_ptr< MCObjectWritercreateObjectWriter (raw_pwrite_stream &OS) const
 Create a new MCObjectWriter instance for use by the assembler backend to emit the final object file.
 
std::unique_ptr< MCObjectWritercreateDwoObjectWriter (raw_pwrite_stream &OS, raw_pwrite_stream &DwoOS) const
 Create an MCObjectWriter that writes two object files: a .o file which is linked into the final program and a .dwo file which is used by debuggers.
 
virtual std::unique_ptr< MCObjectTargetWritercreateObjectTargetWriter () const =0
 
virtual unsigned getMinimumNopSize () const
 Returns the minimum size of a nop in bytes on this target.
 
virtual unsigned getMaximumNopSize (const MCSubtargetInfo &STI) const
 Returns the maximum size of a nop in bytes on this target.
 
virtual bool writeNopData (raw_ostream &OS, uint64_t Count, const MCSubtargetInfo *STI) const =0
 Write an (optimal) nop sequence of Count bytes to the given output.
 
virtual void finishLayout (MCAssembler const &Asm, MCAsmLayout &Layout) const
 Give backend an opportunity to finish layout after relaxation.
 
virtual void handleAssemblerFlag (MCAssemblerFlag Flag)
 Handle any target-specific assembler flags. By default, do nothing.
 
virtual uint32_t generateCompactUnwindEncoding (const MCDwarfFrameInfo *FI, const MCContext *Ctxt) const
 Generate the compact unwind encoding for the CFI instructions.
 
virtual bool isMicroMips (const MCSymbol *Sym) const
 Check whether a given symbol has been flagged with MICROMIPS flag.
 
bool isDarwinCanonicalPersonality (const MCSymbol *Sym) const
 
virtual bool shouldInsertExtraNopBytesForCodeAlign (const MCAlignFragment &AF, unsigned &Size)
 Hook to check if extra nop bytes must be inserted for alignment directive.
 
virtual bool shouldInsertFixupForCodeAlign (MCAssembler &Asm, const MCAsmLayout &Layout, MCAlignFragment &AF)
 Hook which indicates if the target requires a fixup to be generated when handling an align directive in an executable section.
 
virtual bool evaluateTargetFixup (const MCAssembler &Asm, const MCAsmLayout &Layout, const MCFixup &Fixup, const MCFragment *DF, const MCValue &Target, const MCSubtargetInfo *STI, uint64_t &Value, bool &WasForced)
 
virtual bool handleAddSubRelocations (const MCAsmLayout &Layout, const MCFragment &F, const MCFixup &Fixup, const MCValue &Target, uint64_t &FixedValue) const
 
virtual bool fixupNeedsRelaxationAdvanced (const MCFixup &Fixup, bool Resolved, uint64_t Value, const MCRelaxableFragment *DF, const MCAsmLayout &Layout, const bool WasForced) const
 Target specific predicate for whether a given fixup requires the associated instruction to be relaxed.
 
virtual bool relaxDwarfLineAddr (MCDwarfLineAddrFragment &DF, MCAsmLayout &Layout, bool &WasRelaxed) const
 
virtual bool relaxDwarfCFA (MCDwarfCallFrameFragment &DF, MCAsmLayout &Layout, bool &WasRelaxed) const
 
virtual std::pair< bool, boolrelaxLEB128 (MCLEBFragment &LF, MCAsmLayout &Layout, int64_t &Value) const
 

Additional Inherited Members

- Public Attributes inherited from llvm::MCAsmBackend
const llvm::endianness Endian
 
const unsigned RelaxFixupKind
 Fixup kind used for linker relaxation. Currently only used by RISC-V.
 
- Protected Member Functions inherited from llvm::MCAsmBackend
 MCAsmBackend (llvm::endianness Endian, unsigned RelaxFixupKind=MaxFixupKind)
 

Detailed Description

Definition at line 20 of file ARMAsmBackend.h.

Constructor & Destructor Documentation

◆ ARMAsmBackend()

llvm::ARMAsmBackend::ARMAsmBackend ( const Target T,
bool  isThumb,
llvm::endianness  Endian 
)
inline

Definition at line 23 of file ARMAsmBackend.h.

Member Function Documentation

◆ adjustFixupValue()

unsigned ARMAsmBackend::adjustFixupValue ( const MCAssembler Asm,
const MCFixup Fixup,
const MCValue Target,
uint64_t  Value,
bool  IsResolved,
MCContext Ctx,
const MCSubtargetInfo STI 
) const

Definition at line 444 of file ARMAsmBackend.cpp.

References A, assert(), llvm::MCAsmBackend::Endian, Fixup, llvm::ARM::fixup_arm_adr_pcrel_12, llvm::ARM::fixup_arm_blx, llvm::ARM::fixup_arm_condbl, llvm::ARM::fixup_arm_condbranch, llvm::ARM::fixup_arm_ldst_abs_12, llvm::ARM::fixup_arm_ldst_pcrel_12, llvm::ARM::fixup_arm_mod_imm, llvm::ARM::fixup_arm_movt_hi16, llvm::ARM::fixup_arm_movw_lo16, llvm::ARM::fixup_arm_pcrel_10, llvm::ARM::fixup_arm_pcrel_10_unscaled, llvm::ARM::fixup_arm_pcrel_9, llvm::ARM::fixup_arm_thumb_bcc, llvm::ARM::fixup_arm_thumb_bl, llvm::ARM::fixup_arm_thumb_blx, llvm::ARM::fixup_arm_thumb_br, llvm::ARM::fixup_arm_thumb_cb, llvm::ARM::fixup_arm_thumb_cp, llvm::ARM::fixup_arm_thumb_lower_0_7, llvm::ARM::fixup_arm_thumb_lower_8_15, llvm::ARM::fixup_arm_thumb_upper_0_7, llvm::ARM::fixup_arm_thumb_upper_8_15, llvm::ARM::fixup_arm_uncondbl, llvm::ARM::fixup_arm_uncondbranch, llvm::ARM::fixup_bf_branch, llvm::ARM::fixup_bf_target, llvm::ARM::fixup_bfc_target, llvm::ARM::fixup_bfcsel_else_target, llvm::ARM::fixup_bfl_target, llvm::ARM::fixup_le, llvm::ARM::fixup_t2_adr_pcrel_12, llvm::ARM::fixup_t2_condbranch, llvm::ARM::fixup_t2_ldst_pcrel_12, llvm::ARM::fixup_t2_movt_hi16, llvm::ARM::fixup_t2_movw_lo16, llvm::ARM::fixup_t2_pcrel_10, llvm::ARM::fixup_t2_pcrel_9, llvm::ARM::fixup_t2_so_imm, llvm::ARM::fixup_t2_uncondbranch, llvm::ARM::fixup_thumb_adr_pcrel_10, llvm::ARM::fixup_wls, llvm::FK_Data_1, llvm::FK_Data_2, llvm::FK_Data_4, llvm::FK_SecRel_2, llvm::FK_SecRel_4, llvm::ARM_AM::getSOImmVal(), llvm::ARM_AM::getT2SOImmVal(), llvm::MCSubtargetInfo::getTargetTriple(), llvm::MCSubtargetInfo::hasFeature(), I, llvm::Triple::isOSBinFormatELF(), joinHalfWords(), llvm::little, reasonForFixupRelaxation(), llvm::MCContext::reportError(), swapHalfWords(), and llvm::MCSymbolRefExpr::VK_TLSCALL.

Referenced by applyFixup().

◆ applyFixup()

void ARMAsmBackend::applyFixup ( const MCAssembler Asm,
const MCFixup Fixup,
const MCValue Target,
MutableArrayRef< char Data,
uint64_t  Value,
bool  IsResolved,
const MCSubtargetInfo STI 
) const
overridevirtual

Apply the Value for given Fixup into the provided data fragment, at the offset specified by the fixup and following the fixup kind as appropriate.

Errors (such as an out of range fixup value) should be reported via Ctx. The STI is present only for fragments of type MCRelaxableFragment and MCDataFragment with hasInstructions() == true.

Implements llvm::MCAsmBackend.

Definition at line 1084 of file ARMAsmBackend.cpp.

References adjustFixupValue(), assert(), llvm::big, llvm::Data, llvm::MCAsmBackend::Endian, llvm::FirstLiteralRelocationKind, Fixup, getFixupKindContainerSizeBytes(), getFixupKindNumBytes(), Idx, llvm::little, and llvm::Offset.

◆ fixupNeedsRelaxation()

bool ARMAsmBackend::fixupNeedsRelaxation ( const MCFixup Fixup,
uint64_t  Value,
const MCRelaxableFragment DF,
const MCAsmLayout Layout 
) const
overridevirtual

Simple predicate for targets where !Resolved implies requiring relaxation.

Implements llvm::MCAsmBackend.

Definition at line 340 of file ARMAsmBackend.cpp.

References Fixup, and reasonForFixupRelaxation().

◆ getFixupKind()

std::optional< MCFixupKind > ARMAsmBackend::getFixupKind ( StringRef  Name) const
overridevirtual

Map a relocation name used in .reloc to a fixup kind.

Reimplemented from llvm::MCAsmBackend.

Definition at line 50 of file ARMAsmBackend.cpp.

◆ getFixupKindInfo()

const MCFixupKindInfo & ARMAsmBackend::getFixupKindInfo ( MCFixupKind  Kind) const
overridevirtual

◆ getNumFixupKinds()

unsigned llvm::ARMAsmBackend::getNumFixupKinds ( ) const
inlineoverridevirtual

Get the number of target specific fixup kinds.

Implements llvm::MCAsmBackend.

Definition at line 26 of file ARMAsmBackend.h.

References llvm::ARM::NumTargetFixupKinds.

Referenced by getFixupKindInfo().

◆ getPointerSize()

unsigned llvm::ARMAsmBackend::getPointerSize ( ) const
inline

Definition at line 72 of file ARMAsmBackend.h.

◆ getRelaxedOpcode()

unsigned ARMAsmBackend::getRelaxedOpcode ( unsigned  Op,
const MCSubtargetInfo STI 
) const

Definition at line 224 of file ARMAsmBackend.cpp.

References llvm::MCSubtargetInfo::hasFeature().

Referenced by mayNeedRelaxation(), and relaxInstruction().

◆ handleAssemblerFlag()

void ARMAsmBackend::handleAssemblerFlag ( MCAssemblerFlag  Flag)
overridevirtual

Handle any target-specific assembler flags. By default, do nothing.

Reimplemented from llvm::MCAsmBackend.

Definition at line 211 of file ARMAsmBackend.cpp.

References llvm::MCAF_Code16, llvm::MCAF_Code32, and setIsThumb().

◆ hasNOP()

bool llvm::ARMAsmBackend::hasNOP ( const MCSubtargetInfo STI) const
inline

Definition at line 30 of file ARMAsmBackend.h.

References llvm::MCSubtargetInfo::hasFeature().

Referenced by writeNopData().

◆ isThumb()

bool llvm::ARMAsmBackend::isThumb ( ) const
inline

Definition at line 73 of file ARMAsmBackend.h.

Referenced by writeNopData().

◆ mayNeedRelaxation()

bool ARMAsmBackend::mayNeedRelaxation ( const MCInst Inst,
const MCSubtargetInfo STI 
) const
overridevirtual

Check whether the given instruction may need relaxation.

Parameters
Inst- The instruction to test.
STI- The MCSubtargetInfo in effect when the instruction was encoded.

Reimplemented from llvm::MCAsmBackend.

Definition at line 247 of file ARMAsmBackend.cpp.

References llvm::MCInst::getOpcode(), and getRelaxedOpcode().

◆ reasonForFixupRelaxation()

const char * ARMAsmBackend::reasonForFixupRelaxation ( const MCFixup Fixup,
uint64_t  Value 
) const

◆ relaxInstruction()

void ARMAsmBackend::relaxInstruction ( MCInst Inst,
const MCSubtargetInfo STI 
) const
overridevirtual

Relax the instruction in the given fragment to the next wider instruction.

Parameters
[out]InstThe instruction to relax, which is also the relaxed instruction.
STIthe subtarget information for the associated instruction.

Reimplemented from llvm::MCAsmBackend.

Definition at line 346 of file ARMAsmBackend.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::MCInst::dump_pretty(), llvm::MCInst::getOpcode(), getRelaxedOpcode(), OS, llvm::report_fatal_error(), and llvm::MCInst::setOpcode().

◆ setIsThumb()

void llvm::ARMAsmBackend::setIsThumb ( bool  it)
inline

Definition at line 74 of file ARMAsmBackend.h.

Referenced by handleAssemblerFlag().

◆ shouldForceRelocation()

bool ARMAsmBackend::shouldForceRelocation ( const MCAssembler Asm,
const MCFixup Fixup,
const MCValue Target,
const MCSubtargetInfo STI 
)
overridevirtual

◆ writeNopData()

bool ARMAsmBackend::writeNopData ( raw_ostream OS,
uint64_t  Count,
const MCSubtargetInfo STI 
) const
overridevirtual

Write an (optimal) nop sequence of Count bytes to the given output.

If the target cannot generate such a sequence, it should return an error.

Returns
- True on success.

Implements llvm::MCAsmBackend.

Definition at line 377 of file ARMAsmBackend.cpp.

References llvm::MCAsmBackend::Endian, hasNOP(), isThumb(), OS, llvm::raw_ostream::write(), and llvm::support::endian::write().


The documentation for this class was generated from the following files: