LLVM  16.0.0git
CSKYInstrInfo.h
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1 //===-- CSKYInstrInfo.h - CSKY Instruction Information --------*- C++ -*---===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains the CSKY implementation of the TargetInstrInfo class.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_LIB_TARGET_CSKY_CSKYINSTRINFO_H
14 #define LLVM_LIB_TARGET_CSKY_CSKYINSTRINFO_H
15 
18 
19 #define GET_INSTRINFO_HEADER
20 #include "CSKYGenInstrInfo.inc"
21 
22 namespace llvm {
23 
24 class CSKYSubtarget;
25 
27  bool v2sf;
28  bool v2df;
29  bool v3sf;
30  bool v3df;
31 
32 protected:
34 
35 public:
36  explicit CSKYInstrInfo(CSKYSubtarget &STI);
37 
38  unsigned isLoadFromStackSlot(const MachineInstr &MI,
39  int &FrameIndex) const override;
40  unsigned isStoreToStackSlot(const MachineInstr &MI,
41  int &FrameIndex) const override;
42 
45  bool IsKill, int FrameIndex,
46  const TargetRegisterClass *RC,
47  const TargetRegisterInfo *TRI) const override;
48 
51  int FrameIndex, const TargetRegisterClass *RC,
52  const TargetRegisterInfo *TRI) const override;
53 
55  const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg,
56  bool KillSrc) const override;
57 
60  const DebugLoc &DL,
61  int *BytesAdded = nullptr) const override;
62 
64  MachineBasicBlock *&FBB,
66  bool AllowModify = false) const override;
67 
69  int *BytesRemoved = nullptr) const override;
70 
71  bool
73 
74  MachineBasicBlock *getBranchDestBlock(const MachineInstr &MI) const override;
75 
76  unsigned getInstSizeInBytes(const MachineInstr &MI) const override;
77 
79 
80  // Materializes the given integer Val into DstReg.
82  const DebugLoc &DL, uint64_t Val,
84 };
85 
86 } // namespace llvm
87 
88 #endif // LLVM_LIB_TARGET_CSKY_CSKYINSTRINFO_H
CSKYGenInstrInfo
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:109
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
llvm::CSKYInstrInfo::insertBranch
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const override
Definition: CSKYInstrInfo.cpp:154
llvm::CSKYInstrInfo::analyzeBranch
bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify=false) const override
Definition: CSKYInstrInfo.cpp:45
llvm::CSKYInstrInfo
Definition: CSKYInstrInfo.h:26
llvm::TargetRegisterInfo
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Definition: TargetRegisterInfo.h:236
llvm::CSKYInstrInfo::getInstSizeInBytes
unsigned getInstSizeInBytes(const MachineInstr &MI) const override
Definition: CSKYInstrInfo.cpp:600
TargetInstrInfo.h
llvm::CSKYInstrInfo::removeBranch
unsigned removeBranch(MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const override
Definition: CSKYInstrInfo.cpp:113
llvm::CSKYInstrInfo::copyPhysReg
void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg, bool KillSrc) const override
Definition: CSKYInstrInfo.cpp:476
TRI
unsigned const TargetRegisterInfo * TRI
Definition: MachineSink.cpp:1628
llvm::CSKYInstrInfo::movImm
Register movImm(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, uint64_t Val, MachineInstr::MIFlag Flag=MachineInstr::NoFlags) const
Definition: CSKYInstrInfo.cpp:224
llvm::CSKYInstrInfo::storeRegToStackSlot
void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register SrcReg, bool IsKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override
Definition: CSKYInstrInfo.cpp:391
llvm::TargetRegisterClass
Definition: TargetRegisterInfo.h:45
TBB
const SmallVectorImpl< MachineOperand > MachineBasicBlock * TBB
Definition: RISCVRedundantCopyElimination.cpp:76
llvm::CSKYInstrInfo::getBranchDestBlock
MachineBasicBlock * getBranchDestBlock(const MachineInstr &MI) const override
Definition: CSKYInstrInfo.cpp:146
llvm::MCID::Flag
Flag
These should be considered private to the implementation of the MCInstrDesc class.
Definition: MCInstrDesc.h:147
llvm::CSKYSubtarget
Definition: CSKYSubtarget.h:30
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:94
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:66
uint64_t
llvm::CSKYInstrInfo::getGlobalBaseReg
Register getGlobalBaseReg(MachineFunction &MF) const
Definition: CSKYInstrInfo.cpp:564
llvm::CSKYInstrInfo::loadRegFromStackSlot
void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override
Definition: CSKYInstrInfo.cpp:434
llvm::MachineInstr::NoFlags
@ NoFlags
Definition: MachineInstr.h:83
CSKYMCTargetDesc.h
llvm::MachineInstr::MIFlag
MIFlag
Definition: MachineInstr.h:82
llvm::MachineFunction
Definition: MachineFunction.h:257
llvm::ArrayRef
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: APInt.h:33
Cond
SmallVector< MachineOperand, 4 > Cond
Definition: BasicBlockSections.cpp:137
MBBI
MachineBasicBlock MachineBasicBlock::iterator MBBI
Definition: AArch64SLSHardening.cpp:75
DL
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Definition: AArch64SLSHardening.cpp:76
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
llvm::ISD::FrameIndex
@ FrameIndex
Definition: ISDOpcodes.h:80
MBB
MachineBasicBlock & MBB
Definition: AArch64SLSHardening.cpp:74
llvm::CSKYInstrInfo::CSKYInstrInfo
CSKYInstrInfo(CSKYSubtarget &STI)
Definition: CSKYInstrInfo.cpp:27
llvm::CSKYInstrInfo::isStoreToStackSlot
unsigned isStoreToStackSlot(const MachineInstr &MI, int &FrameIndex) const override
Definition: CSKYInstrInfo.cpp:363
llvm::CSKYInstrInfo::reverseBranchCondition
bool reverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const override
Definition: CSKYInstrInfo.cpp:217
llvm::CSKYInstrInfo::STI
const CSKYSubtarget & STI
Definition: CSKYInstrInfo.h:33
llvm::SmallVectorImpl
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:42
llvm::DebugLoc
A debug info location.
Definition: DebugLoc.h:33
llvm::MachineInstrBundleIterator< MachineInstr >
llvm::CSKYInstrInfo::isLoadFromStackSlot
unsigned isLoadFromStackSlot(const MachineInstr &MI, int &FrameIndex) const override
Definition: CSKYInstrInfo.cpp:333
llvm::MCRegister
Wrapper class representing physical registers. Should be passed by value.
Definition: MCRegister.h:24