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34 #define DEBUG_TYPE "ppc-subtarget"
36 #define GET_SUBTARGETINFO_TARGET_DESC
37 #define GET_SUBTARGETINFO_CTOR
38 #include "PPCGenSubtargetInfo.inc"
45 cl::desc(
"Enable Machine Pipeliner for PPC"),
50 initializeEnvironment();
51 initSubtargetFeatures(CPU,
FS);
58 IsPPC64(TargetTriple.getArch() ==
Triple::ppc64 ||
59 TargetTriple.getArch() ==
Triple::ppc64le),
60 TM(
TM), FrameLowering(initializeSubtargetDependencies(CPU,
FS)),
71 void PPCSubtarget::initializeEnvironment() {
160 std::string CPUName = std::string(CPU);
161 if (CPUName.empty() || CPU ==
"generic") {
172 InstrItins = getInstrItineraryForCPU(CPUName);
191 "SPE and traditional floating point cannot both be enabled.\n",
false);
215 return TargetSubtargetInfo::ANTIDEP_ALL;
219 CriticalPathRCs.clear();
220 CriticalPathRCs.push_back(
isPPC64() ?
221 &PPC::G8RCRegClass : &PPC::GPRCRegClass);
225 unsigned NumRegionInstrs)
const {
bool AllowsUnalignedFPAccess
PPCSubtarget(const Triple &TT, const std::string &CPU, const std::string &FS, const PPCTargetMachine &TM)
This constructor initializes the data members to match that of the specified triple.
const PPCRegisterInfo * getRegisterInfo() const override
This is an optimization pass for GlobalISel generic memory operations.
const RegisterBankInfo * getRegBankInfo() const override
static cl::opt< bool > EnableMachinePipeliner("ppc-enable-pipeliner", cl::desc("Enable Machine Pipeliner for PPC"), cl::init(false), cl::Hidden)
InstrItineraryData InstrItins
Selected instruction itineraries (one entry per itinerary class.)
Align getPlatformStackAlignment() const
bool PredictableSelectIsExpensive
bool HasInvariantFunctionDescriptors
unsigned getOSMajorVersion() const
Return just the major version number, this is specialized because it is a common query.
Triple - Helper class for working with autoconf configuration names.
bool isLittleEndian() const
const CallLowering * getCallLowering() const override
bool enableMachineScheduler() const override
Scheduling customization.
const PPCTargetMachine & getTargetMachine() const
const LegalizerInfo * getLegalizerInfo() const override
bool useAA() const override
bool hasPCRelativeMemops() const
const PPCTargetMachine & TM
unsigned CPUDirective
Which cpu directive was used.
Triple TargetTriple
TargetTriple - What processor and OS we're targeting.
InstructionSelector * createPPCInstructionSelector(const PPCTargetMachine &TM, const PPCSubtarget &Subtarget, const PPCRegisterBankInfo &RBI)
void overrideSchedPolicy(MachineSchedPolicy &Policy, unsigned NumRegionInstrs) const override
bool enablePostRAScheduler() const override
This overrides the PostRAScheduler bit in the SchedModel for each CPU.
bool isPPC64() const
isPPC64 - Return true if we are generating code for 64-bit pointer mode.
void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
ArchType getArch() const
Get the parsed architecture type of this triple.
void ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS)
ParseSubtargetFeatures - Parses features string setting specified subtarget options.
bool isGVIndirectSymbol(const GlobalValue *GV) const
True if the GV will be accessed via an indirect symbol.
bool UsePPCPreRASchedStrategy
Holds all the information related to register banks.
Provides the logic to select generic machine instructions.
bool HasMFOCRF
Used by the ISel to turn in optimizations for POWER4-derived architectures.
bool enableSubRegLiveness() const override
std::unique_ptr< RegisterBankInfo > RegBankInfo
bool useDFAforSMS() const override
Machine Pipeliner customization.
Module * getParent()
Get the module that this global value is contained inside of...
Align StackAlignment
stackAlignment - The minimum alignment known to hold of the stack frame on entry to the function and ...
initializer< Ty > init(const Ty &Val)
bool isMusl() const
Tests whether the environment is musl-libc.
StringRef - Represent a constant reference to a string, i.e.
Analysis the ScalarEvolution expression for r is this
std::unique_ptr< InstructionSelector > InstSelector
bool has64BitSupport() const
has64BitSupport - Return true if the selected CPU supports 64-bit instructions, regardless of whether...
bool shouldAssumeDSOLocal(const Module &M, const GlobalValue *GV) const
AntiDepBreakMode getAntiDepBreakMode() const override
const PPCTargetLowering * getTargetLowering() const override
This class provides the information for the PowerPC target legalizer for GlobalISel.
bool enableMachinePipeliner() const override
Pipeliner customization.
SubArchType getSubArch() const
get the parsed subarchitecture type for this triple.
PPCSubtarget & initializeSubtargetDependencies(StringRef CPU, StringRef FS)
initializeSubtargetDependencies - Initializes using a CPU and feature string so that we can use initi...
CodeModel::Model getCodeModel() const
Returns the code model.
Common code between 32-bit and 64-bit PowerPC targets.
bool UsePPCPostRASchedStrategy
bool isUsingPCRelativeCalls() const
InstructionSelector * getInstructionSelector() const override
const char LLVMTargetMachineRef TM
void getCriticalPathRCs(RegClassVector &CriticalPathRCs) const override
Define a generic scheduling policy for targets that don't provide their own MachineSchedStrategy.
std::unique_ptr< CallLowering > CallLoweringInfo
GlobalISel related APIs.
static cl::opt< bool > UseSubRegLiveness("ppc-track-subreg-liveness", cl::desc("Enable subregister liveness tracking for PPC"), cl::Hidden)