LLVM  13.0.0git
PPCInstructionSelector.cpp
Go to the documentation of this file.
1 //===- PPCInstructionSelector.cpp --------------------------------*- C++ -*-==//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 /// \file
9 /// This file implements the targeting of the InstructionSelector class for
10 /// PowerPC.
11 //===----------------------------------------------------------------------===//
12 
13 #include "PPCInstrInfo.h"
14 #include "PPCRegisterBankInfo.h"
15 #include "PPCSubtarget.h"
16 #include "PPCTargetMachine.h"
20 #include "llvm/IR/IntrinsicsPowerPC.h"
21 #include "llvm/Support/Debug.h"
22 
23 #define DEBUG_TYPE "ppc-gisel"
24 
25 using namespace llvm;
26 
27 namespace {
28 
29 #define GET_GLOBALISEL_PREDICATE_BITSET
30 #include "PPCGenGlobalISel.inc"
31 #undef GET_GLOBALISEL_PREDICATE_BITSET
32 
33 class PPCInstructionSelector : public InstructionSelector {
34 public:
35  PPCInstructionSelector(const PPCTargetMachine &TM, const PPCSubtarget &STI,
36  const PPCRegisterBankInfo &RBI);
37 
38  bool select(MachineInstr &I) override;
39  static const char *getName() { return DEBUG_TYPE; }
40 
41 private:
42  /// tblgen generated 'select' implementation that is used as the initial
43  /// selector for the patterns that do not require complex C++.
44  bool selectImpl(MachineInstr &I, CodeGenCoverage &CoverageInfo) const;
45 
46  const PPCInstrInfo &TII;
47  const PPCRegisterInfo &TRI;
48  const PPCRegisterBankInfo &RBI;
49 
50 #define GET_GLOBALISEL_PREDICATES_DECL
51 #include "PPCGenGlobalISel.inc"
52 #undef GET_GLOBALISEL_PREDICATES_DECL
53 
54 #define GET_GLOBALISEL_TEMPORARIES_DECL
55 #include "PPCGenGlobalISel.inc"
56 #undef GET_GLOBALISEL_TEMPORARIES_DECL
57 };
58 
59 } // end anonymous namespace
60 
61 #define GET_GLOBALISEL_IMPL
62 #include "PPCGenGlobalISel.inc"
63 #undef GET_GLOBALISEL_IMPL
64 
65 PPCInstructionSelector::PPCInstructionSelector(const PPCTargetMachine &TM,
66  const PPCSubtarget &STI,
67  const PPCRegisterBankInfo &RBI)
68  : InstructionSelector(), TII(*STI.getInstrInfo()),
69  TRI(*STI.getRegisterInfo()), RBI(RBI),
71 #include "PPCGenGlobalISel.inc"
74 #include "PPCGenGlobalISel.inc"
76 {
77 }
78 
80  if (selectImpl(I, *CoverageInfo))
81  return true;
82  return false;
83 }
84 
85 namespace llvm {
88  const PPCSubtarget &Subtarget,
89  const PPCRegisterBankInfo &RBI) {
90  return new PPCInstructionSelector(TM, Subtarget, RBI);
91 }
92 } // end namespace llvm
llvm::PPCRegisterInfo
Definition: PPCRegisterInfo.h:57
getName
static StringRef getName(Value *V)
Definition: ProvenanceAnalysisEvaluator.cpp:42
llvm
Definition: AllocatorList.h:23
GET_GLOBALISEL_PREDICATES_INIT
#define GET_GLOBALISEL_PREDICATES_INIT
llvm::PPCInstrInfo
Definition: PPCInstrInfo.h:186
TRI
unsigned const TargetRegisterInfo * TRI
Definition: MachineSink.cpp:1567
PPCRegisterBankInfo.h
PPCSubtarget.h
select
into xmm2 addss xmm2 xmm1 xmm3 addss xmm3 movaps xmm0 unpcklps xmm0 ret seems silly when it could just be one addps Expand libm rounding functions main should enable SSE DAZ mode and other fast SSE modes Think about doing i64 math in SSE regs on x86 This testcase should have no SSE instructions in and only one load from a constant double ret double C the select is being which prevents the dag combiner from turning select(load CPI1)
llvm::PPCSubtarget
Definition: PPCSubtarget.h:71
GET_GLOBALISEL_TEMPORARIES_INIT
#define GET_GLOBALISEL_TEMPORARIES_INIT
llvm::createPPCInstructionSelector
InstructionSelector * createPPCInstructionSelector(const PPCTargetMachine &TM, const PPCSubtarget &Subtarget, const PPCRegisterBankInfo &RBI)
Definition: PPCInstructionSelector.cpp:87
TII
const HexagonInstrInfo * TII
Definition: HexagonCopyToCombine.cpp:129
include
include(LLVM-Build) add_subdirectory(IR) add_subdirectory(FuzzMutate) add_subdirectory(FileCheck) add_subdirectory(InterfaceStub) add_subdirectory(IRReader) add_subdirectory(CodeGen) add_subdirectory(BinaryFormat) add_subdirectory(Bitcode) add_subdirectory(Bitstream) add_subdirectory(DWARFLinker) add_subdirectory(Extensions) add_subdirectory(Frontend) add_subdirectory(Transforms) add_subdirectory(Linker) add_subdirectory(Analysis) add_subdirectory(LTO) add_subdirectory(MC) add_subdirectory(MCA) add_subdirectory(Object) add_subdirectory(ObjectYAML) add_subdirectory(Option) add_subdirectory(Remarks) add_subdirectory(DebugInfo) add_subdirectory(ExecutionEngine) add_subdirectory(Target) add_subdirectory(AsmParser) add_subdirectory(LineEditor) add_subdirectory(ProfileData) add_subdirectory(Passes) add_subdirectory(TextAPI) add_subdirectory(ToolDrivers) add_subdirectory(XRay) if(LLVM_INCLUDE_TESTS) add_subdirectory(Testing) endif() add_subdirectory(WindowsManifest) set(LLVMCONFIGLIBRARYDEPENDENCIESINC "$
Definition: CMakeLists.txt:1
InstructionSelector.h
llvm::InstructionSelector
Provides the logic to select generic machine instructions.
Definition: InstructionSelector.h:423
llvm::CodeGenCoverage
Definition: CodeGenCoverage.h:20
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:64
PPCInstrInfo.h
I
#define I(x, y, z)
Definition: MD5.cpp:59
DEBUG_TYPE
#define DEBUG_TYPE
Definition: PPCInstructionSelector.cpp:23
InstructionSelectorImpl.h
llvm::PPCTargetMachine
Common code between 32-bit and 64-bit PowerPC targets.
Definition: PPCTargetMachine.h:25
TM
const char LLVMTargetMachineRef TM
Definition: PassBuilderBindings.cpp:47
llvm::PPCRegisterBankInfo
Definition: PPCRegisterBankInfo.h:33
MachineFunction.h
llvm::mca::selectImpl
static uint64_t selectImpl(uint64_t CandidateMask, uint64_t &NextInSequenceMask)
Definition: ResourceManager.cpp:26
Debug.h
PPCTargetMachine.h