LLVM 17.0.0git
PPCRegisterBankInfo.h
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1//===-- PPCRegisterBankInfo.h -----------------------------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8///
9/// \file
10/// This file declares the targeting of the RegisterBankInfo class for PowerPC.
11///
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_LIB_TARGET_PPC_GISEL_PPCREGISTERBANKINFO_H
15#define LLVM_LIB_TARGET_PPC_GISEL_PPCREGISTERBANKINFO_H
16
20
21#define GET_REGBANK_DECLARATIONS
22#include "PPCGenRegisterBank.inc"
23
24namespace llvm {
25class TargetRegisterInfo;
26
28protected:
35 PMI_CR = 5,
37 };
38
42
43 /// Get the pointer to the ValueMapping representing the RegisterBank
44 /// at \p RBIdx.
45 ///
46 /// The returned mapping works for instructions with the same kind of
47 /// operands for up to 3 operands.
48 ///
49 /// \pre \p RBIdx != PartialMappingIdx::None
52
53 /// Get the pointer to the ValueMapping of the operands of a copy
54 /// instruction from the \p SrcBankID register bank to the \p DstBankID
55 /// register bank with a size of \p Size.
57 getCopyMapping(unsigned DstBankID, unsigned SrcBankID, unsigned Size);
58
59#define GET_TARGET_REGBANK_CLASS
60#include "PPCGenRegisterBank.inc"
61};
62
64public:
66
68 LLT Ty) const override;
69 const InstructionMapping &
70 getInstrMapping(const MachineInstr &MI) const override;
71
73 getInstrAlternativeMappings(const MachineInstr &MI) const override;
74
75private:
76 /// Maximum recursion depth for hasFPConstraints.
77 const unsigned MaxFPRSearchDepth = 2;
78
79 /// \returns true if \p MI only uses and defines FPRs.
80 bool hasFPConstraints(const MachineInstr &MI, const MachineRegisterInfo &MRI,
82 unsigned Depth = 0) const;
83
84 /// \returns true if \p MI only uses FPRs.
85 bool onlyUsesFP(const MachineInstr &MI, const MachineRegisterInfo &MRI,
86 const TargetRegisterInfo &TRI, unsigned Depth = 0) const;
87
88 /// \returns true if \p MI only defines FPRs.
89 bool onlyDefinesFP(const MachineInstr &MI, const MachineRegisterInfo &MRI,
90 const TargetRegisterInfo &TRI, unsigned Depth = 0) const;
91};
92} // namespace llvm
93
94#endif
unsigned const MachineRegisterInfo * MRI
uint64_t Size
IRTranslator LLVM IR MI
unsigned const TargetRegisterInfo * TRI
Representation of each machine instruction.
Definition: MachineInstr.h:68
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
static const RegisterBankInfo::ValueMapping * getCopyMapping(unsigned DstBankID, unsigned SrcBankID, unsigned Size)
Get the pointer to the ValueMapping of the operands of a copy instruction from the SrcBankID register...
static RegisterBankInfo::PartialMapping PartMappings[]
static RegisterBankInfo::ValueMapping ValMappings[]
static const RegisterBankInfo::ValueMapping * getValueMapping(PartialMappingIdx RBIdx)
Get the pointer to the ValueMapping representing the RegisterBank at RBIdx.
static PartialMappingIdx BankIDToCopyMapIdx[]
const RegisterBank & getRegBankFromRegClass(const TargetRegisterClass &RC, LLT Ty) const override
Get a register bank that covers RC.
InstructionMappings getInstrAlternativeMappings(const MachineInstr &MI) const override
Get the alternative mappings for MI.
const InstructionMapping & getInstrMapping(const MachineInstr &MI) const override
Get the mapping of the different operands of MI on the register bank.
Helper class that represents how the value of an instruction may be mapped and what is the related co...
Holds all the information related to register banks.
This class implements the register bank concept.
Definition: RegisterBank.h:28
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1200
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
Helper struct that represents how a value is partially mapped into a register.
Helper struct that represents how a value is mapped through different register banks.