llvm::InstructionSelector Class Reference

#include "llvm/CodeGen/GlobalISel/InstructionSelector.h"

Inheritance diagram for llvm::InstructionSelector:

Public Member Functions
virtual	~InstructionSelector ()
virtual bool	select (MachineInstr &I)=0
	Select the (possibly generic) instruction I to only use target-specific opcodes.
void	setTargetPassConfig (const TargetPassConfig *T)
void	setRemarkEmitter (MachineOptimizationRemarkEmitter *M)
Public Member Functions inherited from llvm::GIMatchTableExecutor
virtual	~GIMatchTableExecutor ()=default
virtual void	setupGeneratedPerFunctionState (MachineFunction &MF)=0
virtual void	setupMF (MachineFunction &mf, GISelKnownBits *kb, CodeGenCoverage *covinfo=nullptr, ProfileSummaryInfo *psi=nullptr, BlockFrequencyInfo *bfi=nullptr)
	Setup per-MF executor state.

Protected Attributes
const TargetPassConfig *	TPC = nullptr
MachineOptimizationRemarkEmitter *	MORE = nullptr

Additional Inherited Members
Public Attributes inherited from llvm::GIMatchTableExecutor
CodeGenCoverage *	CoverageInfo = nullptr
GISelKnownBits *	KB = nullptr
MachineFunction *	MF = nullptr
ProfileSummaryInfo *	PSI = nullptr
BlockFrequencyInfo *	BFI = nullptr
MachineBasicBlock *	CurMBB = nullptr
Protected Types inherited from llvm::GIMatchTableExecutor
using	ComplexRendererFns = std::optional< SmallVector< std::function< void(MachineInstrBuilder &)>, 4 > >
using	RecordedMIVector = SmallVector< MachineInstr *, 4 >
using	NewMIVector = SmallVector< MachineInstrBuilder, 4 >
Protected Member Functions inherited from llvm::GIMatchTableExecutor
bool	shouldOptForSize (const MachineFunction *MF) const
	GIMatchTableExecutor ()
template<class TgtExecutor , class PredicateBitset , class ComplexMatcherMemFn , class CustomRendererFn >
bool	executeMatchTable (TgtExecutor &Exec, MatcherState &State, const ExecInfoTy< PredicateBitset, ComplexMatcherMemFn, CustomRendererFn > &ExecInfo, MachineIRBuilder &Builder, const int64_t *MatchTable, const TargetInstrInfo &TII, MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI, const RegisterBankInfo &RBI, const PredicateBitset &AvailableFeatures, CodeGenCoverage *CoverageInfo) const
	Execute a given matcher table and return true if the match was successful and false otherwise.
virtual const int64_t *	getMatchTable () const
virtual bool	testImmPredicate_I64 (unsigned, int64_t) const
virtual bool	testImmPredicate_APInt (unsigned, const APInt &) const
virtual bool	testImmPredicate_APFloat (unsigned, const APFloat &) const
virtual bool	testMIPredicate_MI (unsigned, const MachineInstr &, const MatcherState &State) const
virtual bool	testSimplePredicate (unsigned) const
virtual void	runCustomAction (unsigned, const MatcherState &State, NewMIVector &OutMIs) const
bool	isOperandImmEqual (const MachineOperand &MO, int64_t Value, const MachineRegisterInfo &MRI, bool Splat=false) const
bool	isBaseWithConstantOffset (const MachineOperand &Root, const MachineRegisterInfo &MRI) const
	Return true if the specified operand is a G_PTR_ADD with a G_CONSTANT on the right-hand side.
bool	isObviouslySafeToFold (MachineInstr &MI, MachineInstr &IntoMI) const
	Return true if MI can obviously be folded into IntoMI.

Detailed Description

Definition at line 19 of file InstructionSelector.h.

Constructor & Destructor Documentation

~InstructionSelector()

llvm::InstructionSelector::~InstructionSelector ( )

virtualdefault

Member Function Documentation

select()

virtual bool llvm::InstructionSelector::select ( MachineInstr &  I )

pure virtual

Select the (possibly generic) instruction I to only use target-specific opcodes.

It is OK to insert multiple instructions, but they cannot be generic pre-isel instructions.

Returns

whether selection succeeded.

Precondition

I.getParent() && I.getParent()->getParent()

Postcondition

if returns true: for I in all mutated/inserted instructions: !isPreISelGenericOpcode(I.getOpcode())

Implemented in llvm::AMDGPUInstructionSelector.

Referenced by llvm::InstructionSelect::runOnMachineFunction().

setRemarkEmitter()

void llvm::InstructionSelector::setRemarkEmitter ( MachineOptimizationRemarkEmitter *  M )

inline

Definition at line 37 of file InstructionSelector.h.

References MORE.

Referenced by llvm::InstructionSelect::runOnMachineFunction().

setTargetPassConfig()

void llvm::InstructionSelector::setTargetPassConfig ( const TargetPassConfig *  T )

inline

Definition at line 35 of file InstructionSelector.h.

References T, and TPC.

Referenced by llvm::InstructionSelect::runOnMachineFunction().

Member Data Documentation

MORE

MachineOptimizationRemarkEmitter* llvm::InstructionSelector::MORE = nullptr

protected

Definition at line 41 of file InstructionSelector.h.

Referenced by setRemarkEmitter().

TPC

const TargetPassConfig* llvm::InstructionSelector::TPC = nullptr

protected

Definition at line 40 of file InstructionSelector.h.

Referenced by setTargetPassConfig().

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The documentation for this class was generated from the following files:

• include/llvm/CodeGen/GlobalISel/InstructionSelector.h
• lib/CodeGen/GlobalISel/InstructionSelector.cpp