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13 #ifndef LLVM_LIB_TARGET_SPARC_SPARCINSTRINFO_H
14 #define LLVM_LIB_TARGET_SPARC_SPARCINSTRINFO_H
19 #define GET_INSTRINFO_HEADER
20 #include "SparcGenInstrInfo.inc"
41 virtual void anchor();
70 bool AllowModify =
false)
const override;
73 int *BytesRemoved =
nullptr)
const override;
78 int *BytesAdded =
nullptr)
const override;
85 bool KillSrc)
const override;
unsigned removeBranch(MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const override
This is an optimization pass for GlobalISel generic memory operations.
bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify=false) const override
unsigned isLoadFromStackSlot(const MachineInstr &MI, int &FrameIndex) const override
isLoadFromStackSlot - If the specified machine instruction is a direct load from a stack slot,...
const SparcRegisterInfo & getRegisterInfo() const
getRegisterInfo - TargetInstrInfo is a superset of MRegister info.
SparcInstrInfo(SparcSubtarget &ST)
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
unsigned const TargetRegisterInfo * TRI
void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, Register VReg) const override
const SmallVectorImpl< MachineOperand > MachineBasicBlock * TBB
Representation of each machine instruction.
unsigned isStoreToStackSlot(const MachineInstr &MI, int &FrameIndex) const override
isStoreToStackSlot - If the specified machine instruction is a direct store to a stack slot,...
void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, Register VReg) const override
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
SmallVector< MachineOperand, 4 > Cond
MachineBasicBlock MachineBasicBlock::iterator MBBI
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const override
Wrapper class representing virtual and physical registers.
void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg, bool KillSrc) const override
bool expandPostRAPseudo(MachineInstr &MI) const override
Register getGlobalBaseReg(MachineFunction *MF) const
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
bool reverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const override
Wrapper class representing physical registers. Should be passed by value.