#include "Target/Sparc/SparcInstrInfo.h"

Inheritance diagram for llvm::SparcInstrInfo:

Public Member Functions
	SparcInstrInfo (const SparcSubtarget &ST)
const SparcRegisterInfo &	getRegisterInfo () const
	getRegisterInfo - TargetInstrInfo is a superset of MRegister info.
const TargetRegisterClass *	getInlineAsmMemoryOperandRegClass (InlineAsm::ConstraintCode C) const override
Register	isLoadFromStackSlot (const MachineInstr &MI, int &FrameIndex, TypeSize &MemBytes) const override
	isLoadFromStackSlot - If the specified machine instruction is a direct load from a stack slot, return the virtual or physical register number of the destination along with the FrameIndex of the loaded stack slot.
Register	isStoreToStackSlot (const MachineInstr &MI, int &FrameIndex, TypeSize &MemBytes) const override
	isStoreToStackSlot - If the specified machine instruction is a direct store to a stack slot, return the virtual or physical register number of the source reg along with the FrameIndex of the loaded stack slot.
MachineBasicBlock *	getBranchDestBlock (const MachineInstr &MI) const override
bool	analyzeBranch (MachineBasicBlock &MBB, MachineBasicBlock &TBB, MachineBasicBlock &FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify=false) const override
unsigned	removeBranch (MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const override
unsigned	insertBranch (MachineBasicBlock &MBB, MachineBasicBlock TBB, MachineBasicBlock FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const override
void	insertIndirectBranch (MachineBasicBlock &MBB, MachineBasicBlock &NewDestBB, MachineBasicBlock &RestoreBB, const DebugLoc &DL, int64_t BrOffset, RegScavenger *RS) const override
bool	reverseBranchCondition (SmallVectorImpl< MachineOperand > &Cond) const override
bool	isBranchOffsetInRange (unsigned BranchOpc, int64_t Offset) const override
	Determine if the branch target is in range.
void	copyPhysReg (MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, Register DestReg, Register SrcReg, bool KillSrc, bool RenamableDest=false, bool RenamableSrc=false) const override
void	storeRegToStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, Register VReg, MachineInstr::MIFlag Flags=MachineInstr::NoFlags) const override
void	loadRegFromStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register DestReg, int FrameIndex, const TargetRegisterClass *RC, Register VReg, unsigned SubReg=0, MachineInstr::MIFlag Flags=MachineInstr::NoFlags) const override
Register	getGlobalBaseReg (MachineFunction *MF) const
unsigned	getInstSizeInBytes (const MachineInstr &MI) const override
	GetInstSize - Return the number of bytes of code the specified instruction may be.
bool	analyzeCompare (const MachineInstr &MI, Register &SrcReg, Register &SrcReg2, int64_t &CmpMask, int64_t &CmpValue) const override
bool	optimizeCompareInstr (MachineInstr &CmpInstr, Register SrcReg, Register SrcReg2, int64_t CmpMask, int64_t CmpValue, const MachineRegisterInfo *MRI) const override
bool	isSchedulingBoundary (const MachineInstr &MI, const MachineBasicBlock *MBB, const MachineFunction &MF) const override
bool	expandPostRAPseudo (MachineInstr &MI) const override
bool	needsUnimp (const MachineInstr &MI, unsigned &StructSize) const

Detailed Description

Definition at line 38 of file SparcInstrInfo.h.

Constructor & Destructor Documentation

◆ SparcInstrInfo()

SparcInstrInfo::SparcInstrInfo ( const SparcSubtarget & ST )

explicit

Definition at line 33 of file SparcInstrInfo.cpp.

Member Function Documentation

◆ analyzeBranch()

bool SparcInstrInfo::analyzeBranch	(	MachineBasicBlock &	MBB,
		MachineBasicBlock *&	TBB,
		MachineBasicBlock *&	FBB,
		SmallVectorImpl< MachineOperand > &	Cond,
		bool	AllowModify = false ) const

override

Definition at line 284 of file SparcInstrInfo.cpp.

References Cond, llvm::MachineInstr::eraseFromParent(), llvm::MachineOperand::getMBB(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), I, llvm::isCondBranchOpcode(), llvm::isIndirectBranchOpcode(), llvm::isUncondBranchOpcode(), MBB, parseCondBranch(), and TBB.

◆ analyzeCompare()

bool SparcInstrInfo::analyzeCompare	(	const MachineInstr &	MI,
		Register &	SrcReg,
		Register &	SrcReg2,
		int64_t &	CmpMask,
		int64_t &	CmpValue ) const

override

Definition at line 812 of file SparcInstrInfo.cpp.

References MI.

◆ copyPhysReg()

void SparcInstrInfo::copyPhysReg	(	MachineBasicBlock &	MBB,
		MachineBasicBlock::iterator	I,
		const DebugLoc &	DL,
		Register	DestReg,
		Register	SrcReg,
		bool	KillSrc,
		bool	RenamableDest = false,
		bool	RenamableSrc = false ) const

override

Definition at line 548 of file SparcInstrInfo.cpp.

References llvm::MachineInstrBuilder::addReg(), llvm::MachineInstr::addRegisterDefined(), llvm::MachineInstr::addRegisterKilled(), assert(), llvm::BuildMI(), contains(), DL, llvm::get(), llvm::MachineInstrBuilder::getInstr(), llvm::getKillRegState(), getRegisterInfo(), I, llvm_unreachable, MBB, and TRI.

◆ expandPostRAPseudo()

bool SparcInstrInfo::expandPostRAPseudo ( MachineInstr & MI ) const

override

Definition at line 951 of file SparcInstrInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), llvm::get(), MBB, MI, and llvm::Offset.

◆ getBranchDestBlock()

MachineBasicBlock * SparcInstrInfo::getBranchDestBlock ( const MachineInstr & MI ) const

override

Definition at line 252 of file SparcInstrInfo.cpp.

References llvm_unreachable, and MI.

◆ getGlobalBaseReg()

Register SparcInstrInfo::getGlobalBaseReg ( MachineFunction * MF ) const

Definition at line 717 of file SparcInstrInfo.cpp.

References llvm::MachineBasicBlock::begin(), llvm::BuildMI(), llvm::MachineFunction::front(), llvm::get(), llvm::SparcMachineFunctionInfo::getGlobalBaseReg(), llvm::MachineFunction::getInfo(), llvm::MachineFunction::getRegInfo(), MBBI, llvm::SparcMachineFunctionInfo::setGlobalBaseReg(), and llvm::MachineInstrBuilder::setOperandDead().

◆ getInlineAsmMemoryOperandRegClass()

const TargetRegisterClass * SparcInstrInfo::getInlineAsmMemoryOperandRegClass ( InlineAsm::ConstraintCode C ) const

override

Definition at line 37 of file SparcInstrInfo.cpp.

References C().

◆ getInstSizeInBytes()

unsigned SparcInstrInfo::getInstSizeInBytes ( const MachineInstr & MI ) const

override

GetInstSize - Return the number of bytes of code the specified instruction may be.

This returns the maximum number of bytes.

Definition at line 774 of file SparcInstrInfo.cpp.

References llvm::get(), llvm::TargetMachine::getCodeModel(), llvm::TargetMachine::getMCAsmInfo(), llvm::MachineFunction::getTarget(), llvm::TargetMachine::isPositionIndependent(), llvm::CodeModel::Large, llvm_unreachable, llvm::CodeModel::Medium, MI, needsUnimp(), and llvm::CodeModel::Small.

Referenced by removeBranch().

◆ getRegisterInfo()

const SparcRegisterInfo & llvm::SparcInstrInfo::getRegisterInfo ( ) const

inline

getRegisterInfo - TargetInstrInfo is a superset of MRegister info.

As such, whenever a client has an instance of instruction info, it should always be able to get register info as well (through this method).

Definition at line 49 of file SparcInstrInfo.h.

Referenced by copyPhysReg(), and optimizeCompareInstr().

◆ insertBranch()

unsigned SparcInstrInfo::insertBranch	(	MachineBasicBlock &	MBB,
		MachineBasicBlock *	TBB,
		MachineBasicBlock *	FBB,
		ArrayRef< MachineOperand >	Cond,
		const DebugLoc &	DL,
		int *	BytesAdded = nullptr ) const

override

Definition at line 367 of file SparcInstrInfo.cpp.

References llvm::MachineInstrBuilder::add(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMBB(), assert(), llvm::BuildMI(), CC, Cond, DL, llvm::get(), isRegCondBranchOpcode(), MBB, Opc, and TBB.

◆ insertIndirectBranch()

void SparcInstrInfo::insertIndirectBranch	(	MachineBasicBlock &	MBB,
		MachineBasicBlock &	NewDestBB,
		MachineBasicBlock &	RestoreBB,
		const DebugLoc &	DL,
		int64_t	BrOffset,
		RegScavenger *	RS ) const

override

◆ isBranchOffsetInRange()

bool SparcInstrInfo::isBranchOffsetInRange	(	unsigned	BranchOpc,
		int64_t	Offset ) const

override

Determine if the branch target is in range.

Definition at line 508 of file SparcInstrInfo.cpp.

References assert(), llvm::isIntN(), llvm_unreachable, and llvm::Offset.

◆ isLoadFromStackSlot()

Register SparcInstrInfo::isLoadFromStackSlot	(	const MachineInstr &	MI,
		int &	FrameIndex,
		TypeSize &	MemBytes ) const

override

isLoadFromStackSlot - If the specified machine instruction is a direct load from a stack slot, return the virtual or physical register number of the destination along with the FrameIndex of the loaded stack slot.

If not, return 0. This predicate must return 0 if the instruction has any side effects other than loading from the stack slot.

Definition at line 60 of file SparcInstrInfo.cpp.

References llvm::TypeSize::getFixed(), and MI.

◆ isSchedulingBoundary()

bool SparcInstrInfo::isSchedulingBoundary	(	const MachineInstr &	MI,
		const MachineBasicBlock *	MBB,
		const MachineFunction &	MF ) const

override

Definition at line 42 of file SparcInstrInfo.cpp.

References llvm::TargetInstrInfo::isSchedulingBoundary(), MBB, and MI.

◆ isStoreToStackSlot()

Register SparcInstrInfo::isStoreToStackSlot	(	const MachineInstr &	MI,
		int &	FrameIndex,
		TypeSize &	MemBytes ) const

override

isStoreToStackSlot - If the specified machine instruction is a direct store to a stack slot, return the virtual or physical register number of the source reg along with the FrameIndex of the loaded stack slot.

If not, return 0. This predicate must return 0 if the instruction has any side effects other than storing to the stack slot.

Definition at line 95 of file SparcInstrInfo.cpp.

References llvm::TypeSize::getFixed(), and MI.

◆ loadRegFromStackSlot()

void SparcInstrInfo::loadRegFromStackSlot	(	MachineBasicBlock &	MBB,
		MachineBasicBlock::iterator	MBBI,
		Register	DestReg,
		int	FrameIndex,
		const TargetRegisterClass *	RC,
		Register	VReg,
		unsigned	SubReg = 0,
		MachineInstr::MIFlag	Flags = MachineInstr::NoFlags ) const

override

Definition at line 678 of file SparcInstrInfo.cpp.

References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMemOperand(), llvm::BuildMI(), DL, llvm::get(), llvm::MachinePointerInfo::getFixedStack(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getMachineMemOperand(), llvm::MachineFrameInfo::getObjectAlign(), llvm::MachineFrameInfo::getObjectSize(), I, llvm_unreachable, MBB, and llvm::MachineMemOperand::MOLoad.

Referenced by insertIndirectBranch().

◆ needsUnimp()

bool SparcInstrInfo::needsUnimp	(	const MachineInstr &	MI,
		unsigned &	StructSize ) const

Definition at line 740 of file SparcInstrInfo.cpp.

References llvm::MachineOperand::getImm(), llvm::MachineOperand::isImm(), llvm_unreachable, and MI.

Referenced by getInstSizeInBytes().

◆ optimizeCompareInstr()

bool SparcInstrInfo::optimizeCompareInstr	(	MachineInstr &	CmpInstr,
		Register	SrcReg,
		Register	SrcReg2,
		int64_t	CmpMask,
		int64_t	CmpValue,
		const MachineRegisterInfo *	MRI ) const

override

Definition at line 838 of file SparcInstrInfo.cpp.

References llvm::any_of(), C(), llvm::MachineBasicBlock::end(), llvm::MachineInstr::eraseFromParent(), llvm::get(), llvm::MachineInstr::getParent(), getRegisterInfo(), I, llvm::SPCC::ICC_E, llvm::SPCC::ICC_NE, MBB, MI, MRI, and TRI.

◆ removeBranch()

unsigned SparcInstrInfo::removeBranch	(	MachineBasicBlock &	MBB,
		int *	BytesRemoved = nullptr ) const

override

Definition at line 474 of file SparcInstrInfo.cpp.

References llvm::Count, getInstSizeInBytes(), I, llvm::isCondBranchOpcode(), llvm::isUncondBranchOpcode(), and MBB.

◆ reverseBranchCondition()

bool SparcInstrInfo::reverseBranchCondition ( SmallVectorImpl< MachineOperand > & Cond ) const

override

Definition at line 500 of file SparcInstrInfo.cpp.

References assert(), CC, Cond, and GetOppositeBranchCondition().

◆ storeRegToStackSlot()

void SparcInstrInfo::storeRegToStackSlot	(	MachineBasicBlock &	MBB,
		MachineBasicBlock::iterator	MBBI,
		Register	SrcReg,
		bool	isKill,
		int	FrameIndex,
		const TargetRegisterClass *	RC,
		Register	VReg,
		MachineInstr::MIFlag	Flags = MachineInstr::NoFlags ) const

override

The documentation for this class was generated from the following files:

lib/Target/Sparc/SparcInstrInfo.h
lib/Target/Sparc/SparcInstrInfo.cpp

Public Member Functions

Detailed Description

Constructor & Destructor Documentation

◆ SparcInstrInfo()

Member Function Documentation

◆ analyzeBranch()

◆ analyzeCompare()

◆ copyPhysReg()

◆ expandPostRAPseudo()

◆ getBranchDestBlock()

◆ getGlobalBaseReg()

◆ getInlineAsmMemoryOperandRegClass()

◆ getInstSizeInBytes()

◆ getRegisterInfo()

◆ insertBranch()

◆ insertIndirectBranch()

◆ isBranchOffsetInRange()

◆ isLoadFromStackSlot()

◆ isSchedulingBoundary()

◆ isStoreToStackSlot()

◆ loadRegFromStackSlot()

◆ needsUnimp()

◆ optimizeCompareInstr()

◆ removeBranch()

◆ reverseBranchCondition()

◆ storeRegToStackSlot()