LLVM  13.0.0git
WebAssemblyAsmBackend.cpp
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1 //===-- WebAssemblyAsmBackend.cpp - WebAssembly Assembler Backend ---------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 ///
9 /// \file
10 /// This file implements the WebAssemblyAsmBackend class.
11 ///
12 //===----------------------------------------------------------------------===//
13 
16 #include "llvm/MC/MCAsmBackend.h"
17 #include "llvm/MC/MCAssembler.h"
18 #include "llvm/MC/MCDirectives.h"
19 #include "llvm/MC/MCExpr.h"
21 #include "llvm/MC/MCObjectWriter.h"
23 #include "llvm/MC/MCSymbol.h"
27 
28 using namespace llvm;
29 
30 namespace {
31 
32 class WebAssemblyAsmBackend final : public MCAsmBackend {
33  bool Is64Bit;
34  bool IsEmscripten;
35 
36 public:
37  explicit WebAssemblyAsmBackend(bool Is64Bit, bool IsEmscripten)
38  : MCAsmBackend(support::little), Is64Bit(Is64Bit),
39  IsEmscripten(IsEmscripten) {}
40 
41  unsigned getNumFixupKinds() const override {
43  }
44 
45  const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
46 
47  void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
49  uint64_t Value, bool IsPCRel,
50  const MCSubtargetInfo *STI) const override;
51 
52  std::unique_ptr<MCObjectTargetWriter>
53  createObjectTargetWriter() const override;
54 
55  // No instruction requires relaxation
56  bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
57  const MCRelaxableFragment *DF,
58  const MCAsmLayout &Layout) const override {
59  return false;
60  }
61 
62  bool writeNopData(raw_ostream &OS, uint64_t Count) const override;
63 };
64 
65 const MCFixupKindInfo &
66 WebAssemblyAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
68  // This table *must* be in the order that the fixup_* kinds are defined in
69  // WebAssemblyFixupKinds.h.
70  //
71  // Name Offset (bits) Size (bits) Flags
72  {"fixup_sleb128_i32", 0, 5 * 8, 0},
73  {"fixup_sleb128_i64", 0, 10 * 8, 0},
74  {"fixup_uleb128_i32", 0, 5 * 8, 0},
75  {"fixup_uleb128_i64", 0, 10 * 8, 0},
76  };
77 
80 
81  assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() &&
82  "Invalid kind!");
83  return Infos[Kind - FirstTargetFixupKind];
84 }
85 
86 bool WebAssemblyAsmBackend::writeNopData(raw_ostream &OS,
87  uint64_t Count) const {
88  for (uint64_t I = 0; I < Count; ++I)
89  OS << char(WebAssembly::Nop);
90 
91  return true;
92 }
93 
95  const MCFixup &Fixup,
96  const MCValue &Target,
98  uint64_t Value, bool IsPCRel,
99  const MCSubtargetInfo *STI) const {
100  const MCFixupKindInfo &Info = getFixupKindInfo(Fixup.getKind());
101  assert(Info.Flags == 0 && "WebAssembly does not use MCFixupKindInfo flags");
102 
103  unsigned NumBytes = alignTo(Info.TargetSize, 8) / 8;
104  if (Value == 0)
105  return; // Doesn't change encoding.
106 
107  // Shift the value into position.
108  Value <<= Info.TargetOffset;
109 
110  unsigned Offset = Fixup.getOffset();
111  assert(Offset + NumBytes <= Data.size() && "Invalid fixup offset!");
112 
113  // For each byte of the fragment that the fixup touches, mask in the
114  // bits from the fixup value.
115  for (unsigned I = 0; I != NumBytes; ++I)
116  Data[Offset + I] |= uint8_t((Value >> (I * 8)) & 0xff);
117 }
118 
119 std::unique_ptr<MCObjectTargetWriter>
120 WebAssemblyAsmBackend::createObjectTargetWriter() const {
121  return createWebAssemblyWasmObjectWriter(Is64Bit, IsEmscripten);
122 }
123 
124 } // end anonymous namespace
125 
127  return new WebAssemblyAsmBackend(TT.isArch64Bit(), TT.isOSEmscripten());
128 }
llvm::alignTo
uint64_t alignTo(uint64_t Size, Align A)
Returns a multiple of A needed to store Size bytes.
Definition: Alignment.h:148
llvm
Definition: AllocatorList.h:23
llvm::MCRelaxableFragment
A relaxable fragment holds on to its MCInst, since it may need to be relaxed during the assembler lay...
Definition: MCFragment.h:271
llvm::MCAsmBackend::getFixupKindInfo
virtual const MCFixupKindInfo & getFixupKindInfo(MCFixupKind Kind) const
Get information on a fixup kind.
Definition: MCAsmBackend.cpp:74
llvm::WebAssembly::Nop
static const unsigned Nop
Instruction opcodes emitted via means other than CodeGen.
Definition: WebAssemblyMCTargetDesc.h:133
MCDirectives.h
llvm::Target
Target - Wrapper for Target specific information.
Definition: TargetRegistry.h:124
llvm::FirstTargetFixupKind
@ FirstTargetFixupKind
Definition: MCFixup.h:55
ErrorHandling.h
llvm::WebAssembly::NumTargetFixupKinds
@ NumTargetFixupKinds
Definition: WebAssemblyFixupKinds.h:24
llvm::Triple
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:45
MCAssembler.h
MCWasmObjectWriter.h
MCFixupKindInfo.h
Offset
uint64_t Offset
Definition: ELFObjHandler.cpp:81
llvm::Data
@ Data
Definition: SIMachineScheduler.h:56
llvm::createWebAssemblyWasmObjectWriter
std::unique_ptr< MCObjectTargetWriter > createWebAssemblyWasmObjectWriter(bool Is64Bit, bool IsEmscripten)
Definition: WebAssemblyWasmObjectWriter.cpp:148
llvm::MCAsmBackend
Generic interface to target specific assembler backends.
Definition: MCAsmBackend.h:36
MCAsmBackend.h
llvm::MutableArrayRef
MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...
Definition: ArrayRef.h:305
llvm::support::little
@ little
Definition: Endian.h:27
MCSymbol.h
MCSubtargetInfo.h
llvm::raw_ostream
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:50
Info
Analysis containing CSE Info
Definition: CSEInfo.cpp:27
llvm::lltok::Kind
Kind
Definition: LLToken.h:18
DF
static RegisterPass< DebugifyFunctionPass > DF("debugify-function", "Attach debug info to a function")
WebAssemblyMCTargetDesc.h
llvm::MCAssembler
Definition: MCAssembler.h:60
I
#define I(x, y, z)
Definition: MD5.cpp:59
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::MCFixupKindInfo
Target independent information on a fixup kind.
Definition: MCFixupKindInfo.h:15
Fixup
PowerPC TLS Dynamic Call Fixup
Definition: PPCTLSDynamicCall.cpp:235
MCObjectWriter.h
llvm::MCAsmLayout
Encapsulates the layout of an assembly file at a particular point in time.
Definition: MCAsmLayout.h:28
llvm::MCFixupKind
MCFixupKind
Extensible enumeration to represent the type of a fixup.
Definition: MCFixup.h:21
support
Reimplement select in terms of SEL *We would really like to support but we need to prove that the add doesn t need to overflow between the two bit chunks *Implement pre post increment support(e.g. PR935) *Implement smarter const ant generation for binops with large immediates. A few ARMv6T2 ops should be pattern matched
Definition: README.txt:10
llvm::HexStyle::Asm
@ Asm
0ffh
Definition: MCInstPrinter.h:34
llvm::MCValue
This represents an "assembler immediate".
Definition: MCValue.h:37
raw_ostream.h
llvm::createWebAssemblyAsmBackend
MCAsmBackend * createWebAssemblyAsmBackend(const Triple &TT)
Definition: WebAssemblyAsmBackend.cpp:126
MCExpr.h
llvm::MCSubtargetInfo
Generic base class for all target subtargets.
Definition: MCSubtargetInfo.h:75
llvm::MCFixup
Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...
Definition: MCFixup.h:81
llvm::Value
LLVM Value Representation.
Definition: Value.h:75
WebAssemblyFixupKinds.h