LLVM  14.0.0git
AArch64LegalizerInfo.h
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1 //===- AArch64LegalizerInfo --------------------------------------*- C++ -*-==//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 /// \file
9 /// This file declares the targeting of the Machinelegalizer class for
10 /// AArch64.
11 /// \todo This should be generated by TableGen.
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64MACHINELEGALIZER_H
15 #define LLVM_LIB_TARGET_AARCH64_AARCH64MACHINELEGALIZER_H
16 
21 
22 namespace llvm {
23 
24 class LLVMContext;
25 class AArch64Subtarget;
26 
27 /// This class provides the information for the target register banks.
29 public:
31 
32  bool legalizeCustom(LegalizerHelper &Helper, MachineInstr &MI) const override;
33 
35  MachineInstr &MI) const override;
36 
37 private:
38  bool legalizeVaArg(MachineInstr &MI, MachineRegisterInfo &MRI,
39  MachineIRBuilder &MIRBuilder) const;
40  bool legalizeLoadStore(MachineInstr &MI, MachineRegisterInfo &MRI,
41  MachineIRBuilder &MIRBuilder,
42  GISelChangeObserver &Observer) const;
43  bool legalizeShlAshrLshr(MachineInstr &MI, MachineRegisterInfo &MRI,
44  MachineIRBuilder &MIRBuilder,
45  GISelChangeObserver &Observer) const;
46 
47  bool legalizeSmallCMGlobalValue(MachineInstr &MI, MachineRegisterInfo &MRI,
48  MachineIRBuilder &MIRBuilder,
49  GISelChangeObserver &Observer) const;
50  bool legalizeVectorTrunc(MachineInstr &MI, LegalizerHelper &Helper) const;
51  bool legalizeBitfieldExtract(MachineInstr &MI, MachineRegisterInfo &MRI,
52  LegalizerHelper &Helper) const;
53  bool legalizeRotate(MachineInstr &MI, MachineRegisterInfo &MRI,
54  LegalizerHelper &Helper) const;
55  bool legalizeCTPOP(MachineInstr &MI, MachineRegisterInfo &MRI,
56  LegalizerHelper &Helper) const;
57  bool legalizeAtomicCmpxchg128(MachineInstr &MI, MachineRegisterInfo &MRI,
58  LegalizerHelper &Helper) const;
59  bool legalizeCTTZ(MachineInstr &MI, LegalizerHelper &Helper) const;
60  const AArch64Subtarget *ST;
61 };
62 } // End llvm namespace.
63 #endif
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:105
llvm
This file implements support for optimizing divisions by a constant.
Definition: AllocatorList.h:23
llvm::MachineRegisterInfo
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Definition: MachineRegisterInfo.h:52
llvm::LegalizerHelper
Definition: LegalizerHelper.h:39
LegalizerInfo.h
MachineRegisterInfo.h
llvm::AArch64LegalizerInfo::legalizeIntrinsic
bool legalizeIntrinsic(LegalizerHelper &Helper, MachineInstr &MI) const override
Definition: AArch64LegalizerInfo.cpp:956
llvm::AArch64LegalizerInfo::AArch64LegalizerInfo
AArch64LegalizerInfo(const AArch64Subtarget &ST)
Definition: AArch64LegalizerInfo.cpp:41
llvm::AArch64LegalizerInfo::legalizeCustom
bool legalizeCustom(LegalizerHelper &Helper, MachineInstr &MI) const override
Called for instructions with the Custom LegalizationAction.
Definition: AArch64LegalizerInfo.cpp:797
llvm::MachineIRBuilder
Helper class to build MachineInstr.
Definition: MachineIRBuilder.h:212
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:64
llvm::GISelChangeObserver
Abstract class that contains various methods for clients to notify about changes.
Definition: GISelChangeObserver.h:29
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
llvm::AArch64LegalizerInfo
This class provides the information for the target register banks.
Definition: AArch64LegalizerInfo.h:28
LegalizerHelper.h
llvm::LegalizerInfo
Definition: LegalizerInfo.h:1108
GISelChangeObserver.h
llvm::AArch64Subtarget
Definition: AArch64Subtarget.h:38