LLVM 19.0.0git
Public Member Functions | Protected Member Functions | List of all members
llvm::MachineIRBuilder Class Reference

Helper class to build MachineInstr. More...

#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"

Inheritance diagram for llvm::MachineIRBuilder:
Inheritance graph
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Public Member Functions

 MachineIRBuilder ()=default
 Some constructors for easy use.
 
 MachineIRBuilder (MachineFunction &MF)
 
 MachineIRBuilder (MachineBasicBlock &MBB, MachineBasicBlock::iterator InsPt)
 
 MachineIRBuilder (MachineInstr &MI)
 
 MachineIRBuilder (MachineInstr &MI, GISelChangeObserver &Observer)
 
virtual ~MachineIRBuilder ()=default
 
 MachineIRBuilder (const MachineIRBuilderState &BState)
 
const TargetInstrInfogetTII ()
 
MachineFunctiongetMF ()
 Getter for the function we currently build.
 
const MachineFunctiongetMF () const
 
const DataLayoutgetDataLayout () const
 
LLVMContextgetContext () const
 
const DebugLocgetDL ()
 Getter for DebugLoc.
 
MachineRegisterInfogetMRI ()
 Getter for MRI.
 
const MachineRegisterInfogetMRI () const
 
MachineIRBuilderStategetState ()
 Getter for the State.
 
void setState (const MachineIRBuilderState &NewState)
 Setter for the State.
 
const MachineBasicBlockgetMBB () const
 Getter for the basic block we currently build.
 
MachineBasicBlockgetMBB ()
 
GISelCSEInfogetCSEInfo ()
 
const GISelCSEInfogetCSEInfo () const
 
MachineBasicBlock::iterator getInsertPt ()
 Current insertion point for new instructions.
 
void setInsertPt (MachineBasicBlock &MBB, MachineBasicBlock::iterator II)
 Set the insertion point before the specified position.
 
void setCSEInfo (GISelCSEInfo *Info)
 
void setInstrAndDebugLoc (MachineInstr &MI)
 Set the insertion point to before MI, and set the debug loc to MI's loc.
 
void setChangeObserver (GISelChangeObserver &Observer)
 
GISelChangeObservergetObserver ()
 
void stopObservingChanges ()
 
bool isObservingChanges () const
 
void setDebugLoc (const DebugLoc &DL)
 Set the debug location to DL for all the next build instructions.
 
const DebugLocgetDebugLoc ()
 Get the current instruction's debug location.
 
void setPCSections (MDNode *MD)
 Set the PC sections metadata to MD for all the next build instructions.
 
MDNodegetPCSections ()
 Get the current instruction's PC sections metadata.
 
MachineInstrBuilder buildInstr (unsigned Opcode)
 Build and insert <empty> = Opcode <empty>.
 
MachineInstrBuilder buildInstrNoInsert (unsigned Opcode)
 Build but don't insert <empty> = Opcode <empty>.
 
MachineInstrBuilder insertInstr (MachineInstrBuilder MIB)
 Insert an existing instruction at the insertion point.
 
MachineInstrBuilder buildDirectDbgValue (Register Reg, const MDNode *Variable, const MDNode *Expr)
 Build and insert a DBG_VALUE instruction expressing the fact that the associated Variable lives in Reg (suitably modified by Expr).
 
MachineInstrBuilder buildIndirectDbgValue (Register Reg, const MDNode *Variable, const MDNode *Expr)
 Build and insert a DBG_VALUE instruction expressing the fact that the associated Variable lives in memory at Reg (suitably modified by Expr).
 
MachineInstrBuilder buildFIDbgValue (int FI, const MDNode *Variable, const MDNode *Expr)
 Build and insert a DBG_VALUE instruction expressing the fact that the associated Variable lives in the stack slot specified by FI (suitably modified by Expr).
 
MachineInstrBuilder buildConstDbgValue (const Constant &C, const MDNode *Variable, const MDNode *Expr)
 Build and insert a DBG_VALUE instructions specifying that Variable is given by C (suitably modified by Expr).
 
MachineInstrBuilder buildDbgLabel (const MDNode *Label)
 Build and insert a DBG_LABEL instructions specifying that Label is given.
 
MachineInstrBuilder buildDynStackAlloc (const DstOp &Res, const SrcOp &Size, Align Alignment)
 Build and insert Res = G_DYN_STACKALLOC Size, Align.
 
MachineInstrBuilder buildFrameIndex (const DstOp &Res, int Idx)
 Build and insert Res = G_FRAME_INDEX Idx.
 
MachineInstrBuilder buildGlobalValue (const DstOp &Res, const GlobalValue *GV)
 Build and insert Res = G_GLOBAL_VALUE GV.
 
MachineInstrBuilder buildConstantPool (const DstOp &Res, unsigned Idx)
 Build and insert Res = G_CONSTANT_POOL Idx.
 
MachineInstrBuilder buildPtrAdd (const DstOp &Res, const SrcOp &Op0, const SrcOp &Op1, std::optional< unsigned > Flags=std::nullopt)
 Build and insert Res = G_PTR_ADD Op0, Op1.
 
std::optional< MachineInstrBuildermaterializePtrAdd (Register &Res, Register Op0, const LLT ValueTy, uint64_t Value)
 Materialize and insert Res = G_PTR_ADD Op0, (G_CONSTANT Value)
 
MachineInstrBuilder buildPtrMask (const DstOp &Res, const SrcOp &Op0, const SrcOp &Op1)
 Build and insert Res = G_PTRMASK Op0, Op1.
 
MachineInstrBuilder buildMaskLowPtrBits (const DstOp &Res, const SrcOp &Op0, uint32_t NumBits)
 Build and insert Res = G_PTRMASK Op0, G_CONSTANT (1 << NumBits) - 1.
 
MachineInstrBuilder buildPadVectorWithUndefElements (const DstOp &Res, const SrcOp &Op0)
 Build and insert a, b, ..., x = G_UNMERGE_VALUES Op0 Res = G_BUILD_VECTOR a, b, ..., x, undef, ..., undef.
 
MachineInstrBuilder buildDeleteTrailingVectorElements (const DstOp &Res, const SrcOp &Op0)
 Build and insert a, b, ..., x, y, z = G_UNMERGE_VALUES Op0 Res = G_BUILD_VECTOR a, b, ..., x.
 
MachineInstrBuilder buildUAddo (const DstOp &Res, const DstOp &CarryOut, const SrcOp &Op0, const SrcOp &Op1)
 Build and insert Res, CarryOut = G_UADDO Op0, Op1.
 
MachineInstrBuilder buildUSubo (const DstOp &Res, const DstOp &CarryOut, const SrcOp &Op0, const SrcOp &Op1)
 Build and insert Res, CarryOut = G_USUBO Op0, Op1.
 
MachineInstrBuilder buildSAddo (const DstOp &Res, const DstOp &CarryOut, const SrcOp &Op0, const SrcOp &Op1)
 Build and insert Res, CarryOut = G_SADDO Op0, Op1.
 
MachineInstrBuilder buildSSubo (const DstOp &Res, const DstOp &CarryOut, const SrcOp &Op0, const SrcOp &Op1)
 Build and insert Res, CarryOut = G_SUBO Op0, Op1.
 
MachineInstrBuilder buildUAdde (const DstOp &Res, const DstOp &CarryOut, const SrcOp &Op0, const SrcOp &Op1, const SrcOp &CarryIn)
 Build and insert Res, CarryOut = G_UADDE Op0, Op1, CarryIn.
 
MachineInstrBuilder buildUSube (const DstOp &Res, const DstOp &CarryOut, const SrcOp &Op0, const SrcOp &Op1, const SrcOp &CarryIn)
 Build and insert Res, CarryOut = G_USUBE Op0, Op1, CarryInp.
 
MachineInstrBuilder buildSAdde (const DstOp &Res, const DstOp &CarryOut, const SrcOp &Op0, const SrcOp &Op1, const SrcOp &CarryIn)
 Build and insert Res, CarryOut = G_SADDE Op0, Op1, CarryInp.
 
MachineInstrBuilder buildSSube (const DstOp &Res, const DstOp &CarryOut, const SrcOp &Op0, const SrcOp &Op1, const SrcOp &CarryIn)
 Build and insert Res, CarryOut = G_SSUBE Op0, Op1, CarryInp.
 
MachineInstrBuilder buildAnyExt (const DstOp &Res, const SrcOp &Op)
 Build and insert Res = G_ANYEXT Op0.
 
MachineInstrBuilder buildSExt (const DstOp &Res, const SrcOp &Op)
 Build and insert Res = G_SEXT Op.
 
MachineInstrBuilder buildSExtInReg (const DstOp &Res, const SrcOp &Op, int64_t ImmOp)
 Build and insert Res = G_SEXT_INREG Op, ImmOp.
 
MachineInstrBuilder buildFPExt (const DstOp &Res, const SrcOp &Op, std::optional< unsigned > Flags=std::nullopt)
 Build and insert Res = G_FPEXT Op.
 
MachineInstrBuilder buildPtrToInt (const DstOp &Dst, const SrcOp &Src)
 Build and insert a G_PTRTOINT instruction.
 
MachineInstrBuilder buildIntToPtr (const DstOp &Dst, const SrcOp &Src)
 Build and insert a G_INTTOPTR instruction.
 
MachineInstrBuilder buildBitcast (const DstOp &Dst, const SrcOp &Src)
 Build and insert Dst = G_BITCAST Src.
 
MachineInstrBuilder buildAddrSpaceCast (const DstOp &Dst, const SrcOp &Src)
 Build and insert Dst = G_ADDRSPACE_CAST Src.
 
unsigned getBoolExtOp (bool IsVec, bool IsFP) const
 
MachineInstrBuilder buildBoolExt (const DstOp &Res, const SrcOp &Op, bool IsFP)
 
MachineInstrBuilder buildBoolExtInReg (const DstOp &Res, const SrcOp &Op, bool IsVector, bool IsFP)
 
MachineInstrBuilder buildZExt (const DstOp &Res, const SrcOp &Op)
 Build and insert Res = G_ZEXT Op.
 
MachineInstrBuilder buildSExtOrTrunc (const DstOp &Res, const SrcOp &Op)
 Build and insert Res = G_SEXT Op, Res = G_TRUNC Op, or Res = COPY Op depending on the differing sizes of Res and Op.
 
MachineInstrBuilder buildZExtOrTrunc (const DstOp &Res, const SrcOp &Op)
 Build and insert Res = G_ZEXT Op, Res = G_TRUNC Op, or Res = COPY Op depending on the differing sizes of Res and Op.
 
MachineInstrBuilder buildAnyExtOrTrunc (const DstOp &Res, const SrcOp &Op)
 Res = COPY Op depending on the differing sizes of Res and Op.
 
MachineInstrBuilder buildExtOrTrunc (unsigned ExtOpc, const DstOp &Res, const SrcOp &Op)
 Build and insert Res = ExtOpc, Res = G_TRUNC Op, or Res = COPY Op depending on the differing sizes of Res and Op.
 
MachineInstrBuilder buildZExtInReg (const DstOp &Res, const SrcOp &Op, int64_t ImmOp)
 Build and inserts Res = G_AND Op, LowBitsSet(ImmOp) Since there is no G_ZEXT_INREG like G_SEXT_INREG, the instruction is emulated using G_AND.
 
MachineInstrBuilder buildCast (const DstOp &Dst, const SrcOp &Src)
 Build and insert an appropriate cast between two registers of equal size.
 
MachineInstrBuilder buildBr (MachineBasicBlock &Dest)
 Build and insert G_BR Dest.
 
MachineInstrBuilder buildBrCond (const SrcOp &Tst, MachineBasicBlock &Dest)
 Build and insert G_BRCOND Tst, Dest.
 
MachineInstrBuilder buildBrIndirect (Register Tgt)
 Build and insert G_BRINDIRECT Tgt.
 
MachineInstrBuilder buildBrJT (Register TablePtr, unsigned JTI, Register IndexReg)
 Build and insert G_BRJT TablePtr, JTI, IndexReg.
 
virtual MachineInstrBuilder buildConstant (const DstOp &Res, const ConstantInt &Val)
 Build and insert Res = G_CONSTANT Val.
 
MachineInstrBuilder buildConstant (const DstOp &Res, int64_t Val)
 Build and insert Res = G_CONSTANT Val.
 
MachineInstrBuilder buildConstant (const DstOp &Res, const APInt &Val)
 
virtual MachineInstrBuilder buildFConstant (const DstOp &Res, const ConstantFP &Val)
 Build and insert Res = G_FCONSTANT Val.
 
MachineInstrBuilder buildFConstant (const DstOp &Res, double Val)
 
MachineInstrBuilder buildFConstant (const DstOp &Res, const APFloat &Val)
 
MachineInstrBuilder buildCopy (const DstOp &Res, const SrcOp &Op)
 Build and insert Res = COPY Op.
 
MachineInstrBuilder buildAssertInstr (unsigned Opc, const DstOp &Res, const SrcOp &Op, unsigned Val)
 Build and insert G_ASSERT_SEXT, G_ASSERT_ZEXT, or G_ASSERT_ALIGN.
 
MachineInstrBuilder buildAssertZExt (const DstOp &Res, const SrcOp &Op, unsigned Size)
 Build and insert Res = G_ASSERT_ZEXT Op, Size.
 
MachineInstrBuilder buildAssertSExt (const DstOp &Res, const SrcOp &Op, unsigned Size)
 Build and insert Res = G_ASSERT_SEXT Op, Size.
 
MachineInstrBuilder buildAssertAlign (const DstOp &Res, const SrcOp &Op, Align AlignVal)
 Build and insert Res = G_ASSERT_ALIGN Op, AlignVal.
 
MachineInstrBuilder buildLoad (const DstOp &Res, const SrcOp &Addr, MachineMemOperand &MMO)
 Build and insert Res = G_LOAD Addr, MMO.
 
MachineInstrBuilder buildLoad (const DstOp &Res, const SrcOp &Addr, MachinePointerInfo PtrInfo, Align Alignment, MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const AAMDNodes &AAInfo=AAMDNodes())
 Build and insert a G_LOAD instruction, while constructing the MachineMemOperand.
 
MachineInstrBuilder buildLoadInstr (unsigned Opcode, const DstOp &Res, const SrcOp &Addr, MachineMemOperand &MMO)
 Build and insert Res = <opcode> Addr, MMO.
 
MachineInstrBuilder buildLoadFromOffset (const DstOp &Dst, const SrcOp &BasePtr, MachineMemOperand &BaseMMO, int64_t Offset)
 Helper to create a load from a constant offset given a base address.
 
MachineInstrBuilder buildStore (const SrcOp &Val, const SrcOp &Addr, MachineMemOperand &MMO)
 Build and insert G_STORE Val, Addr, MMO.
 
MachineInstrBuilder buildStore (const SrcOp &Val, const SrcOp &Addr, MachinePointerInfo PtrInfo, Align Alignment, MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const AAMDNodes &AAInfo=AAMDNodes())
 Build and insert a G_STORE instruction, while constructing the MachineMemOperand.
 
MachineInstrBuilder buildExtract (const DstOp &Res, const SrcOp &Src, uint64_t Index)
 Build and insert Res0, ... = G_EXTRACT Src, Idx0.
 
MachineInstrBuilder buildUndef (const DstOp &Res)
 Build and insert Res = IMPLICIT_DEF.
 
MachineInstrBuilder buildMergeValues (const DstOp &Res, ArrayRef< Register > Ops)
 Build and insert Res = G_MERGE_VALUES Op0, ...
 
MachineInstrBuilder buildMergeLikeInstr (const DstOp &Res, ArrayRef< Register > Ops)
 Build and insert Res = G_MERGE_VALUES Op0, ... or Res = G_BUILD_VECTOR Op0, ... or Res = G_CONCAT_VECTORS Op0, ...
 
MachineInstrBuilder buildMergeLikeInstr (const DstOp &Res, std::initializer_list< SrcOp > Ops)
 
MachineInstrBuilder buildUnmerge (ArrayRef< LLT > Res, const SrcOp &Op)
 Build and insert Res0, ... = G_UNMERGE_VALUES Op.
 
MachineInstrBuilder buildUnmerge (ArrayRef< Register > Res, const SrcOp &Op)
 
MachineInstrBuilder buildUnmerge (LLT Res, const SrcOp &Op)
 Build and insert an unmerge of Res sized pieces to cover Op.
 
MachineInstrBuilder buildBuildVector (const DstOp &Res, ArrayRef< Register > Ops)
 Build and insert Res = G_BUILD_VECTOR Op0, ...
 
MachineInstrBuilder buildBuildVectorConstant (const DstOp &Res, ArrayRef< APInt > Ops)
 Build and insert Res = G_BUILD_VECTOR Op0, ... where each OpN is built with G_CONSTANT.
 
MachineInstrBuilder buildSplatBuildVector (const DstOp &Res, const SrcOp &Src)
 Build and insert Res = G_BUILD_VECTOR with Src replicated to fill the number of elements.
 
MachineInstrBuilder buildBuildVectorTrunc (const DstOp &Res, ArrayRef< Register > Ops)
 Build and insert Res = G_BUILD_VECTOR_TRUNC Op0, ...
 
MachineInstrBuilder buildShuffleSplat (const DstOp &Res, const SrcOp &Src)
 Build and insert a vector splat of a scalar Src using a G_INSERT_VECTOR_ELT and G_SHUFFLE_VECTOR idiom.
 
MachineInstrBuilder buildShuffleVector (const DstOp &Res, const SrcOp &Src1, const SrcOp &Src2, ArrayRef< int > Mask)
 Build and insert Res = G_SHUFFLE_VECTOR Src1, Src2, Mask.
 
MachineInstrBuilder buildSplatVector (const DstOp &Res, const SrcOp &Val)
 Build and insert Res = G_SPLAT_VECTOR Val.
 
MachineInstrBuilder buildConcatVectors (const DstOp &Res, ArrayRef< Register > Ops)
 Build and insert Res = G_CONCAT_VECTORS Op0, ...
 
MachineInstrBuilder buildInsertSubvector (const DstOp &Res, const SrcOp &Src0, const SrcOp &Src1, unsigned Index)
 Build and insert Res = G_INSERT_SUBVECTOR Src0, Src1, Idx.
 
MachineInstrBuilder buildExtractSubvector (const DstOp &Res, const SrcOp &Src, unsigned Index)
 Build and insert Res = G_EXTRACT_SUBVECTOR Src, Idx0.
 
MachineInstrBuilder buildInsert (const DstOp &Res, const SrcOp &Src, const SrcOp &Op, unsigned Index)
 
MachineInstrBuilder buildVScale (const DstOp &Res, unsigned MinElts)
 Build and insert Res = G_VSCALE MinElts.
 
MachineInstrBuilder buildVScale (const DstOp &Res, const ConstantInt &MinElts)
 Build and insert Res = G_VSCALE MinElts.
 
MachineInstrBuilder buildIntrinsic (Intrinsic::ID ID, ArrayRef< Register > Res, bool HasSideEffects, bool isConvergent)
 Build and insert a G_INTRINSIC instruction.
 
MachineInstrBuilder buildIntrinsic (Intrinsic::ID ID, ArrayRef< Register > Res)
 
MachineInstrBuilder buildIntrinsic (Intrinsic::ID ID, ArrayRef< DstOp > Res, bool HasSideEffects, bool isConvergent)
 
MachineInstrBuilder buildIntrinsic (Intrinsic::ID ID, ArrayRef< DstOp > Res)
 
MachineInstrBuilder buildFPTrunc (const DstOp &Res, const SrcOp &Op, std::optional< unsigned > Flags=std::nullopt)
 Build and insert Res = G_FPTRUNC Op.
 
MachineInstrBuilder buildTrunc (const DstOp &Res, const SrcOp &Op)
 Build and insert Res = G_TRUNC Op.
 
MachineInstrBuilder buildICmp (CmpInst::Predicate Pred, const DstOp &Res, const SrcOp &Op0, const SrcOp &Op1)
 Build and insert a Res = G_ICMP Pred, Op0, Op1.
 
MachineInstrBuilder buildFCmp (CmpInst::Predicate Pred, const DstOp &Res, const SrcOp &Op0, const SrcOp &Op1, std::optional< unsigned > Flags=std::nullopt)
 Build and insert a Res = G_FCMP PredOp0, Op1.
 
MachineInstrBuilder buildIsFPClass (const DstOp &Res, const SrcOp &Src, unsigned Mask)
 Build and insert a Res = G_IS_FPCLASS Src, Mask.
 
MachineInstrBuilder buildSelect (const DstOp &Res, const SrcOp &Tst, const SrcOp &Op0, const SrcOp &Op1, std::optional< unsigned > Flags=std::nullopt)
 Build and insert a Res = G_SELECT Tst, Op0, Op1.
 
MachineInstrBuilder buildInsertVectorElement (const DstOp &Res, const SrcOp &Val, const SrcOp &Elt, const SrcOp &Idx)
 Build and insert Res = G_INSERT_VECTOR_ELT Val, Elt, Idx.
 
MachineInstrBuilder buildExtractVectorElementConstant (const DstOp &Res, const SrcOp &Val, const int Idx)
 Build and insert Res = G_EXTRACT_VECTOR_ELT Val, Idx.
 
MachineInstrBuilder buildExtractVectorElement (const DstOp &Res, const SrcOp &Val, const SrcOp &Idx)
 Build and insert Res = G_EXTRACT_VECTOR_ELT Val, Idx.
 
MachineInstrBuilder buildAtomicCmpXchgWithSuccess (Register OldValRes, Register SuccessRes, Register Addr, Register CmpVal, Register NewVal, MachineMemOperand &MMO)
 Build and insert OldValRes<def>, SuccessRes<def> = G_ATOMIC_CMPXCHG_WITH_SUCCESS Addr, CmpVal, NewVal, MMO.
 
MachineInstrBuilder buildAtomicCmpXchg (Register OldValRes, Register Addr, Register CmpVal, Register NewVal, MachineMemOperand &MMO)
 Build and insert OldValRes<def> = G_ATOMIC_CMPXCHG Addr, CmpVal, NewVal, MMO.
 
MachineInstrBuilder buildAtomicRMW (unsigned Opcode, const DstOp &OldValRes, const SrcOp &Addr, const SrcOp &Val, MachineMemOperand &MMO)
 Build and insert OldValRes<def> = G_ATOMICRMW_<Opcode> Addr, Val, MMO.
 
MachineInstrBuilder buildAtomicRMWXchg (Register OldValRes, Register Addr, Register Val, MachineMemOperand &MMO)
 Build and insert OldValRes<def> = G_ATOMICRMW_XCHG Addr, Val, MMO.
 
MachineInstrBuilder buildAtomicRMWAdd (Register OldValRes, Register Addr, Register Val, MachineMemOperand &MMO)
 Build and insert OldValRes<def> = G_ATOMICRMW_ADD Addr, Val, MMO.
 
MachineInstrBuilder buildAtomicRMWSub (Register OldValRes, Register Addr, Register Val, MachineMemOperand &MMO)
 Build and insert OldValRes<def> = G_ATOMICRMW_SUB Addr, Val, MMO.
 
MachineInstrBuilder buildAtomicRMWAnd (Register OldValRes, Register Addr, Register Val, MachineMemOperand &MMO)
 Build and insert OldValRes<def> = G_ATOMICRMW_AND Addr, Val, MMO.
 
MachineInstrBuilder buildAtomicRMWNand (Register OldValRes, Register Addr, Register Val, MachineMemOperand &MMO)
 Build and insert OldValRes<def> = G_ATOMICRMW_NAND Addr, Val, MMO.
 
MachineInstrBuilder buildAtomicRMWOr (Register OldValRes, Register Addr, Register Val, MachineMemOperand &MMO)
 Build and insert OldValRes<def> = G_ATOMICRMW_OR Addr, Val, MMO.
 
MachineInstrBuilder buildAtomicRMWXor (Register OldValRes, Register Addr, Register Val, MachineMemOperand &MMO)
 Build and insert OldValRes<def> = G_ATOMICRMW_XOR Addr, Val, MMO.
 
MachineInstrBuilder buildAtomicRMWMax (Register OldValRes, Register Addr, Register Val, MachineMemOperand &MMO)
 Build and insert OldValRes<def> = G_ATOMICRMW_MAX Addr, Val, MMO.
 
MachineInstrBuilder buildAtomicRMWMin (Register OldValRes, Register Addr, Register Val, MachineMemOperand &MMO)
 Build and insert OldValRes<def> = G_ATOMICRMW_MIN Addr, Val, MMO.
 
MachineInstrBuilder buildAtomicRMWUmax (Register OldValRes, Register Addr, Register Val, MachineMemOperand &MMO)
 Build and insert OldValRes<def> = G_ATOMICRMW_UMAX Addr, Val, MMO.
 
MachineInstrBuilder buildAtomicRMWUmin (Register OldValRes, Register Addr, Register Val, MachineMemOperand &MMO)
 Build and insert OldValRes<def> = G_ATOMICRMW_UMIN Addr, Val, MMO.
 
MachineInstrBuilder buildAtomicRMWFAdd (const DstOp &OldValRes, const SrcOp &Addr, const SrcOp &Val, MachineMemOperand &MMO)
 Build and insert OldValRes<def> = G_ATOMICRMW_FADD Addr, Val, MMO.
 
MachineInstrBuilder buildAtomicRMWFSub (const DstOp &OldValRes, const SrcOp &Addr, const SrcOp &Val, MachineMemOperand &MMO)
 Build and insert OldValRes<def> = G_ATOMICRMW_FSUB Addr, Val, MMO.
 
MachineInstrBuilder buildAtomicRMWFMax (const DstOp &OldValRes, const SrcOp &Addr, const SrcOp &Val, MachineMemOperand &MMO)
 Build and insert OldValRes<def> = G_ATOMICRMW_FMAX Addr, Val, MMO.
 
MachineInstrBuilder buildAtomicRMWFMin (const DstOp &OldValRes, const SrcOp &Addr, const SrcOp &Val, MachineMemOperand &MMO)
 Build and insert OldValRes<def> = G_ATOMICRMW_FMIN Addr, Val, MMO.
 
MachineInstrBuilder buildFence (unsigned Ordering, unsigned Scope)
 Build and insert G_FENCE Ordering, Scope.
 
MachineInstrBuilder buildPrefetch (const SrcOp &Addr, unsigned RW, unsigned Locality, unsigned CacheType, MachineMemOperand &MMO)
 Build and insert G_PREFETCH Addr, RW, Locality, CacheType.
 
MachineInstrBuilder buildFreeze (const DstOp &Dst, const SrcOp &Src)
 Build and insert Dst = G_FREEZE Src.
 
MachineInstrBuilder buildBlockAddress (Register Res, const BlockAddress *BA)
 Build and insert Res = G_BLOCK_ADDR BA.
 
MachineInstrBuilder buildAdd (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt)
 Build and insert Res = G_ADD Op0, Op1.
 
MachineInstrBuilder buildSub (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt)
 Build and insert Res = G_SUB Op0, Op1.
 
MachineInstrBuilder buildMul (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt)
 Build and insert Res = G_MUL Op0, Op1.
 
MachineInstrBuilder buildUMulH (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt)
 
MachineInstrBuilder buildSMulH (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt)
 
MachineInstrBuilder buildURem (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt)
 Build and insert Res = G_UREM Op0, Op1.
 
MachineInstrBuilder buildFMul (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt)
 
MachineInstrBuilder buildFMinNum (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt)
 
MachineInstrBuilder buildFMaxNum (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt)
 
MachineInstrBuilder buildFMinNumIEEE (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt)
 
MachineInstrBuilder buildFMaxNumIEEE (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt)
 
MachineInstrBuilder buildShl (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt)
 
MachineInstrBuilder buildLShr (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt)
 
MachineInstrBuilder buildAShr (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt)
 
MachineInstrBuilder buildAnd (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1)
 Build and insert Res = G_AND Op0, Op1.
 
MachineInstrBuilder buildOr (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt)
 Build and insert Res = G_OR Op0, Op1.
 
MachineInstrBuilder buildXor (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1)
 Build and insert Res = G_XOR Op0, Op1.
 
MachineInstrBuilder buildNot (const DstOp &Dst, const SrcOp &Src0)
 Build and insert a bitwise not, NegOne = G_CONSTANT -1 Res = G_OR Op0, NegOne.
 
MachineInstrBuilder buildNeg (const DstOp &Dst, const SrcOp &Src0)
 Build and insert integer negation Zero = G_CONSTANT 0 Res = G_SUB Zero, Op0.
 
MachineInstrBuilder buildCTPOP (const DstOp &Dst, const SrcOp &Src0)
 Build and insert Res = G_CTPOP Op0, Src0.
 
MachineInstrBuilder buildCTLZ (const DstOp &Dst, const SrcOp &Src0)
 Build and insert Res = G_CTLZ Op0, Src0.
 
MachineInstrBuilder buildCTLZ_ZERO_UNDEF (const DstOp &Dst, const SrcOp &Src0)
 Build and insert Res = G_CTLZ_ZERO_UNDEF Op0, Src0.
 
MachineInstrBuilder buildCTTZ (const DstOp &Dst, const SrcOp &Src0)
 Build and insert Res = G_CTTZ Op0, Src0.
 
MachineInstrBuilder buildCTTZ_ZERO_UNDEF (const DstOp &Dst, const SrcOp &Src0)
 Build and insert Res = G_CTTZ_ZERO_UNDEF Op0, Src0.
 
MachineInstrBuilder buildBSwap (const DstOp &Dst, const SrcOp &Src0)
 Build and insert Dst = G_BSWAP Src0.
 
MachineInstrBuilder buildFAdd (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt)
 Build and insert Res = G_FADD Op0, Op1.
 
MachineInstrBuilder buildStrictFAdd (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt)
 Build and insert Res = G_STRICT_FADD Op0, Op1.
 
MachineInstrBuilder buildFSub (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt)
 Build and insert Res = G_FSUB Op0, Op1.
 
MachineInstrBuilder buildFDiv (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt)
 Build and insert Res = G_FDIV Op0, Op1.
 
MachineInstrBuilder buildFMA (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, const SrcOp &Src2, std::optional< unsigned > Flags=std::nullopt)
 Build and insert Res = G_FMA Op0, Op1, Op2.
 
MachineInstrBuilder buildFMAD (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, const SrcOp &Src2, std::optional< unsigned > Flags=std::nullopt)
 Build and insert Res = G_FMAD Op0, Op1, Op2.
 
MachineInstrBuilder buildFNeg (const DstOp &Dst, const SrcOp &Src0, std::optional< unsigned > Flags=std::nullopt)
 Build and insert Res = G_FNEG Op0.
 
MachineInstrBuilder buildFAbs (const DstOp &Dst, const SrcOp &Src0, std::optional< unsigned > Flags=std::nullopt)
 Build and insert Res = G_FABS Op0.
 
MachineInstrBuilder buildFCanonicalize (const DstOp &Dst, const SrcOp &Src0, std::optional< unsigned > Flags=std::nullopt)
 Build and insert Dst = G_FCANONICALIZE Src0.
 
MachineInstrBuilder buildIntrinsicTrunc (const DstOp &Dst, const SrcOp &Src0, std::optional< unsigned > Flags=std::nullopt)
 Build and insert Dst = G_INTRINSIC_TRUNC Src0.
 
MachineInstrBuilder buildFFloor (const DstOp &Dst, const SrcOp &Src0, std::optional< unsigned > Flags=std::nullopt)
 Build and insert Res = GFFLOOR Op0, Op1.
 
MachineInstrBuilder buildFLog (const DstOp &Dst, const SrcOp &Src, std::optional< unsigned > Flags=std::nullopt)
 Build and insert Dst = G_FLOG Src.
 
MachineInstrBuilder buildFLog2 (const DstOp &Dst, const SrcOp &Src, std::optional< unsigned > Flags=std::nullopt)
 Build and insert Dst = G_FLOG2 Src.
 
MachineInstrBuilder buildFExp2 (const DstOp &Dst, const SrcOp &Src, std::optional< unsigned > Flags=std::nullopt)
 Build and insert Dst = G_FEXP2 Src.
 
MachineInstrBuilder buildFPow (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt)
 Build and insert Dst = G_FPOW Src0, Src1.
 
MachineInstrBuilder buildFLdexp (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1, std::optional< unsigned > Flags=std::nullopt)
 Build and insert Dst = G_FLDEXP Src0, Src1.
 
MachineInstrBuilder buildFFrexp (const DstOp &Fract, const DstOp &Exp, const SrcOp &Src, std::optional< unsigned > Flags=std::nullopt)
 Build and insert Fract, Exp = G_FFREXP Src.
 
MachineInstrBuilder buildFCopysign (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1)
 Build and insert Res = G_FCOPYSIGN Op0, Op1.
 
MachineInstrBuilder buildUITOFP (const DstOp &Dst, const SrcOp &Src0)
 Build and insert Res = G_UITOFP Src0.
 
MachineInstrBuilder buildSITOFP (const DstOp &Dst, const SrcOp &Src0)
 Build and insert Res = G_SITOFP Src0.
 
MachineInstrBuilder buildFPTOUI (const DstOp &Dst, const SrcOp &Src0)
 Build and insert Res = G_FPTOUI Src0.
 
MachineInstrBuilder buildFPTOSI (const DstOp &Dst, const SrcOp &Src0)
 Build and insert Res = G_FPTOSI Src0.
 
MachineInstrBuilder buildIntrinsicRoundeven (const DstOp &Dst, const SrcOp &Src0, std::optional< unsigned > Flags=std::nullopt)
 Build and insert Dst = G_INTRINSIC_ROUNDEVEN Src0, Src1.
 
MachineInstrBuilder buildSMin (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1)
 Build and insert Res = G_SMIN Op0, Op1.
 
MachineInstrBuilder buildSMax (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1)
 Build and insert Res = G_SMAX Op0, Op1.
 
MachineInstrBuilder buildUMin (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1)
 Build and insert Res = G_UMIN Op0, Op1.
 
MachineInstrBuilder buildUMax (const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1)
 Build and insert Res = G_UMAX Op0, Op1.
 
MachineInstrBuilder buildAbs (const DstOp &Dst, const SrcOp &Src)
 Build and insert Dst = G_ABS Src.
 
MachineInstrBuilder buildJumpTable (const LLT PtrTy, unsigned JTI)
 Build and insert Res = G_JUMP_TABLE JTI.
 
MachineInstrBuilder buildVecReduceSeqFAdd (const DstOp &Dst, const SrcOp &ScalarIn, const SrcOp &VecIn)
 Build and insert Res = G_VECREDUCE_SEQ_FADD ScalarIn, VecIn.
 
MachineInstrBuilder buildVecReduceSeqFMul (const DstOp &Dst, const SrcOp &ScalarIn, const SrcOp &VecIn)
 Build and insert Res = G_VECREDUCE_SEQ_FMUL ScalarIn, VecIn.
 
MachineInstrBuilder buildVecReduceFAdd (const DstOp &Dst, const SrcOp &ScalarIn, const SrcOp &VecIn)
 Build and insert Res = G_VECREDUCE_FADD Src.
 
MachineInstrBuilder buildVecReduceFMul (const DstOp &Dst, const SrcOp &ScalarIn, const SrcOp &VecIn)
 Build and insert Res = G_VECREDUCE_FMUL Src.
 
MachineInstrBuilder buildVecReduceFMax (const DstOp &Dst, const SrcOp &Src)
 Build and insert Res = G_VECREDUCE_FMAX Src.
 
MachineInstrBuilder buildVecReduceFMin (const DstOp &Dst, const SrcOp &Src)
 Build and insert Res = G_VECREDUCE_FMIN Src.
 
MachineInstrBuilder buildVecReduceFMaximum (const DstOp &Dst, const SrcOp &Src)
 Build and insert Res = G_VECREDUCE_FMAXIMUM Src.
 
MachineInstrBuilder buildVecReduceFMinimum (const DstOp &Dst, const SrcOp &Src)
 Build and insert Res = G_VECREDUCE_FMINIMUM Src.
 
MachineInstrBuilder buildVecReduceAdd (const DstOp &Dst, const SrcOp &Src)
 Build and insert Res = G_VECREDUCE_ADD Src.
 
MachineInstrBuilder buildVecReduceMul (const DstOp &Dst, const SrcOp &Src)
 Build and insert Res = G_VECREDUCE_MUL Src.
 
MachineInstrBuilder buildVecReduceAnd (const DstOp &Dst, const SrcOp &Src)
 Build and insert Res = G_VECREDUCE_AND Src.
 
MachineInstrBuilder buildVecReduceOr (const DstOp &Dst, const SrcOp &Src)
 Build and insert Res = G_VECREDUCE_OR Src.
 
MachineInstrBuilder buildVecReduceXor (const DstOp &Dst, const SrcOp &Src)
 Build and insert Res = G_VECREDUCE_XOR Src.
 
MachineInstrBuilder buildVecReduceSMax (const DstOp &Dst, const SrcOp &Src)
 Build and insert Res = G_VECREDUCE_SMAX Src.
 
MachineInstrBuilder buildVecReduceSMin (const DstOp &Dst, const SrcOp &Src)
 Build and insert Res = G_VECREDUCE_SMIN Src.
 
MachineInstrBuilder buildVecReduceUMax (const DstOp &Dst, const SrcOp &Src)
 Build and insert Res = G_VECREDUCE_UMAX Src.
 
MachineInstrBuilder buildVecReduceUMin (const DstOp &Dst, const SrcOp &Src)
 Build and insert Res = G_VECREDUCE_UMIN Src.
 
MachineInstrBuilder buildMemTransferInst (unsigned Opcode, const SrcOp &DstPtr, const SrcOp &SrcPtr, const SrcOp &Size, MachineMemOperand &DstMMO, MachineMemOperand &SrcMMO)
 Build and insert G_MEMCPY or G_MEMMOVE.
 
MachineInstrBuilder buildMemCpy (const SrcOp &DstPtr, const SrcOp &SrcPtr, const SrcOp &Size, MachineMemOperand &DstMMO, MachineMemOperand &SrcMMO)
 
MachineInstrBuilder buildSbfx (const DstOp &Dst, const SrcOp &Src, const SrcOp &LSB, const SrcOp &Width)
 Build and insert Dst = G_SBFX Src, LSB, Width.
 
MachineInstrBuilder buildUbfx (const DstOp &Dst, const SrcOp &Src, const SrcOp &LSB, const SrcOp &Width)
 Build and insert Dst = G_UBFX Src, LSB, Width.
 
MachineInstrBuilder buildRotateRight (const DstOp &Dst, const SrcOp &Src, const SrcOp &Amt)
 Build and insert Dst = G_ROTR Src, Amt.
 
MachineInstrBuilder buildRotateLeft (const DstOp &Dst, const SrcOp &Src, const SrcOp &Amt)
 Build and insert Dst = G_ROTL Src, Amt.
 
MachineInstrBuilder buildBitReverse (const DstOp &Dst, const SrcOp &Src)
 Build and insert Dst = G_BITREVERSE Src.
 
virtual MachineInstrBuilder buildInstr (unsigned Opc, ArrayRef< DstOp > DstOps, ArrayRef< SrcOp > SrcOps, std::optional< unsigned > Flags=std::nullopt)
 
Setters for the insertion point.

Set the MachineFunction where to build instructions.

void setMF (MachineFunction &MF)
 
void setMBB (MachineBasicBlock &MBB)
 Set the insertion point to the end of MBB.
 
void setInstr (MachineInstr &MI)
 Set the insertion point to before MI.
 

Protected Member Functions

void validateTruncExt (const LLT Dst, const LLT Src, bool IsExtend)
 
void validateUnaryOp (const LLT Res, const LLT Op0)
 
void validateBinaryOp (const LLT Res, const LLT Op0, const LLT Op1)
 
void validateShiftOp (const LLT Res, const LLT Op0, const LLT Op1)
 
void validateSelectOp (const LLT ResTy, const LLT TstTy, const LLT Op0Ty, const LLT Op1Ty)
 
void recordInsertion (MachineInstr *InsertedInstr) const
 

Detailed Description

Helper class to build MachineInstr.

It keeps internally the insertion point and debug location for all the new instructions we want to create. This information can be modified via the related setters.

Definition at line 221 of file MachineIRBuilder.h.

Constructor & Destructor Documentation

◆ MachineIRBuilder() [1/6]

llvm::MachineIRBuilder::MachineIRBuilder ( )
default

Some constructors for easy use.

◆ MachineIRBuilder() [2/6]

llvm::MachineIRBuilder::MachineIRBuilder ( MachineFunction MF)
inline

Definition at line 245 of file MachineIRBuilder.h.

References setMF().

◆ MachineIRBuilder() [3/6]

llvm::MachineIRBuilder::MachineIRBuilder ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  InsPt 
)
inline

Definition at line 247 of file MachineIRBuilder.h.

References MBB, setInsertPt(), and setMF().

◆ MachineIRBuilder() [4/6]

llvm::MachineIRBuilder::MachineIRBuilder ( MachineInstr MI)
inline

Definition at line 252 of file MachineIRBuilder.h.

References MI, setDebugLoc(), and setInstr().

◆ MachineIRBuilder() [5/6]

llvm::MachineIRBuilder::MachineIRBuilder ( MachineInstr MI,
GISelChangeObserver Observer 
)
inline

Definition at line 258 of file MachineIRBuilder.h.

References setChangeObserver().

◆ ~MachineIRBuilder()

virtual llvm::MachineIRBuilder::~MachineIRBuilder ( )
virtualdefault

◆ MachineIRBuilder() [6/6]

llvm::MachineIRBuilder::MachineIRBuilder ( const MachineIRBuilderState BState)
inline

Definition at line 265 of file MachineIRBuilder.h.

Member Function Documentation

◆ buildAbs()

MachineInstrBuilder llvm::MachineIRBuilder::buildAbs ( const DstOp Dst,
const SrcOp Src 
)
inline

Build and insert Dst = G_ABS Src.

Definition at line 1975 of file MachineIRBuilder.h.

References buildInstr().

◆ buildAdd()

MachineInstrBuilder llvm::MachineIRBuilder::buildAdd ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
std::optional< unsigned Flags = std::nullopt 
)
inline

Build and insert Res = G_ADD Op0, Op1.

G_ADD sets Res to the sum of integer parameters Op0 and Op1, truncated to their width.

Precondition
setBasicBlock or setMI must have been called.
Res, Op0 and Op1 must be generic virtual registers with the same (scalar or vector) type).
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 1612 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::CombinerHelper::applySimplifyURemByPow2(), llvm::LegalizerHelper::bitcastExtractVectorElt(), llvm::LegalizerHelper::lower(), llvm::LegalizerHelper::lowerAbsToAddXor(), llvm::LegalizerHelper::lowerAddSubSatToAddoSubo(), llvm::LegalizerHelper::lowerBitCount(), llvm::LegalizerHelper::lowerFPTRUNC_F64_TO_F16(), llvm::LegalizerHelper::lowerSADDO_SSUBO(), llvm::LegalizerHelper::lowerSITOFP(), llvm::LegalizerHelper::lowerU64ToF32BitOps(), and llvm::LegalizerHelper::narrowScalarCTPOP().

◆ buildAddrSpaceCast()

MachineInstrBuilder llvm::MachineIRBuilder::buildAddrSpaceCast ( const DstOp Dst,
const SrcOp Src 
)
inline

Build and insert Dst = G_ADDRSPACE_CAST Src.

Definition at line 707 of file MachineIRBuilder.h.

References buildInstr().

◆ buildAnd()

MachineInstrBuilder llvm::MachineIRBuilder::buildAnd ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1 
)
inline

◆ buildAnyExt()

MachineInstrBuilder MachineIRBuilder::buildAnyExt ( const DstOp Res,
const SrcOp Op 
)

Build and insert Res = G_ANYEXT Op0.

G_ANYEXT produces a register of the specified width, with bits 0 to sizeof(Ty) * 8 set to Op. The remaining bits are unspecified (i.e. this is neither zero nor sign-extension). For a vector register, each element is extended individually.

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register with scalar or vector type.
Op must be a generic virtual register with scalar or vector type.
Op must be smaller than Res
Returns
The newly created instruction.

Definition at line 480 of file MachineIRBuilder.cpp.

References buildInstr().

Referenced by buildAnyextOrCopy(), llvm::CallLowering::ValueHandler::extendRegister(), llvm::MipsLegalizerInfo::legalizeCustom(), llvm::AArch64LegalizerInfo::legalizeIntrinsic(), llvm::LegalizerHelper::lowerStore(), llvm::LegalizerHelper::narrowScalar(), and llvm::LegalizerHelper::narrowScalarInsert().

◆ buildAnyExtOrTrunc()

MachineInstrBuilder MachineIRBuilder::buildAnyExtOrTrunc ( const DstOp Res,
const SrcOp Op 
)

Res = COPY Op depending on the differing sizes of Res and Op.

///

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register with scalar or vector type.
Op must be a generic virtual register with scalar or vector type.
Returns
The newly created instruction.

Definition at line 565 of file MachineIRBuilder.cpp.

References buildExtOrTrunc().

Referenced by llvm::LegalizerHelper::lowerStore(), llvm::LegalizationArtifactCombiner::tryCombineAnyExt(), llvm::LegalizationArtifactCombiner::tryCombineSExt(), and llvm::LegalizationArtifactCombiner::tryCombineZExt().

◆ buildAShr()

MachineInstrBuilder llvm::MachineIRBuilder::buildAShr ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
std::optional< unsigned Flags = std::nullopt 
)
inline

◆ buildAssertAlign()

MachineInstrBuilder llvm::MachineIRBuilder::buildAssertAlign ( const DstOp Res,
const SrcOp Op,
Align  AlignVal 
)
inline

Build and insert Res = G_ASSERT_ALIGN Op, AlignVal.

Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 915 of file MachineIRBuilder.h.

References buildAssertInstr(), and llvm::Align::value().

Referenced by llvm::CallLowering::lowerCall().

◆ buildAssertInstr()

MachineInstrBuilder llvm::MachineIRBuilder::buildAssertInstr ( unsigned  Opc,
const DstOp Res,
const SrcOp Op,
unsigned  Val 
)
inline

Build and insert G_ASSERT_SEXT, G_ASSERT_ZEXT, or G_ASSERT_ALIGN.

Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 891 of file MachineIRBuilder.h.

References llvm::MachineInstrBuilder::addImm(), and buildInstr().

Referenced by buildAssertAlign(), buildAssertSExt(), and buildAssertZExt().

◆ buildAssertSExt()

MachineInstrBuilder llvm::MachineIRBuilder::buildAssertSExt ( const DstOp Res,
const SrcOp Op,
unsigned  Size 
)
inline

Build and insert Res = G_ASSERT_SEXT Op, Size.

Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 907 of file MachineIRBuilder.h.

References buildAssertInstr(), and Size.

Referenced by llvm::CallLowering::IncomingValueHandler::buildExtensionHint().

◆ buildAssertZExt()

MachineInstrBuilder llvm::MachineIRBuilder::buildAssertZExt ( const DstOp Res,
const SrcOp Op,
unsigned  Size 
)
inline

Build and insert Res = G_ASSERT_ZEXT Op, Size.

Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 899 of file MachineIRBuilder.h.

References buildAssertInstr(), and Size.

Referenced by llvm::CallLowering::IncomingValueHandler::buildExtensionHint(), llvm::AArch64CallLowering::lowerFormalArguments(), and llvm::LegalizerHelper::lowerLoad().

◆ buildAtomicCmpXchg()

MachineInstrBuilder MachineIRBuilder::buildAtomicCmpXchg ( Register  OldValRes,
Register  Addr,
Register  CmpVal,
Register  NewVal,
MachineMemOperand MMO 
)

Build and insert OldValRes<def> = G_ATOMIC_CMPXCHG Addr, CmpVal, NewVal, MMO.

Atomically replace the value at Addr with NewVal if it is currently CmpVal otherwise leaves it unchanged. Puts the original value from Addr in Res.

Precondition
setBasicBlock or setMI must have been called.
OldValRes must be a generic virtual register of scalar type.
Addr must be a generic virtual register with pointer type.
OldValRes, CmpVal, and NewVal must be generic virtual registers of the same type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 953 of file MachineIRBuilder.cpp.

References llvm::MachineInstrBuilder::addDef(), llvm::MachineInstrBuilder::addMemOperand(), Addr, llvm::MachineInstrBuilder::addUse(), assert(), buildInstr(), getMRI(), llvm::MachineRegisterInfo::getType(), llvm::LLT::isPointer(), llvm::LLT::isScalar(), and llvm::LLT::isValid().

Referenced by llvm::LegalizerHelper::lower().

◆ buildAtomicCmpXchgWithSuccess()

MachineInstrBuilder MachineIRBuilder::buildAtomicCmpXchgWithSuccess ( Register  OldValRes,
Register  SuccessRes,
Register  Addr,
Register  CmpVal,
Register  NewVal,
MachineMemOperand MMO 
)

Build and insert OldValRes<def>, SuccessRes<def> = G_ATOMIC_CMPXCHG_WITH_SUCCESS Addr, CmpVal, NewVal, MMO.

Atomically replace the value at Addr with NewVal if it is currently CmpVal otherwise leaves it unchanged. Puts the original value from Addr in Res, along with an s1 indicating whether it was replaced.

Precondition
setBasicBlock or setMI must have been called.
OldValRes must be a generic virtual register of scalar type.
SuccessRes must be a generic virtual register of scalar type. It will be assigned 0 on failure and 1 on success.
Addr must be a generic virtual register with pointer type.
OldValRes, CmpVal, and NewVal must be generic virtual registers of the same type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 925 of file MachineIRBuilder.cpp.

References llvm::MachineInstrBuilder::addDef(), llvm::MachineInstrBuilder::addMemOperand(), Addr, llvm::MachineInstrBuilder::addUse(), assert(), buildInstr(), getMRI(), llvm::MachineRegisterInfo::getType(), llvm::LLT::isPointer(), llvm::LLT::isScalar(), and llvm::LLT::isValid().

◆ buildAtomicRMW()

MachineInstrBuilder MachineIRBuilder::buildAtomicRMW ( unsigned  Opcode,
const DstOp OldValRes,
const SrcOp Addr,
const SrcOp Val,
MachineMemOperand MMO 
)

Build and insert OldValRes<def> = G_ATOMICRMW_<Opcode> Addr, Val, MMO.

Atomically read-modify-update the value at Addr with Val. Puts the original value from Addr in OldValRes. The modification is determined by the opcode.

Precondition
setBasicBlock or setMI must have been called.
OldValRes must be a generic virtual register.
Addr must be a generic virtual register with pointer type.
OldValRes, and Val must be generic virtual registers of the same type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 977 of file MachineIRBuilder.cpp.

References llvm::DstOp::addDefToMIB(), Addr, llvm::SrcOp::addSrcToMIB(), assert(), buildInstr(), llvm::DstOp::getLLTTy(), llvm::SrcOp::getLLTTy(), getMRI(), llvm::MachineMemOperand::isAtomic(), llvm::LLT::isPointer(), llvm::LLT::isScalar(), and llvm::LLT::isValid().

Referenced by buildAtomicRMWAdd(), buildAtomicRMWAnd(), buildAtomicRMWFAdd(), buildAtomicRMWFMax(), buildAtomicRMWFMin(), buildAtomicRMWFSub(), buildAtomicRMWMax(), buildAtomicRMWMin(), buildAtomicRMWNand(), buildAtomicRMWOr(), buildAtomicRMWSub(), buildAtomicRMWUmax(), buildAtomicRMWUmin(), buildAtomicRMWXchg(), and buildAtomicRMWXor().

◆ buildAtomicRMWAdd()

MachineInstrBuilder MachineIRBuilder::buildAtomicRMWAdd ( Register  OldValRes,
Register  Addr,
Register  Val,
MachineMemOperand MMO 
)

Build and insert OldValRes<def> = G_ATOMICRMW_ADD Addr, Val, MMO.

Atomically replace the value at Addr with the addition of Val and the original value. Puts the original value from Addr in OldValRes.

Precondition
setBasicBlock or setMI must have been called.
OldValRes must be a generic virtual register.
Addr must be a generic virtual register with pointer type.
OldValRes, and Val must be generic virtual registers of the same type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 1008 of file MachineIRBuilder.cpp.

References Addr, and buildAtomicRMW().

◆ buildAtomicRMWAnd()

MachineInstrBuilder MachineIRBuilder::buildAtomicRMWAnd ( Register  OldValRes,
Register  Addr,
Register  Val,
MachineMemOperand MMO 
)

Build and insert OldValRes<def> = G_ATOMICRMW_AND Addr, Val, MMO.

Atomically replace the value at Addr with the bitwise and of Val and the original value. Puts the original value from Addr in OldValRes.

Precondition
setBasicBlock or setMI must have been called.
OldValRes must be a generic virtual register.
Addr must be a generic virtual register with pointer type.
OldValRes, and Val must be generic virtual registers of the same type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 1020 of file MachineIRBuilder.cpp.

References Addr, and buildAtomicRMW().

◆ buildAtomicRMWFAdd()

MachineInstrBuilder MachineIRBuilder::buildAtomicRMWFAdd ( const DstOp OldValRes,
const SrcOp Addr,
const SrcOp Val,
MachineMemOperand MMO 
)

Build and insert OldValRes<def> = G_ATOMICRMW_FADD Addr, Val, MMO.

Definition at line 1070 of file MachineIRBuilder.cpp.

References Addr, and buildAtomicRMW().

◆ buildAtomicRMWFMax()

MachineInstrBuilder MachineIRBuilder::buildAtomicRMWFMax ( const DstOp OldValRes,
const SrcOp Addr,
const SrcOp Val,
MachineMemOperand MMO 
)

Build and insert OldValRes<def> = G_ATOMICRMW_FMAX Addr, Val, MMO.

Atomically replace the value at Addr with the floating point maximum of Val and the original value. Puts the original value from Addr in OldValRes.

Precondition
setBasicBlock or setMI must have been called.
OldValRes must be a generic virtual register.
Addr must be a generic virtual register with pointer type.
OldValRes, and Val must be generic virtual registers of the same type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 1085 of file MachineIRBuilder.cpp.

References Addr, and buildAtomicRMW().

◆ buildAtomicRMWFMin()

MachineInstrBuilder MachineIRBuilder::buildAtomicRMWFMin ( const DstOp OldValRes,
const SrcOp Addr,
const SrcOp Val,
MachineMemOperand MMO 
)

Build and insert OldValRes<def> = G_ATOMICRMW_FMIN Addr, Val, MMO.

Atomically replace the value at Addr with the floating point minimum of Val and the original value. Puts the original value from Addr in OldValRes.

Precondition
setBasicBlock or setMI must have been called.
OldValRes must be a generic virtual register.
Addr must be a generic virtual register with pointer type.
OldValRes, and Val must be generic virtual registers of the same type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 1092 of file MachineIRBuilder.cpp.

References Addr, and buildAtomicRMW().

◆ buildAtomicRMWFSub()

MachineInstrBuilder MachineIRBuilder::buildAtomicRMWFSub ( const DstOp OldValRes,
const SrcOp Addr,
const SrcOp Val,
MachineMemOperand MMO 
)

Build and insert OldValRes<def> = G_ATOMICRMW_FSUB Addr, Val, MMO.

Definition at line 1078 of file MachineIRBuilder.cpp.

References Addr, and buildAtomicRMW().

◆ buildAtomicRMWMax()

MachineInstrBuilder MachineIRBuilder::buildAtomicRMWMax ( Register  OldValRes,
Register  Addr,
Register  Val,
MachineMemOperand MMO 
)

Build and insert OldValRes<def> = G_ATOMICRMW_MAX Addr, Val, MMO.

Atomically replace the value at Addr with the signed maximum of Val and the original value. Puts the original value from Addr in OldValRes.

Precondition
setBasicBlock or setMI must have been called.
OldValRes must be a generic virtual register.
Addr must be a generic virtual register with pointer type.
OldValRes, and Val must be generic virtual registers of the same type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 1045 of file MachineIRBuilder.cpp.

References Addr, and buildAtomicRMW().

◆ buildAtomicRMWMin()

MachineInstrBuilder MachineIRBuilder::buildAtomicRMWMin ( Register  OldValRes,
Register  Addr,
Register  Val,
MachineMemOperand MMO 
)

Build and insert OldValRes<def> = G_ATOMICRMW_MIN Addr, Val, MMO.

Atomically replace the value at Addr with the signed minimum of Val and the original value. Puts the original value from Addr in OldValRes.

Precondition
setBasicBlock or setMI must have been called.
OldValRes must be a generic virtual register.
Addr must be a generic virtual register with pointer type.
OldValRes, and Val must be generic virtual registers of the same type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 1051 of file MachineIRBuilder.cpp.

References Addr, and buildAtomicRMW().

◆ buildAtomicRMWNand()

MachineInstrBuilder MachineIRBuilder::buildAtomicRMWNand ( Register  OldValRes,
Register  Addr,
Register  Val,
MachineMemOperand MMO 
)

Build and insert OldValRes<def> = G_ATOMICRMW_NAND Addr, Val, MMO.

Atomically replace the value at Addr with the bitwise nand of Val and the original value. Puts the original value from Addr in OldValRes.

Precondition
setBasicBlock or setMI must have been called.
OldValRes must be a generic virtual register.
Addr must be a generic virtual register with pointer type.
OldValRes, and Val must be generic virtual registers of the same type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 1026 of file MachineIRBuilder.cpp.

References Addr, and buildAtomicRMW().

◆ buildAtomicRMWOr()

MachineInstrBuilder MachineIRBuilder::buildAtomicRMWOr ( Register  OldValRes,
Register  Addr,
Register  Val,
MachineMemOperand MMO 
)

Build and insert OldValRes<def> = G_ATOMICRMW_OR Addr, Val, MMO.

Atomically replace the value at Addr with the bitwise or of Val and the original value. Puts the original value from Addr in OldValRes.

Precondition
setBasicBlock or setMI must have been called.
OldValRes must be a generic virtual register.
Addr must be a generic virtual register with pointer type.
OldValRes, and Val must be generic virtual registers of the same type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 1031 of file MachineIRBuilder.cpp.

References Addr, and buildAtomicRMW().

◆ buildAtomicRMWSub()

MachineInstrBuilder MachineIRBuilder::buildAtomicRMWSub ( Register  OldValRes,
Register  Addr,
Register  Val,
MachineMemOperand MMO 
)

Build and insert OldValRes<def> = G_ATOMICRMW_SUB Addr, Val, MMO.

Atomically replace the value at Addr with the subtraction of Val and the original value. Puts the original value from Addr in OldValRes.

Precondition
setBasicBlock or setMI must have been called.
OldValRes must be a generic virtual register.
Addr must be a generic virtual register with pointer type.
OldValRes, and Val must be generic virtual registers of the same type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 1014 of file MachineIRBuilder.cpp.

References Addr, and buildAtomicRMW().

◆ buildAtomicRMWUmax()

MachineInstrBuilder MachineIRBuilder::buildAtomicRMWUmax ( Register  OldValRes,
Register  Addr,
Register  Val,
MachineMemOperand MMO 
)

Build and insert OldValRes<def> = G_ATOMICRMW_UMAX Addr, Val, MMO.

Atomically replace the value at Addr with the unsigned maximum of Val and the original value. Puts the original value from Addr in OldValRes.

Precondition
setBasicBlock or setMI must have been called.
OldValRes must be a generic virtual register.
Addr must be a generic virtual register with pointer type.
OldValRes, and Val must be generic virtual registers of the same type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 1057 of file MachineIRBuilder.cpp.

References Addr, and buildAtomicRMW().

◆ buildAtomicRMWUmin()

MachineInstrBuilder MachineIRBuilder::buildAtomicRMWUmin ( Register  OldValRes,
Register  Addr,
Register  Val,
MachineMemOperand MMO 
)

Build and insert OldValRes<def> = G_ATOMICRMW_UMIN Addr, Val, MMO.

Atomically replace the value at Addr with the unsigned minimum of Val and the original value. Puts the original value from Addr in OldValRes.

Precondition
setBasicBlock or setMI must have been called.
OldValRes must be a generic virtual register.
Addr must be a generic virtual register with pointer type.
OldValRes, and Val must be generic virtual registers of the same type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 1063 of file MachineIRBuilder.cpp.

References Addr, and buildAtomicRMW().

◆ buildAtomicRMWXchg()

MachineInstrBuilder MachineIRBuilder::buildAtomicRMWXchg ( Register  OldValRes,
Register  Addr,
Register  Val,
MachineMemOperand MMO 
)

Build and insert OldValRes<def> = G_ATOMICRMW_XCHG Addr, Val, MMO.

Atomically replace the value at Addr with Val. Puts the original value from Addr in OldValRes.

Precondition
setBasicBlock or setMI must have been called.
OldValRes must be a generic virtual register.
Addr must be a generic virtual register with pointer type.
OldValRes, and Val must be generic virtual registers of the same type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 1002 of file MachineIRBuilder.cpp.

References Addr, and buildAtomicRMW().

◆ buildAtomicRMWXor()

MachineInstrBuilder MachineIRBuilder::buildAtomicRMWXor ( Register  OldValRes,
Register  Addr,
Register  Val,
MachineMemOperand MMO 
)

Build and insert OldValRes<def> = G_ATOMICRMW_XOR Addr, Val, MMO.

Atomically replace the value at Addr with the bitwise xor of Val and the original value. Puts the original value from Addr in OldValRes.

Precondition
setBasicBlock or setMI must have been called.
OldValRes must be a generic virtual register.
Addr must be a generic virtual register with pointer type.
OldValRes, and Val must be generic virtual registers of the same type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 1039 of file MachineIRBuilder.cpp.

References Addr, and buildAtomicRMW().

◆ buildBitcast()

MachineInstrBuilder llvm::MachineIRBuilder::buildBitcast ( const DstOp Dst,
const SrcOp Src 
)
inline

◆ buildBitReverse()

MachineInstrBuilder llvm::MachineIRBuilder::buildBitReverse ( const DstOp Dst,
const SrcOp Src 
)
inline

Build and insert Dst = G_BITREVERSE Src.

Definition at line 2141 of file MachineIRBuilder.h.

References buildInstr().

◆ buildBlockAddress()

MachineInstrBuilder MachineIRBuilder::buildBlockAddress ( Register  Res,
const BlockAddress BA 
)

Build and insert Res = G_BLOCK_ADDR BA.

G_BLOCK_ADDR computes the address of a basic block.

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register of a pointer type.
Returns
The newly created instruction.

Definition at line 1118 of file MachineIRBuilder.cpp.

References llvm::MachineInstrBuilder::addBlockAddress(), llvm::MachineInstrBuilder::addDef(), assert(), buildInstr(), getMRI(), and getType().

◆ buildBoolExt()

MachineInstrBuilder MachineIRBuilder::buildBoolExt ( const DstOp Res,
const SrcOp Op,
bool  IsFP 
)

Definition at line 507 of file MachineIRBuilder.cpp.

References buildInstr(), getBoolExtOp(), getMRI(), and getType().

◆ buildBoolExtInReg()

MachineInstrBuilder MachineIRBuilder::buildBoolExtInReg ( const DstOp Res,
const SrcOp Op,
bool  IsVector,
bool  IsFP 
)

◆ buildBr()

MachineInstrBuilder MachineIRBuilder::buildBr ( MachineBasicBlock Dest)

Build and insert G_BR Dest.

G_BR is an unconditional branch to Dest.

Precondition
setBasicBlock or setMI must have been called.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 290 of file MachineIRBuilder.cpp.

References llvm::MachineInstrBuilder::addMBB(), and buildInstr().

Referenced by removeImplicitFallthroughs().

◆ buildBrCond()

MachineInstrBuilder MachineIRBuilder::buildBrCond ( const SrcOp Tst,
MachineBasicBlock Dest 
)

Build and insert G_BRCOND Tst, Dest.

G_BRCOND is a conditional branch to Dest.

Precondition
setBasicBlock or setMI must have been called.
Tst must be a generic virtual register with scalar type. At the beginning of legalization, this will be a single bit (s1). Targets with interesting flags registers may change this. For a wider type, whether the branch is taken must only depend on bit 0 (for now).
Returns
The newly created instruction.

Definition at line 398 of file MachineIRBuilder.cpp.

References llvm::SrcOp::addSrcToMIB(), assert(), buildInstr(), llvm::SrcOp::getLLTTy(), and getMRI().

◆ buildBrIndirect()

MachineInstrBuilder MachineIRBuilder::buildBrIndirect ( Register  Tgt)

Build and insert G_BRINDIRECT Tgt.

G_BRINDIRECT is an indirect branch to Tgt.

Precondition
setBasicBlock or setMI must have been called.
Tgt must be a generic virtual register with pointer type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 294 of file MachineIRBuilder.cpp.

References llvm::MachineInstrBuilder::addUse(), assert(), buildInstr(), getMRI(), and getType().

◆ buildBrJT()

MachineInstrBuilder MachineIRBuilder::buildBrJT ( Register  TablePtr,
unsigned  JTI,
Register  IndexReg 
)

Build and insert G_BRJT TablePtr, JTI, IndexReg.

G_BRJT is a jump table branch using a table base pointer TablePtr, jump table index JTI and index IndexReg

Precondition
setBasicBlock or setMI must have been called.
TablePtr must be a generic virtual register with pointer type.
JTI must be a jump table index.
IndexReg must be a generic virtual register with pointer type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 299 of file MachineIRBuilder.cpp.

References llvm::MachineInstrBuilder::addJumpTableIndex(), llvm::MachineInstrBuilder::addUse(), assert(), buildInstr(), getMRI(), and getType().

◆ buildBSwap()

MachineInstrBuilder llvm::MachineIRBuilder::buildBSwap ( const DstOp Dst,
const SrcOp Src0 
)
inline

Build and insert Dst = G_BSWAP Src0.

Definition at line 1798 of file MachineIRBuilder.h.

References buildInstr().

◆ buildBuildVector()

MachineInstrBuilder MachineIRBuilder::buildBuildVector ( const DstOp Res,
ArrayRef< Register Ops 
)

Build and insert Res = G_BUILD_VECTOR Op0, ...

G_BUILD_VECTOR creates a vector value from multiple scalar registers.

Precondition
setBasicBlock or setMI must have been called.
The entire register Res (and no more) must be covered by the input scalar registers.
The type of all Ops registers must be identical.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 694 of file MachineIRBuilder.cpp.

References llvm::ArrayRef< T >::begin(), buildInstr(), and llvm::ArrayRef< T >::end().

Referenced by llvm::CombinerHelper::applyCombineConcatVectors(), llvm::CombinerHelper::applyCombineInsertVecElts(), llvm::LegalizerHelper::bitcastExtractVectorElt(), llvm::CSEMIRBuilder::buildInstr(), llvm::LegalizerHelper::equalizeVectorShuffleLengths(), llvm::LegalizerHelper::fewerElementsVectorShuffle(), llvm::LegalizerHelper::lowerShuffleVector(), llvm::LegalizerHelper::narrowScalar(), and llvm::LegalizerHelper::narrowScalarExtract().

◆ buildBuildVectorConstant()

MachineInstrBuilder MachineIRBuilder::buildBuildVectorConstant ( const DstOp Res,
ArrayRef< APInt Ops 
)

◆ buildBuildVectorTrunc()

MachineInstrBuilder MachineIRBuilder::buildBuildVectorTrunc ( const DstOp Res,
ArrayRef< Register Ops 
)

Build and insert Res = G_BUILD_VECTOR_TRUNC Op0, ...

G_BUILD_VECTOR_TRUNC creates a vector value from multiple scalar registers which have types larger than the destination vector element type, and truncates the values to fit.

If the operands given are already the same size as the vector elt type, then this method will instead create a G_BUILD_VECTOR instruction.

Precondition
setBasicBlock or setMI must have been called.
The type of all Ops registers must be identical.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 721 of file MachineIRBuilder.cpp.

References llvm::ArrayRef< T >::begin(), buildInstr(), llvm::ArrayRef< T >::end(), llvm::DstOp::getLLTTy(), and getMRI().

◆ buildCast()

MachineInstrBuilder MachineIRBuilder::buildCast ( const DstOp Dst,
const SrcOp Src 
)

◆ buildConcatVectors()

MachineInstrBuilder MachineIRBuilder::buildConcatVectors ( const DstOp Res,
ArrayRef< Register Ops 
)

Build and insert Res = G_CONCAT_VECTORS Op0, ...

G_CONCAT_VECTORS creates a vector from the concatenation of 2 or more vectors.

Precondition
setBasicBlock or setMI must have been called.
The entire register Res (and no more) must be covered by the input registers.
The type of all source operands must be identical.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 772 of file MachineIRBuilder.cpp.

References llvm::ArrayRef< T >::begin(), buildInstr(), and llvm::ArrayRef< T >::end().

Referenced by llvm::LegalizerHelper::equalizeVectorShuffleLengths(), and llvm::LegalizerHelper::fewerElementsVectorShuffle().

◆ buildConstant() [1/3]

MachineInstrBuilder MachineIRBuilder::buildConstant ( const DstOp Res,
const APInt Val 
)

Definition at line 376 of file MachineIRBuilder.cpp.

References buildConstant(), getContext(), getFunction(), and getMF().

◆ buildConstant() [2/3]

MachineInstrBuilder MachineIRBuilder::buildConstant ( const DstOp Res,
const ConstantInt Val 
)
virtual

Build and insert Res = G_CONSTANT Val.

G_CONSTANT is an integer constant with the specified size and value. Val will be extended or truncated to the size of Reg.

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register with scalar or pointer type.
Returns
The newly created instruction.

Reimplemented in llvm::CSEMIRBuilder, and llvm::CSEMIRBuilder.

Definition at line 315 of file MachineIRBuilder.cpp.

References llvm::MachineInstrBuilder::addCImm(), llvm::MachineInstrBuilder::addDef(), llvm::DstOp::addDefToMIB(), assert(), buildInstr(), buildSplatBuildVector(), llvm::ConstantInt::getBitWidth(), llvm::DstOp::getLLTTy(), getMRI(), llvm::LLT::getScalarSizeInBits(), llvm::LLT::getScalarType(), llvm::LLT::isFixedVector(), and llvm::LLT::isScalableVector().

Referenced by llvm::CombinerHelper::applyCombineConstPtrAddToI2P(), llvm::CombinerHelper::applyCombineIndexedLoadStore(), llvm::CombinerHelper::applyCombineMulToShl(), llvm::CombinerHelper::applyCombineShiftToUnmerge(), llvm::CombinerHelper::applyCombineShlOfExtend(), llvm::CombinerHelper::applyCombineUnmergeConstant(), llvm::CombinerHelper::applyCombineUnmergeZExtToZExt(), llvm::CombinerHelper::applyFunnelShiftConstantModulo(), llvm::CombinerHelper::applyOptBrCondByInvertingCond(), llvm::CombinerHelper::applyPtrAddImmedChain(), llvm::CombinerHelper::applyRotateOutOfRange(), llvm::CombinerHelper::applyShiftImmedChain(), llvm::CombinerHelper::applyShiftOfShiftedLogic(), llvm::CombinerHelper::applySimplifyURemByPow2(), llvm::CombinerHelper::applyUMulHToLShr(), llvm::LegalizerHelper::bitcastExtractVectorElt(), llvm::LegalizerHelper::bitcastInsertVectorElt(), buildBuildVectorConstant(), llvm::CSEMIRBuilder::buildConstant(), buildConstant(), llvm::SPIRVGlobalRegistry::buildConstantInt(), buildExtractVectorElementConstant(), buildLoadFromOffset(), buildLogBase2(), buildMaskLowPtrBits(), buildNeg(), buildNot(), buildShuffleSplat(), buildZExtInReg(), llvm::CallLowering::ValueHandler::copyArgumentMemory(), createAtomicLibcall(), llvm::GIMatchTableExecutor::executeMatchTable(), llvm::LegalizerHelper::fewerElementsVectorExtractInsertVectorElt(), llvm::LegalizerHelper::fewerElementsVectorShuffle(), llvm::LegalizerHelper::getDynStackAllocTargetPtr(), getMemsetValue(), llvm::LegalizerHelper::getVectorElementPointer(), llvm::ARMLegalizerInfo::legalizeCustom(), llvm::MipsLegalizerInfo::legalizeCustom(), llvm::RISCVLegalizerInfo::legalizeCustom(), llvm::AArch64LegalizerInfo::legalizeIntrinsic(), llvm::LegalizerHelper::lower(), llvm::LegalizerHelper::lowerAbsToAddXor(), llvm::LegalizerHelper::lowerAbsToMaxNeg(), llvm::LegalizerHelper::lowerAddSubSatToAddoSubo(), llvm::LegalizerHelper::lowerAddSubSatToMinMax(), llvm::LegalizerHelper::lowerBitCount(), llvm::LegalizerHelper::lowerBswap(), llvm::LegalizerHelper::lowerExtract(), llvm::LegalizerHelper::lowerFCopySign(), llvm::LegalizerHelper::lowerFPTOSI(), llvm::LegalizerHelper::lowerFPTOUI(), llvm::LegalizerHelper::lowerFPTRUNC_F64_TO_F16(), llvm::LegalizerHelper::lowerFunnelShiftAsShifts(), llvm::LegalizerHelper::lowerFunnelShiftWithInverse(), llvm::LegalizerHelper::lowerInsert(), llvm::LegalizerHelper::lowerISFPCLASS(), llvm::LegalizerHelper::lowerLoad(), llvm::LegalizerHelper::lowerMergeValues(), llvm::LegalizerHelper::lowerRotateWithReverseRotate(), llvm::LegalizerHelper::lowerSADDO_SSUBO(), llvm::LegalizerHelper::lowerShlSat(), llvm::LegalizerHelper::lowerShuffleVector(), llvm::LegalizerHelper::lowerSITOFP(), llvm::LegalizerHelper::lowerSMULH_UMULH(), llvm::LegalizerHelper::lowerStore(), llvm::LegalizerHelper::lowerU64ToF32BitOps(), llvm::LegalizerHelper::lowerUnmergeValues(), llvm::LegalizerHelper::lowerVAArg(), materializePtrAdd(), llvm::LegalizerHelper::moreElementsVector(), llvm::LegalizerHelper::narrowScalar(), llvm::LegalizerHelper::narrowScalarShift(), llvm::LegalizerHelper::narrowScalarShiftByConstant(), llvm::AMDGPUCallLowering::passSpecialInputs(), llvm::CombinerHelper::replaceInstWithConstant(), llvm::LegalizationArtifactCombiner::tryCombineAnyExt(), llvm::LegalizationArtifactCombiner::tryCombineSExt(), llvm::LegalizationArtifactCombiner::tryCombineTrunc(), llvm::LegalizationArtifactCombiner::tryCombineZExt(), llvm::LegalizationArtifactCombiner::tryFoldImplicitDef(), and llvm::LegalizerHelper::widenScalar().

◆ buildConstant() [3/3]

MachineInstrBuilder MachineIRBuilder::buildConstant ( const DstOp Res,
int64_t  Val 
)

Build and insert Res = G_CONSTANT Val.

G_CONSTANT is an integer constant with the specified size and value.

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register with scalar type.
Returns
The newly created instruction.

Definition at line 339 of file MachineIRBuilder.cpp.

References buildConstant(), llvm::IntegerType::get(), getContext(), getFunction(), llvm::DstOp::getLLTTy(), getMF(), getMRI(), and getScalarSizeInBits().

◆ buildConstantPool()

MachineInstrBuilder MachineIRBuilder::buildConstantPool ( const DstOp Res,
unsigned  Idx 
)

Build and insert Res = G_CONSTANT_POOL Idx.

G_CONSTANT_POOL materializes the address of an object in the constant pool.

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register with pointer type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 167 of file MachineIRBuilder.cpp.

References llvm::DstOp::addDefToMIB(), assert(), buildInstr(), llvm::DstOp::getLLTTy(), getMRI(), and Idx.

Referenced by emitLoadFromConstantPool().

◆ buildConstDbgValue()

MachineInstrBuilder MachineIRBuilder::buildConstDbgValue ( const Constant C,
const MDNode Variable,
const MDNode Expr 
)

Build and insert a DBG_VALUE instructions specifying that Variable is given by C (suitably modified by Expr).

Definition at line 90 of file MachineIRBuilder.cpp.

References assert(), buildInstrNoInsert(), llvm::CallingConv::C, getDL(), insertInstr(), and isValid().

◆ buildCopy()

MachineInstrBuilder MachineIRBuilder::buildCopy ( const DstOp Res,
const SrcOp Op 
)

Build and insert Res = COPY Op.

Register-to-register COPY sets Res to Op.

Precondition
setBasicBlock or setMI must have been called.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 310 of file MachineIRBuilder.cpp.

References buildInstr().

Referenced by llvm::CombinerHelper::applyCombineI2PToP2I(), llvm::CombinerHelper::applyCombineShuffleVector(), llvm::CombinerHelper::applyCombineUnmergeMergeToPlainValues(), llvm::CombinerHelper::applySextTruncSextLoad(), llvm::CombinerHelper::applyShuffleToExtract(), llvm::CallLowering::IncomingValueHandler::assignValueToReg(), buildAnyextOrCopy(), buildBoolExtInReg(), buildCast(), buildDeleteTrailingVectorElements(), llvm::SPIRVGlobalRegistry::buildGlobalVariable(), llvm::LegalizerHelper::fewerElementsVectorReductions(), llvm::LegalizerHelper::fewerElementsVectorSeqReductions(), fixupPHIOpBanks(), llvm::genWorkgroupQuery(), llvm::LegalizerHelper::getDynStackAllocTargetPtr(), llvm::CallLowering::handleAssignments(), llvm::AMDGPUCallLowering::handleImplicitCallArguments(), handleMustTailForwardedRegisters(), llvm::AArch64LegalizerInfo::legalizeIntrinsic(), llvm::AArch64CallLowering::lowerCall(), llvm::MipsCallLowering::lowerCall(), llvm::LegalizerHelper::lowerDynStackAlloc(), llvm::LegalizerHelper::lowerExtract(), llvm::LegalizerHelper::lowerExtractInsertVectorElt(), llvm::MipsCallLowering::lowerFormalArguments(), llvm::InlineAsmLowering::lowerInlineAsm(), llvm::LegalizerHelper::lowerISFPCLASS(), llvm::LegalizerHelper::lowerReadWriteRegister(), llvm::X86CallLowering::lowerReturn(), llvm::AArch64CallLowering::lowerReturn(), llvm::LegalizerHelper::lowerShuffleVector(), llvm::LegalizerHelper::lowerStackRestore(), llvm::LegalizerHelper::lowerStackSave(), llvm::LegalizerHelper::lowerTRUNC(), llvm::LegalizerHelper::narrowScalar(), llvm::LegalizerHelper::narrowScalarExtract(), llvm::LegalizationArtifactCombiner::replaceRegOrBuildCopy(), llvm::CombinerHelper::replaceRegWith(), and selectCopy().

◆ buildCTLZ()

MachineInstrBuilder llvm::MachineIRBuilder::buildCTLZ ( const DstOp Dst,
const SrcOp Src0 
)
inline

Build and insert Res = G_CTLZ Op0, Src0.

Definition at line 1778 of file MachineIRBuilder.h.

References buildInstr().

Referenced by buildLogBase2(), and llvm::LegalizerHelper::lowerBitCount().

◆ buildCTLZ_ZERO_UNDEF()

MachineInstrBuilder llvm::MachineIRBuilder::buildCTLZ_ZERO_UNDEF ( const DstOp Dst,
const SrcOp Src0 
)
inline

Build and insert Res = G_CTLZ_ZERO_UNDEF Op0, Src0.

Definition at line 1783 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::LegalizerHelper::lowerBitCount(), and llvm::LegalizerHelper::lowerU64ToF32BitOps().

◆ buildCTPOP()

MachineInstrBuilder llvm::MachineIRBuilder::buildCTPOP ( const DstOp Dst,
const SrcOp Src0 
)
inline

Build and insert Res = G_CTPOP Op0, Src0.

Definition at line 1773 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::LegalizerHelper::lowerBitCount(), and llvm::LegalizerHelper::narrowScalarCTPOP().

◆ buildCTTZ()

MachineInstrBuilder llvm::MachineIRBuilder::buildCTTZ ( const DstOp Dst,
const SrcOp Src0 
)
inline

Build and insert Res = G_CTTZ Op0, Src0.

Definition at line 1788 of file MachineIRBuilder.h.

References buildInstr().

◆ buildCTTZ_ZERO_UNDEF()

MachineInstrBuilder llvm::MachineIRBuilder::buildCTTZ_ZERO_UNDEF ( const DstOp Dst,
const SrcOp Src0 
)
inline

Build and insert Res = G_CTTZ_ZERO_UNDEF Op0, Src0.

Definition at line 1793 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::LegalizerHelper::lowerBitCount().

◆ buildDbgLabel()

MachineInstrBuilder MachineIRBuilder::buildDbgLabel ( const MDNode Label)

Build and insert a DBG_LABEL instructions specifying that Label is given.

Convert "llvm.dbg.label Label" to "DBG_LABEL Label".

Definition at line 125 of file MachineIRBuilder.cpp.

References assert(), buildInstr(), and llvm::MachineIRBuilderState::DL.

◆ buildDeleteTrailingVectorElements()

MachineInstrBuilder MachineIRBuilder::buildDeleteTrailingVectorElements ( const DstOp Res,
const SrcOp Op0 
)

Build and insert a, b, ..., x, y, z = G_UNMERGE_VALUES Op0 Res = G_BUILD_VECTOR a, b, ..., x.

Delete trailing elements in Op0 to match number of elements in Res.

Precondition
setBasicBlock or setMI must have been called.
Res and Op0 must be generic virtual registers with vector type, same vector element type and Op0 must have more elements then Res.
Returns
a MachineInstrBuilder for the newly created build vector instr.

Definition at line 267 of file MachineIRBuilder.cpp.

References assert(), buildCopy(), buildMergeLikeInstr(), buildUnmerge(), llvm::LLT::getElementType(), llvm::DstOp::getLLTTy(), llvm::SrcOp::getLLTTy(), getMRI(), llvm::LLT::getNumElements(), llvm::DstOp::getReg(), llvm::LLT::isScalar(), llvm::LLT::isVector(), and llvm::SmallVectorTemplateBase< T, bool >::push_back().

Referenced by llvm::LegalizerHelper::moreElementsVector(), and llvm::LegalizerHelper::moreElementsVectorDst().

◆ buildDirectDbgValue()

MachineInstrBuilder MachineIRBuilder::buildDirectDbgValue ( Register  Reg,
const MDNode Variable,
const MDNode Expr 
)

Build and insert a DBG_VALUE instruction expressing the fact that the associated Variable lives in Reg (suitably modified by Expr).

Definition at line 50 of file MachineIRBuilder.cpp.

References assert(), llvm::BuildMI(), llvm::get(), getDL(), getMF(), getTII(), insertInstr(), and isValid().

◆ buildDynStackAlloc()

MachineInstrBuilder MachineIRBuilder::buildDynStackAlloc ( const DstOp Res,
const SrcOp Size,
Align  Alignment 
)

Build and insert Res = G_DYN_STACKALLOC Size, Align.

G_DYN_STACKALLOC does a dynamic stack allocation and writes the address of the allocated memory into Res.

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register with pointer type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 134 of file MachineIRBuilder.cpp.

References llvm::DstOp::addDefToMIB(), assert(), buildInstr(), llvm::DstOp::getLLTTy(), getMRI(), Size, and llvm::Align::value().

◆ buildExtOrTrunc()

MachineInstrBuilder MachineIRBuilder::buildExtOrTrunc ( unsigned  ExtOpc,
const DstOp Res,
const SrcOp Op 
)

Build and insert Res = ExtOpc, Res = G_TRUNC Op, or Res = COPY Op depending on the differing sizes of Res and Op.

///

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register with scalar or vector type.
Op must be a generic virtual register with scalar or vector type.
Returns
The newly created instruction.

Definition at line 531 of file MachineIRBuilder.cpp.

References assert(), buildInstr(), llvm::DstOp::getLLTTy(), and getMRI().

Referenced by llvm::CombinerHelper::applyExtendThroughPhis(), buildAnyExtOrTrunc(), buildSExtOrTrunc(), buildZExtOrTrunc(), and llvm::AArch64LegalizerInfo::legalizeIntrinsic().

◆ buildExtract()

MachineInstrBuilder MachineIRBuilder::buildExtract ( const DstOp Res,
const SrcOp Src,
uint64_t  Index 
)

Build and insert Res0, ... = G_EXTRACT Src, Idx0.

Precondition
setBasicBlock or setMI must have been called.
Res and Src must be generic virtual registers.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 599 of file MachineIRBuilder.cpp.

References assert(), buildCast(), buildInstr(), getMRI(), llvm::LLT::getSizeInBits(), and llvm::LLT::isValid().

Referenced by llvm::extractParts(), llvm::LegalizerHelper::narrowScalarExtract(), llvm::LegalizerHelper::narrowScalarInsert(), and llvm::LegalizationArtifactCombiner::tryCombineExtract().

◆ buildExtractSubvector()

MachineInstrBuilder MachineIRBuilder::buildExtractSubvector ( const DstOp Res,
const SrcOp Src,
unsigned  Index 
)

Build and insert Res = G_EXTRACT_SUBVECTOR Src, Idx0.

Precondition
setBasicBlock or setMI must have been called.
Res and Src must be generic virtual registers with vector type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 906 of file MachineIRBuilder.cpp.

References buildInstr(), and Idx.

◆ buildExtractVectorElement()

MachineInstrBuilder MachineIRBuilder::buildExtractVectorElement ( const DstOp Res,
const SrcOp Val,
const SrcOp Idx 
)

Build and insert Res = G_EXTRACT_VECTOR_ELT Val, Idx.

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register with scalar type.
Val must be a generic virtual register with vector type.
Idx must be a generic virtual register with scalar type.
Returns
The newly created instruction.

Definition at line 920 of file MachineIRBuilder.cpp.

References buildInstr(), and Idx.

Referenced by llvm::LegalizerHelper::bitcastExtractVectorElt(), llvm::LegalizerHelper::bitcastInsertVectorElt(), buildExtractVectorElementConstant(), llvm::LegalizerHelper::fewerElementsVectorExtractInsertVectorElt(), and llvm::LegalizerHelper::lowerShuffleVector().

◆ buildExtractVectorElementConstant()

MachineInstrBuilder llvm::MachineIRBuilder::buildExtractVectorElementConstant ( const DstOp Res,
const SrcOp Val,
const int  Idx 
)
inline

Build and insert Res = G_EXTRACT_VECTOR_ELT Val, Idx.

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register with scalar type.
Val must be a generic virtual register with vector type.
Returns
The newly created instruction.

Definition at line 1289 of file MachineIRBuilder.h.

References buildConstant(), buildExtractVectorElement(), Idx, and llvm::LLT::scalar().

Referenced by llvm::CombinerHelper::applyShuffleToExtract(), and llvm::LegalizerHelper::equalizeVectorShuffleLengths().

◆ buildFAbs()

MachineInstrBuilder llvm::MachineIRBuilder::buildFAbs ( const DstOp Dst,
const SrcOp Src0,
std::optional< unsigned Flags = std::nullopt 
)
inline

Build and insert Res = G_FABS Op0.

Definition at line 1851 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::LegalizerHelper::lowerIntrinsicRound().

◆ buildFAdd()

MachineInstrBuilder llvm::MachineIRBuilder::buildFAdd ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
std::optional< unsigned Flags = std::nullopt 
)
inline

◆ buildFCanonicalize()

MachineInstrBuilder llvm::MachineIRBuilder::buildFCanonicalize ( const DstOp Dst,
const SrcOp Src0,
std::optional< unsigned Flags = std::nullopt 
)
inline

Build and insert Dst = G_FCANONICALIZE Src0.

Definition at line 1858 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::CombinerHelper::applyFsubToFneg(), and llvm::LegalizerHelper::lowerFMinNumMaxNum().

◆ buildFCmp()

MachineInstrBuilder MachineIRBuilder::buildFCmp ( CmpInst::Predicate  Pred,
const DstOp Res,
const SrcOp Op0,
const SrcOp Op1,
std::optional< unsigned Flags = std::nullopt 
)

Build and insert a Res = G_FCMP PredOp0, Op1.

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register with scalar or vector type. Typically this starts as s1 or <N x s1>.
Op0 and Op1 must be generic virtual registers with the same number of elements as Res (or scalar, if Res is scalar).
Pred must be a floating-point predicate.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 881 of file MachineIRBuilder.cpp.

References buildInstr().

Referenced by llvm::LegalizerHelper::lowerFFloor(), llvm::LegalizerHelper::lowerFPTOUI(), and llvm::LegalizerHelper::lowerIntrinsicRound().

◆ buildFConstant() [1/3]

MachineInstrBuilder MachineIRBuilder::buildFConstant ( const DstOp Res,
const APFloat Val 
)

◆ buildFConstant() [2/3]

MachineInstrBuilder MachineIRBuilder::buildFConstant ( const DstOp Res,
const ConstantFP Val 
)
virtual

◆ buildFConstant() [3/3]

MachineInstrBuilder MachineIRBuilder::buildFConstant ( const DstOp Res,
double  Val 
)

◆ buildFCopysign()

MachineInstrBuilder llvm::MachineIRBuilder::buildFCopysign ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1 
)
inline

Build and insert Res = G_FCOPYSIGN Op0, Op1.

Definition at line 1917 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::LegalizerHelper::lowerIntrinsicRound().

◆ buildFDiv()

MachineInstrBuilder llvm::MachineIRBuilder::buildFDiv ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
std::optional< unsigned Flags = std::nullopt 
)
inline

Build and insert Res = G_FDIV Op0, Op1.

Definition at line 1824 of file MachineIRBuilder.h.

References buildInstr().

◆ buildFence()

MachineInstrBuilder MachineIRBuilder::buildFence ( unsigned  Ordering,
unsigned  Scope 
)

Build and insert G_FENCE Ordering, Scope.

Definition at line 1099 of file MachineIRBuilder.cpp.

References llvm::MachineInstrBuilder::addImm(), and buildInstr().

◆ buildFExp2()

MachineInstrBuilder llvm::MachineIRBuilder::buildFExp2 ( const DstOp Dst,
const SrcOp Src,
std::optional< unsigned Flags = std::nullopt 
)
inline

Build and insert Dst = G_FEXP2 Src.

Definition at line 1890 of file MachineIRBuilder.h.

References buildInstr().

◆ buildFFloor()

MachineInstrBuilder llvm::MachineIRBuilder::buildFFloor ( const DstOp Dst,
const SrcOp Src0,
std::optional< unsigned Flags = std::nullopt 
)
inline

Build and insert Res = GFFLOOR Op0, Op1.

Definition at line 1872 of file MachineIRBuilder.h.

References buildInstr().

◆ buildFFrexp()

MachineInstrBuilder llvm::MachineIRBuilder::buildFFrexp ( const DstOp Fract,
const DstOp Exp,
const SrcOp Src,
std::optional< unsigned Flags = std::nullopt 
)
inline

Build and insert Fract, Exp = G_FFREXP Src.

Definition at line 1911 of file MachineIRBuilder.h.

References buildInstr().

◆ buildFIDbgValue()

MachineInstrBuilder MachineIRBuilder::buildFIDbgValue ( int  FI,
const MDNode Variable,
const MDNode Expr 
)

Build and insert a DBG_VALUE instruction expressing the fact that the associated Variable lives in the stack slot specified by FI (suitably modified by Expr).

Definition at line 75 of file MachineIRBuilder.cpp.

References assert(), buildInstrNoInsert(), getDL(), insertInstr(), and isValid().

◆ buildFLdexp()

MachineInstrBuilder llvm::MachineIRBuilder::buildFLdexp ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
std::optional< unsigned Flags = std::nullopt 
)
inline

Build and insert Dst = G_FLDEXP Src0, Src1.

Definition at line 1904 of file MachineIRBuilder.h.

References buildInstr().

◆ buildFLog()

MachineInstrBuilder llvm::MachineIRBuilder::buildFLog ( const DstOp Dst,
const SrcOp Src,
std::optional< unsigned Flags = std::nullopt 
)
inline

Build and insert Dst = G_FLOG Src.

Definition at line 1878 of file MachineIRBuilder.h.

References buildInstr().

◆ buildFLog2()

MachineInstrBuilder llvm::MachineIRBuilder::buildFLog2 ( const DstOp Dst,
const SrcOp Src,
std::optional< unsigned Flags = std::nullopt 
)
inline

Build and insert Dst = G_FLOG2 Src.

Definition at line 1884 of file MachineIRBuilder.h.

References buildInstr().

◆ buildFMA()

MachineInstrBuilder llvm::MachineIRBuilder::buildFMA ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
const SrcOp Src2,
std::optional< unsigned Flags = std::nullopt 
)
inline

Build and insert Res = G_FMA Op0, Op1, Op2.

Definition at line 1831 of file MachineIRBuilder.h.

References buildInstr().

◆ buildFMAD()

MachineInstrBuilder llvm::MachineIRBuilder::buildFMAD ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
const SrcOp Src2,
std::optional< unsigned Flags = std::nullopt 
)
inline

Build and insert Res = G_FMAD Op0, Op1, Op2.

Definition at line 1838 of file MachineIRBuilder.h.

References buildInstr().

◆ buildFMaxNum()

MachineInstrBuilder llvm::MachineIRBuilder::buildFMaxNum ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
std::optional< unsigned Flags = std::nullopt 
)
inline

Definition at line 1683 of file MachineIRBuilder.h.

References buildInstr().

◆ buildFMaxNumIEEE()

MachineInstrBuilder llvm::MachineIRBuilder::buildFMaxNumIEEE ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
std::optional< unsigned Flags = std::nullopt 
)
inline

Definition at line 1695 of file MachineIRBuilder.h.

References buildInstr().

Referenced by AMDGPUCombinerHelper::applyExpandPromotedF16FMed3().

◆ buildFMinNum()

MachineInstrBuilder llvm::MachineIRBuilder::buildFMinNum ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
std::optional< unsigned Flags = std::nullopt 
)
inline

Definition at line 1677 of file MachineIRBuilder.h.

References buildInstr().

◆ buildFMinNumIEEE()

MachineInstrBuilder llvm::MachineIRBuilder::buildFMinNumIEEE ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
std::optional< unsigned Flags = std::nullopt 
)
inline

Definition at line 1689 of file MachineIRBuilder.h.

References buildInstr().

Referenced by AMDGPUCombinerHelper::applyExpandPromotedF16FMed3().

◆ buildFMul()

MachineInstrBuilder llvm::MachineIRBuilder::buildFMul ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
std::optional< unsigned Flags = std::nullopt 
)
inline

Definition at line 1670 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::LegalizerHelper::lowerFMad().

◆ buildFNeg()

MachineInstrBuilder llvm::MachineIRBuilder::buildFNeg ( const DstOp Dst,
const SrcOp Src0,
std::optional< unsigned Flags = std::nullopt 
)
inline

◆ buildFPExt()

MachineInstrBuilder llvm::MachineIRBuilder::buildFPExt ( const DstOp Res,
const SrcOp Op,
std::optional< unsigned Flags = std::nullopt 
)
inline

Build and insert Res = G_FPEXT Op.

Definition at line 686 of file MachineIRBuilder.h.

References buildInstr().

◆ buildFPow()

MachineInstrBuilder llvm::MachineIRBuilder::buildFPow ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
std::optional< unsigned Flags = std::nullopt 
)
inline

Build and insert Dst = G_FPOW Src0, Src1.

Definition at line 1896 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::LegalizerHelper::lowerFPOWI().

◆ buildFPTOSI()

MachineInstrBuilder llvm::MachineIRBuilder::buildFPTOSI ( const DstOp Dst,
const SrcOp Src0 
)
inline

Build and insert Res = G_FPTOSI Src0.

Definition at line 1938 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::LegalizerHelper::lowerFPTOUI().

◆ buildFPTOUI()

MachineInstrBuilder llvm::MachineIRBuilder::buildFPTOUI ( const DstOp Dst,
const SrcOp Src0 
)
inline

Build and insert Res = G_FPTOUI Src0.

Definition at line 1933 of file MachineIRBuilder.h.

References buildInstr().

◆ buildFPTrunc()

MachineInstrBuilder MachineIRBuilder::buildFPTrunc ( const DstOp Res,
const SrcOp Op,
std::optional< unsigned Flags = std::nullopt 
)

Build and insert Res = G_FPTRUNC Op.

G_FPTRUNC converts a floating-point value into one with a smaller type.

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register with scalar or vector type.
Op must be a generic virtual register with scalar or vector type.
Res must be smaller than Op
Returns
The newly created instruction.

Definition at line 869 of file MachineIRBuilder.cpp.

References buildInstr().

Referenced by AMDGPUCombinerHelper::applyExpandPromotedF16FMed3(), llvm::MipsLegalizerInfo::legalizeCustom(), and llvm::LegalizerHelper::lowerFPTRUNC_F64_TO_F16().

◆ buildFrameIndex()

MachineInstrBuilder MachineIRBuilder::buildFrameIndex ( const DstOp Res,
int  Idx 
)

Build and insert Res = G_FRAME_INDEX Idx.

G_FRAME_INDEX materializes the address of an alloca value or other stack-based object.

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register with pointer type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 145 of file MachineIRBuilder.cpp.

References llvm::DstOp::addDefToMIB(), assert(), buildInstr(), llvm::DstOp::getLLTTy(), getMRI(), and Idx.

Referenced by llvm::LegalizerHelper::createStackTemporary(), llvm::CallLowering::insertSRetOutgoingArgument(), and llvm::MipsCallLowering::lowerFormalArguments().

◆ buildFreeze()

MachineInstrBuilder llvm::MachineIRBuilder::buildFreeze ( const DstOp Dst,
const SrcOp Src 
)
inline

Build and insert Dst = G_FREEZE Src.

Definition at line 1587 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::LegalizerHelper::narrowScalar().

◆ buildFSub()

MachineInstrBuilder llvm::MachineIRBuilder::buildFSub ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
std::optional< unsigned Flags = std::nullopt 
)
inline

Build and insert Res = G_FSUB Op0, Op1.

Definition at line 1817 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::MipsLegalizerInfo::legalizeCustom(), llvm::LegalizerHelper::lowerFPTOUI(), and llvm::LegalizerHelper::lowerIntrinsicRound().

◆ buildGlobalValue()

MachineInstrBuilder MachineIRBuilder::buildGlobalValue ( const DstOp Res,
const GlobalValue GV 
)

Build and insert Res = G_GLOBAL_VALUE GV.

G_GLOBAL_VALUE materializes the address of the specified global into Res.

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register with pointer type in the same address space as GV.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 154 of file MachineIRBuilder.cpp.

References llvm::DstOp::addDefToMIB(), assert(), buildInstr(), llvm::PointerType::getAddressSpace(), llvm::DstOp::getLLTTy(), getMRI(), and llvm::GlobalValue::getType().

Referenced by addCallTargetOperands(), llvm::MipsCallLowering::lowerCall(), and llvm::CallLowering::lowerCall().

◆ buildICmp()

MachineInstrBuilder MachineIRBuilder::buildICmp ( CmpInst::Predicate  Pred,
const DstOp Res,
const SrcOp Op0,
const SrcOp Op1 
)

Build and insert a Res = G_ICMP Pred, Op0, Op1.

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register with scalar or vector type. Typically this starts as s1 or <N x s1>.
Op0 and Op1 must be generic virtual registers with the same number of elements as Res. If Res is a scalar, Op0 must be either a scalar or pointer.
Pred must be an integer predicate.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 874 of file MachineIRBuilder.cpp.

Referenced by llvm::buildAtomicCompareExchangeInst(), llvm::genWorkgroupQuery(), llvm::ARMLegalizerInfo::legalizeCustom(), llvm::RISCVLegalizerInfo::legalizeCustom(), llvm::LegalizerHelper::lower(), llvm::LegalizerHelper::lowerBitCount(), llvm::LegalizerHelper::lowerFPTOSI(), llvm::LegalizerHelper::lowerFPTRUNC_F64_TO_F16(), llvm::LegalizerHelper::lowerISFPCLASS(), llvm::LegalizerHelper::lowerMinMax(), llvm::LegalizerHelper::lowerSADDO_SSUBO(), llvm::LegalizerHelper::lowerShlSat(), llvm::LegalizerHelper::lowerSITOFP(), llvm::LegalizerHelper::lowerU64ToF32BitOps(), llvm::LegalizerHelper::narrowScalar(), and llvm::LegalizerHelper::narrowScalarShift().

◆ buildIndirectDbgValue()

MachineInstrBuilder MachineIRBuilder::buildIndirectDbgValue ( Register  Reg,
const MDNode Variable,
const MDNode Expr 
)

Build and insert a DBG_VALUE instruction expressing the fact that the associated Variable lives in memory at Reg (suitably modified by Expr).

Definition at line 63 of file MachineIRBuilder.cpp.

References assert(), llvm::BuildMI(), llvm::get(), getDL(), getMF(), getTII(), insertInstr(), and isValid().

◆ buildInsert()

MachineInstrBuilder MachineIRBuilder::buildInsert ( const DstOp Res,
const SrcOp Src,
const SrcOp Op,
unsigned  Index 
)

◆ buildInsertSubvector()

MachineInstrBuilder MachineIRBuilder::buildInsertSubvector ( const DstOp Res,
const SrcOp Src0,
const SrcOp Src1,
unsigned  Index 
)

Build and insert Res = G_INSERT_SUBVECTOR Src0, Src1, Idx.

Precondition
setBasicBlock or setMI must have been called.
Res, Src0, and Src1 must be generic virtual registers with vector type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 898 of file MachineIRBuilder.cpp.

References buildInstr(), and Idx.

◆ buildInsertVectorElement()

MachineInstrBuilder MachineIRBuilder::buildInsertVectorElement ( const DstOp Res,
const SrcOp Val,
const SrcOp Elt,
const SrcOp Idx 
)

Build and insert Res = G_INSERT_VECTOR_ELT Val, Elt, Idx.

Precondition
setBasicBlock or setMI must have been called.
Res and Val must be a generic virtual register
Elt and Idx must be a generic virtual register with scalar type.
Returns
The newly created instruction.

Definition at line 914 of file MachineIRBuilder.cpp.

References buildInstr(), and Idx.

Referenced by llvm::LegalizerHelper::bitcastInsertVectorElt(), buildShuffleSplat(), llvm::LegalizerHelper::fewerElementsVectorExtractInsertVectorElt(), and llvm::LegalizerHelper::moreElementsVector().

◆ buildInstr() [1/2]

MachineInstrBuilder MachineIRBuilder::buildInstr ( unsigned  Opc,
ArrayRef< DstOp DstOps,
ArrayRef< SrcOp SrcOps,
std::optional< unsigned Flags = std::nullopt 
)
virtual

◆ buildInstr() [2/2]

MachineInstrBuilder llvm::MachineIRBuilder::buildInstr ( unsigned  Opcode)
inline

Build and insert <empty> = Opcode <empty>.

The insertion point is the one set by the last call of either setBasicBlock or setMI.

Precondition
setBasicBlock or setMI must have been called.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 396 of file MachineIRBuilder.h.

References buildInstrNoInsert(), and insertInstr().

Referenced by llvm::CombinerHelper::applyBuildInstructionSteps(), llvm::CombinerHelper::applyCombineDivRem(), llvm::CombinerHelper::applyCombineExtOfExt(), llvm::CombinerHelper::applyCombineIndexedLoadStore(), llvm::CombinerHelper::applyCombineTruncOfExt(), llvm::CombinerHelper::applyCombineTruncOfShift(), llvm::CombinerHelper::applyFoldBinOpIntoSelect(), llvm::CombinerHelper::applyFunnelShiftConstantModulo(), llvm::CombinerHelper::applyShiftOfShiftedLogic(), buildAbs(), buildAdd(), buildAddrSpaceCast(), buildAnd(), buildAnyExt(), buildAShr(), buildAssertInstr(), buildAtomicCmpXchg(), buildAtomicCmpXchgWithSuccess(), llvm::buildAtomicCompareExchangeInst(), llvm::buildAtomicFlagInst(), llvm::buildAtomicFloatingRMWInst(), llvm::buildAtomicInitInst(), llvm::buildAtomicLoadInst(), buildAtomicRMW(), llvm::buildAtomicRMWInst(), llvm::buildAtomicStoreInst(), llvm::buildBarrierInst(), buildBitcast(), buildBitReverse(), buildBlockAddress(), buildBoolExt(), buildBr(), buildBrCond(), buildBrIndirect(), buildBrJT(), buildBSwap(), buildBuildVector(), buildBuildVectorConstant(), buildBuildVectorTrunc(), buildCast(), buildConcatVectors(), buildConstant(), llvm::SPIRVGlobalRegistry::buildConstantFP(), llvm::SPIRVGlobalRegistry::buildConstantInt(), buildConstantPool(), llvm::SPIRVGlobalRegistry::buildConstantSampler(), buildCopy(), buildCTLZ(), buildCTLZ_ZERO_UNDEF(), buildCTPOP(), buildCTTZ(), buildCTTZ_ZERO_UNDEF(), buildDbgLabel(), buildDynStackAlloc(), llvm::buildEnqueueKernel(), buildExtOrTrunc(), buildExtract(), buildExtractSubvector(), buildExtractVectorElement(), buildFAbs(), buildFAdd(), buildFCanonicalize(), buildFCmp(), llvm::CSEMIRBuilder::buildFConstant(), buildFConstant(), buildFCopysign(), buildFDiv(), buildFence(), buildFExp2(), buildFFloor(), buildFFrexp(), buildFLdexp(), buildFLog(), buildFLog2(), buildFMA(), buildFMAD(), buildFMaxNum(), buildFMaxNumIEEE(), buildFMinNum(), buildFMinNumIEEE(), buildFMul(), buildFNeg(), buildFPExt(), buildFPow(), buildFPTOSI(), buildFPTOUI(), buildFPTrunc(), buildFrameIndex(), buildFreeze(), buildFSub(), buildGlobalValue(), llvm::SPIRVGlobalRegistry::buildGlobalVariable(), buildInsert(), buildInsertSubvector(), buildInsertVectorElement(), llvm::CSEMIRBuilder::buildInstr(), buildInstr(), buildIntrinsic(), buildIntrinsicRoundeven(), buildIntrinsicTrunc(), buildIntToPtr(), buildIsFPClass(), buildJumpTable(), buildLoadInstr(), buildLShr(), buildMemTransferInst(), buildMergeLikeInstr(), buildMergeValues(), buildMul(), llvm::buildNDRange(), buildNeg(), buildNot(), llvm::buildOpDecorate(), llvm::buildOpName(), buildOr(), buildPrefetch(), buildPtrAdd(), buildPtrMask(), buildPtrToInt(), buildRotateLeft(), buildRotateRight(), buildSAdde(), buildSAddo(), buildSbfx(), buildSelect(), buildSExt(), buildSExtInReg(), buildShl(), buildShuffleVector(), buildSITOFP(), buildSMax(), buildSMin(), buildSMulH(), buildSplatBuildVector(), buildSplatVector(), buildSSube(), buildSSubo(), buildStore(), buildStrictFAdd(), buildSub(), buildTrunc(), buildUAdde(), buildUAddo(), buildUbfx(), buildUITOFP(), buildUMax(), buildUMin(), buildUMulH(), buildUndef(), buildUnmerge(), buildURem(), buildUSube(), buildUSubo(), buildVecReduceAdd(), buildVecReduceAnd(), buildVecReduceFAdd(), buildVecReduceFMax(), buildVecReduceFMaximum(), buildVecReduceFMin(), buildVecReduceFMinimum(), buildVecReduceFMul(), buildVecReduceMul(), buildVecReduceOr(), buildVecReduceSeqFAdd(), buildVecReduceSeqFMul(), buildVecReduceSMax(), buildVecReduceSMin(), buildVecReduceUMax(), buildVecReduceUMin(), buildVecReduceXor(), buildVScale(), buildXor(), buildZExt(), convertPtrToInt(), copySubReg(), createTuple(), llvm::GIMatchTableExecutor::executeMatchTable(), llvm::LegalizerHelper::fewerElementsVectorMultiEltType(), llvm::LegalizerHelper::fewerElementsVectorPhi(), llvm::LegalizerHelper::fewerElementsVectorReductions(), llvm::LegalizerHelper::fewerElementsVectorSeqReductions(), llvm::LegalizerHelper::fewerElementsVectorUnmergeValues(), llvm::generateAsyncCopy(), llvm::generateConvertInst(), llvm::generateDotOrFMulInst(), llvm::generateEnqueueInst(), llvm::generateExtInst(), llvm::generateGroupInst(), llvm::generateGroupUniformInst(), llvm::generateImageMiscQueryInst(), llvm::generateImageSizeQueryInst(), llvm::generateIntelSubgroupsInst(), llvm::generateLoadStoreInst(), llvm::generateReadImageInst(), llvm::generateRelationalInst(), llvm::generateSampleImageInst(), llvm::generateSpecConstantInst(), llvm::generateVectorLoadStoreInst(), llvm::generateWriteImageInst(), llvm::SPIRVGlobalRegistry::getOrCreateConstNullPtr(), llvm::SPIRVGlobalRegistry::getOrCreateOpTypeByOpcode(), llvm::SPIRVGlobalRegistry::getOrCreateOpTypeDeviceEvent(), llvm::SPIRVGlobalRegistry::getOrCreateOpTypeImage(), llvm::SPIRVGlobalRegistry::getOrCreateOpTypePipe(), llvm::SPIRVGlobalRegistry::getOrCreateOpTypeSampledImage(), llvm::SPIRVGlobalRegistry::getOrCreateOpTypeSampler(), llvm::insertAssignInstr(), llvm::RISCVLegalizerInfo::legalizeCustom(), llvm::AArch64LegalizerInfo::legalizeIntrinsic(), llvm::MipsLegalizerInfo::legalizeIntrinsic(), llvm::LegalizerHelper::lower(), llvm::LegalizerHelper::lowerAddSubSatToAddoSubo(), llvm::LegalizerHelper::lowerAddSubSatToMinMax(), llvm::LegalizerHelper::lowerBitreverse(), llvm::AArch64CallLowering::lowerCall(), llvm::AMDGPUCallLowering::lowerCall(), llvm::ARMCallLowering::lowerCall(), llvm::M68kCallLowering::lowerCall(), llvm::MipsCallLowering::lowerCall(), llvm::RISCVCallLowering::lowerCall(), llvm::SPIRVCallLowering::lowerCall(), llvm::X86CallLowering::lowerCall(), llvm::LegalizerHelper::lowerDIVREM(), llvm::LegalizerHelper::lowerEXT(), llvm::LegalizerHelper::lowerFMinNumMaxNum(), llvm::SPIRVCallLowering::lowerFormalArguments(), llvm::LegalizerHelper::lowerFunnelShiftWithInverse(), llvm::AArch64CallLowering::lowerReturn(), llvm::BPFCallLowering::lowerReturn(), llvm::SPIRVCallLowering::lowerReturn(), llvm::LegalizerHelper::lowerRotateWithReverseRotate(), llvm::LegalizerHelper::lowerSMULH_UMULH(), llvm::AMDGPUCallLowering::lowerTailCall(), llvm::CombinerHelper::matchNarrowBinopFeedingAnd(), llvm::LegalizerHelper::moreElementsVector(), MSA2OpIntrinsicToGeneric(), MSA3OpIntrinsicToGeneric(), llvm::LegalizerHelper::narrowScalar(), llvm::LegalizerHelper::narrowScalarAddSub(), llvm::LegalizerHelper::narrowScalarBasic(), llvm::LegalizerHelper::narrowScalarDst(), llvm::LegalizerHelper::narrowScalarShift(), llvm::processInstr(), SelectMSA3OpIntrinsic(), llvm::LegalizationArtifactCombiner::tryCombineAnyExt(), llvm::LegalizationArtifactCombiner::tryCombineSExt(), llvm::LegalizationArtifactCombiner::tryCombineUnmergeValues(), llvm::AArch64GISelUtils::tryEmitBZero(), llvm::LegalizationArtifactCombiner::tryFoldImplicitDef(), validatePtrTypes(), llvm::LegalizerHelper::widenScalar(), llvm::LegalizerHelper::widenScalarDst(), and llvm::LegalizerHelper::widenScalarSrc().

◆ buildInstrNoInsert()

MachineInstrBuilder MachineIRBuilder::buildInstrNoInsert ( unsigned  Opcode)

◆ buildIntrinsic() [1/4]

MachineInstrBuilder MachineIRBuilder::buildIntrinsic ( Intrinsic::ID  ID,
ArrayRef< DstOp Res 
)

Definition at line 855 of file MachineIRBuilder.cpp.

References llvm::Intrinsic::getAttributes(), and getContext().

◆ buildIntrinsic() [2/4]

MachineInstrBuilder MachineIRBuilder::buildIntrinsic ( Intrinsic::ID  ID,
ArrayRef< DstOp Res,
bool  HasSideEffects,
bool  isConvergent 
)

Definition at line 844 of file MachineIRBuilder.cpp.

References buildInstr(), and getIntrinsicOpcode().

◆ buildIntrinsic() [3/4]

MachineInstrBuilder MachineIRBuilder::buildIntrinsic ( Intrinsic::ID  ID,
ArrayRef< Register Res 
)

◆ buildIntrinsic() [4/4]

MachineInstrBuilder MachineIRBuilder::buildIntrinsic ( Intrinsic::ID  ID,
ArrayRef< Register Res,
bool  HasSideEffects,
bool  isConvergent 
)

Build and insert a G_INTRINSIC instruction.

There are four different opcodes based on combinations of whether the intrinsic has side effects and whether it is convergent. These properties can be specified as explicit parameters, or else they are retrieved from the MCID for the intrinsic.

The parameter Res provides the Registers or MOs that will be defined by this instruction.

Precondition
setBasicBlock or setMI must have been called.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 825 of file MachineIRBuilder.cpp.

References buildInstr(), and getIntrinsicOpcode().

Referenced by llvm::buildEnqueueKernel(), buildIntrinsic(), and llvm::genWorkgroupQuery().

◆ buildIntrinsicRoundeven()

MachineInstrBuilder llvm::MachineIRBuilder::buildIntrinsicRoundeven ( const DstOp Dst,
const SrcOp Src0,
std::optional< unsigned Flags = std::nullopt 
)
inline

Build and insert Dst = G_INTRINSIC_ROUNDEVEN Src0, Src1.

Definition at line 1944 of file MachineIRBuilder.h.

References buildInstr().

◆ buildIntrinsicTrunc()

MachineInstrBuilder llvm::MachineIRBuilder::buildIntrinsicTrunc ( const DstOp Dst,
const SrcOp Src0,
std::optional< unsigned Flags = std::nullopt 
)
inline

Build and insert Dst = G_INTRINSIC_TRUNC Src0.

Definition at line 1865 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::LegalizerHelper::lowerFFloor(), and llvm::LegalizerHelper::lowerIntrinsicRound().

◆ buildIntToPtr()

MachineInstrBuilder llvm::MachineIRBuilder::buildIntToPtr ( const DstOp Dst,
const SrcOp Src 
)
inline

◆ buildIsFPClass()

MachineInstrBuilder llvm::MachineIRBuilder::buildIsFPClass ( const DstOp Res,
const SrcOp Src,
unsigned  Mask 
)
inline

Build and insert a Res = G_IS_FPCLASS Src, Mask.

Definition at line 1247 of file MachineIRBuilder.h.

References buildInstr().

◆ buildJumpTable()

MachineInstrBuilder MachineIRBuilder::buildJumpTable ( const LLT  PtrTy,
unsigned  JTI 
)

Build and insert Res = G_JUMP_TABLE JTI.

G_JUMP_TABLE sets Res to the address of the jump table specified by the jump table index JTI.

Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 176 of file MachineIRBuilder.cpp.

References buildInstr().

◆ buildLoad() [1/2]

MachineInstrBuilder llvm::MachineIRBuilder::buildLoad ( const DstOp Res,
const SrcOp Addr,
MachineMemOperand MMO 
)
inline

Build and insert Res = G_LOAD Addr, MMO.

Loads the value stored at Addr. Puts the result in Res.

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register.
Addr must be a generic virtual register with pointer type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 930 of file MachineIRBuilder.h.

References Addr, and buildLoadInstr().

Referenced by buildLoad(), buildLoadFromOffset(), llvm::buildLoadInst(), llvm::CallLowering::insertSRetLoads(), llvm::MipsLegalizerInfo::legalizeCustom(), llvm::AArch64LegalizerInfo::legalizeIntrinsic(), llvm::MipsLegalizerInfo::legalizeIntrinsic(), llvm::RISCVLegalizerInfo::legalizeIntrinsic(), llvm::LegalizerHelper::lowerExtractInsertVectorElt(), llvm::LegalizerHelper::lowerLoad(), llvm::LegalizerHelper::lowerVAArg(), llvm::LegalizerHelper::narrowScalar(), and llvm::LegalizerHelper::reduceLoadStoreWidth().

◆ buildLoad() [2/2]

MachineInstrBuilder MachineIRBuilder::buildLoad ( const DstOp Res,
const SrcOp Addr,
MachinePointerInfo  PtrInfo,
Align  Alignment,
MachineMemOperand::Flags  MMOFlags = MachineMemOperand::MONone,
const AAMDNodes AAInfo = AAMDNodes() 
)

Build and insert a G_LOAD instruction, while constructing the MachineMemOperand.

Definition at line 409 of file MachineIRBuilder.cpp.

References Addr, assert(), buildLoad(), llvm::MachineFunction::getMachineMemOperand(), getMF(), getMRI(), llvm::MachineMemOperand::MOLoad, and llvm::MachineMemOperand::MOStore.

◆ buildLoadFromOffset()

MachineInstrBuilder MachineIRBuilder::buildLoadFromOffset ( const DstOp Dst,
const SrcOp BasePtr,
MachineMemOperand BaseMMO,
int64_t  Offset 
)

Helper to create a load from a constant offset given a base address.

Load the type of Dst from Offset from the given base address and memory operand.

Definition at line 436 of file MachineIRBuilder.cpp.

References buildConstant(), buildLoad(), buildPtrAdd(), llvm::MachineFunction::getMachineMemOperand(), getMF(), getMRI(), llvm::LLT::getSizeInBits(), llvm::Offset, Ptr, and llvm::LLT::scalar().

◆ buildLoadInstr()

MachineInstrBuilder MachineIRBuilder::buildLoadInstr ( unsigned  Opcode,
const DstOp Res,
const SrcOp Addr,
MachineMemOperand MMO 
)

Build and insert Res = <opcode> Addr, MMO.

Loads the value stored at Addr. Puts the result in Res.

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register.
Addr must be a generic virtual register with pointer type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 422 of file MachineIRBuilder.cpp.

References llvm::DstOp::addDefToMIB(), Addr, assert(), buildInstr(), llvm::DstOp::getLLTTy(), getMRI(), and isValid().

Referenced by llvm::CombinerHelper::applySextInRegOfLoad(), buildLoad(), emitLoadFromConstantPool(), llvm::LegalizerHelper::lowerLoad(), and llvm::LegalizerHelper::narrowScalar().

◆ buildLShr()

MachineInstrBuilder llvm::MachineIRBuilder::buildLShr ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
std::optional< unsigned Flags = std::nullopt 
)
inline

◆ buildMaskLowPtrBits()

MachineInstrBuilder MachineIRBuilder::buildMaskLowPtrBits ( const DstOp Res,
const SrcOp Op0,
uint32_t  NumBits 
)

Build and insert Res = G_PTRMASK Op0, G_CONSTANT (1 << NumBits) - 1.

This clears the low bits of a pointer operand without destroying its pointer properties. This has the effect of rounding the address down to a specified alignment in bits.

Precondition
setBasicBlock or setMI must have been called.
Res and Op0 must be generic virtual registers with pointer type.
NumBits must be an integer representing the number of low bits to be cleared in Op0.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 225 of file MachineIRBuilder.cpp.

References buildConstant(), buildPtrMask(), llvm::MachineRegisterInfo::createGenericVirtualRegister(), llvm::DstOp::getLLTTy(), getMRI(), llvm::LLT::getSizeInBits(), and llvm::LLT::scalar().

Referenced by llvm::LegalizerHelper::lowerVAArg().

◆ buildMemCpy()

MachineInstrBuilder llvm::MachineIRBuilder::buildMemCpy ( const SrcOp DstPtr,
const SrcOp SrcPtr,
const SrcOp Size,
MachineMemOperand DstMMO,
MachineMemOperand SrcMMO 
)
inline

◆ buildMemTransferInst()

MachineInstrBuilder llvm::MachineIRBuilder::buildMemTransferInst ( unsigned  Opcode,
const SrcOp DstPtr,
const SrcOp SrcPtr,
const SrcOp Size,
MachineMemOperand DstMMO,
MachineMemOperand SrcMMO 
)
inline

Build and insert G_MEMCPY or G_MEMMOVE.

Definition at line 2097 of file MachineIRBuilder.h.

References llvm::MachineInstrBuilder::addMemOperand(), buildInstr(), and Size.

Referenced by buildMemCpy().

◆ buildMergeLikeInstr() [1/2]

MachineInstrBuilder MachineIRBuilder::buildMergeLikeInstr ( const DstOp Res,
ArrayRef< Register Ops 
)

Build and insert Res = G_MERGE_VALUES Op0, ... or Res = G_BUILD_VECTOR Op0, ... or Res = G_CONCAT_VECTORS Op0, ...

G_MERGE_VALUES combines the input elements contiguously into a larger register. It is used when the destination register is not a vector. G_BUILD_VECTOR combines scalar inputs into a vector register. G_CONCAT_VECTORS combines vector inputs into a vector register.

Precondition
setBasicBlock or setMI must have been called.
The entire register Res (and no more) must be covered by the input registers.
The type of all Ops registers must be identical.
Returns
a MachineInstrBuilder for the newly created instruction. The opcode of the new instruction will depend on the types of both the destination and the sources.

Definition at line 639 of file MachineIRBuilder.cpp.

References assert(), llvm::ArrayRef< T >::begin(), buildInstr(), llvm::ArrayRef< T >::end(), and llvm::SmallVectorBase< Size_T >::size().

Referenced by llvm::CombinerHelper::applyCombineShiftToUnmerge(), llvm::CombinerHelper::applyCombineShuffleVector(), buildDeleteTrailingVectorElements(), buildPadVectorWithUndefElements(), llvm::extractParts(), llvm::extractVectorParts(), llvm::LegalizerHelper::fewerElementsBitcast(), llvm::LegalizerHelper::fewerElementsVectorMerge(), llvm::LegalizerHelper::fewerElementsVectorMultiEltType(), llvm::LegalizerHelper::fewerElementsVectorPhi(), llvm::MipsLegalizerInfo::legalizeCustom(), llvm::LegalizerHelper::lowerBitcast(), llvm::X86CallLowering::lowerCall(), llvm::LegalizerHelper::lowerEXT(), llvm::LegalizerHelper::lowerExtract(), llvm::LegalizerHelper::lowerExtractInsertVectorElt(), llvm::LegalizerHelper::lowerInsert(), llvm::LegalizerHelper::lowerTRUNC(), llvm::LegalizerHelper::narrowScalar(), llvm::LegalizerHelper::narrowScalarExtract(), llvm::LegalizerHelper::narrowScalarInsert(), llvm::LegalizerHelper::narrowScalarMul(), llvm::LegalizerHelper::narrowScalarShift(), llvm::LegalizerHelper::narrowScalarShiftByConstant(), llvm::LegalizationArtifactCombiner::ArtifactValueFinder::tryCombineMergeLike(), and llvm::LegalizationArtifactCombiner::tryCombineUnmergeValues().

◆ buildMergeLikeInstr() [2/2]

MachineInstrBuilder MachineIRBuilder::buildMergeLikeInstr ( const DstOp Res,
std::initializer_list< SrcOp Ops 
)

Definition at line 650 of file MachineIRBuilder.cpp.

References assert(), and buildInstr().

◆ buildMergeValues()

MachineInstrBuilder MachineIRBuilder::buildMergeValues ( const DstOp Res,
ArrayRef< Register Ops 
)

Build and insert Res = G_MERGE_VALUES Op0, ...

G_MERGE_VALUES combines the input elements contiguously into a larger register. It should only be used when the destination register is not a vector.

Precondition
setBasicBlock or setMI must have been called.
The entire register Res (and no more) must be covered by the input registers.
The type of all Ops registers must be identical.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 628 of file MachineIRBuilder.cpp.

References assert(), llvm::ArrayRef< T >::begin(), buildInstr(), llvm::ArrayRef< T >::end(), and llvm::SmallVectorBase< Size_T >::size().

Referenced by llvm::LegalizationArtifactCombiner::tryCombineTrunc().

◆ buildMul()

MachineInstrBuilder llvm::MachineIRBuilder::buildMul ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
std::optional< unsigned Flags = std::nullopt 
)
inline

Build and insert Res = G_MUL Op0, Op1.

G_MUL sets Res to the product of integer parameters Op0 and Op1, truncated to their width.

Precondition
setBasicBlock or setMI must have been called.
Res, Op0 and Op1 must be generic virtual registers with the same (scalar or vector) type).
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 1645 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::LegalizerHelper::bitcastExtractVectorElt(), getMemsetValue(), llvm::LegalizerHelper::getVectorElementPointer(), llvm::LegalizerHelper::lower(), and llvm::LegalizerHelper::lowerSMULH_UMULH().

◆ buildNeg()

MachineInstrBuilder llvm::MachineIRBuilder::buildNeg ( const DstOp Dst,
const SrcOp Src0 
)
inline

Build and insert integer negation Zero = G_CONSTANT 0 Res = G_SUB Zero, Op0.

Definition at line 1767 of file MachineIRBuilder.h.

References buildConstant(), buildInstr(), and getMRI().

◆ buildNot()

MachineInstrBuilder llvm::MachineIRBuilder::buildNot ( const DstOp Dst,
const SrcOp Src0 
)
inline

◆ buildOr()

MachineInstrBuilder llvm::MachineIRBuilder::buildOr ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
std::optional< unsigned Flags = std::nullopt 
)
inline

◆ buildPadVectorWithUndefElements()

MachineInstrBuilder MachineIRBuilder::buildPadVectorWithUndefElements ( const DstOp Res,
const SrcOp Op0 
)

Build and insert a, b, ..., x = G_UNMERGE_VALUES Op0 Res = G_BUILD_VECTOR a, b, ..., x, undef, ..., undef.

Pad Op0 with undef elements to match number of elements in Res.

Precondition
setBasicBlock or setMI must have been called.
Res and Op0 must be generic virtual registers with vector type, same vector element type and Op0 must have fewer elements then Res.
Returns
a MachineInstrBuilder for the newly created build vector instr.

Definition at line 236 of file MachineIRBuilder.cpp.

References assert(), buildMergeLikeInstr(), buildUndef(), buildUnmerge(), llvm::LLT::getElementType(), llvm::DstOp::getLLTTy(), llvm::SrcOp::getLLTTy(), getMRI(), llvm::LLT::getNumElements(), llvm::SrcOp::getReg(), llvm::MachineInstrBuilder::getReg(), llvm::LLT::getSizeInBits(), llvm::LLT::isVector(), llvm::SmallVectorTemplateBase< T, bool >::push_back(), and llvm::SmallVectorBase< Size_T >::size().

Referenced by llvm::AArch64CallLowering::lowerReturn(), llvm::LegalizerHelper::moreElementsVector(), and llvm::LegalizerHelper::moreElementsVectorSrc().

◆ buildPrefetch()

MachineInstrBuilder MachineIRBuilder::buildPrefetch ( const SrcOp Addr,
unsigned  RW,
unsigned  Locality,
unsigned  CacheType,
MachineMemOperand MMO 
)

Build and insert G_PREFETCH Addr, RW, Locality, CacheType.

Definition at line 1105 of file MachineIRBuilder.cpp.

References Addr, and buildInstr().

◆ buildPtrAdd()

MachineInstrBuilder MachineIRBuilder::buildPtrAdd ( const DstOp Res,
const SrcOp Op0,
const SrcOp Op1,
std::optional< unsigned Flags = std::nullopt 
)

Build and insert Res = G_PTR_ADD Op0, Op1.

G_PTR_ADD adds Op1 addressible units to the pointer specified by Op0, storing the resulting pointer in Res. Addressible units are typically bytes but this can vary between targets.

Precondition
setBasicBlock or setMI must have been called.
Res and Op0 must be generic virtual registers with pointer type.
Op1 must be a generic virtual register with scalar type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 200 of file MachineIRBuilder.cpp.

References assert(), buildInstr(), llvm::DstOp::getLLTTy(), llvm::SrcOp::getLLTTy(), and getMRI().

Referenced by llvm::CombinerHelper::applyCombineAddP2IToPtrAdd(), buildLoadFromOffset(), llvm::LegalizerHelper::getVectorElementPointer(), llvm::MipsLegalizerInfo::legalizeCustom(), llvm::LegalizerHelper::lowerLoad(), llvm::LegalizerHelper::lowerStore(), llvm::LegalizerHelper::lowerVAArg(), llvm::CombinerHelper::matchReassocConstantInnerRHS(), and materializePtrAdd().

◆ buildPtrMask()

MachineInstrBuilder llvm::MachineIRBuilder::buildPtrMask ( const DstOp Res,
const SrcOp Op0,
const SrcOp Op1 
)
inline

Build and insert Res = G_PTRMASK Op0, Op1.

Definition at line 521 of file MachineIRBuilder.h.

References buildInstr().

Referenced by buildMaskLowPtrBits().

◆ buildPtrToInt()

MachineInstrBuilder llvm::MachineIRBuilder::buildPtrToInt ( const DstOp Dst,
const SrcOp Src 
)
inline

◆ buildRotateLeft()

MachineInstrBuilder llvm::MachineIRBuilder::buildRotateLeft ( const DstOp Dst,
const SrcOp Src,
const SrcOp Amt 
)
inline

Build and insert Dst = G_ROTL Src, Amt.

Definition at line 2135 of file MachineIRBuilder.h.

References buildInstr().

◆ buildRotateRight()

MachineInstrBuilder llvm::MachineIRBuilder::buildRotateRight ( const DstOp Dst,
const SrcOp Src,
const SrcOp Amt 
)
inline

Build and insert Dst = G_ROTR Src, Amt.

Definition at line 2129 of file MachineIRBuilder.h.

References buildInstr().

◆ buildSAdde()

MachineInstrBuilder llvm::MachineIRBuilder::buildSAdde ( const DstOp Res,
const DstOp CarryOut,
const SrcOp Op0,
const SrcOp Op1,
const SrcOp CarryIn 
)
inline

Build and insert Res, CarryOut = G_SADDE Op0, Op1, CarryInp.

Definition at line 635 of file MachineIRBuilder.h.

References buildInstr().

◆ buildSAddo()

MachineInstrBuilder llvm::MachineIRBuilder::buildSAddo ( const DstOp Res,
const DstOp CarryOut,
const SrcOp Op0,
const SrcOp Op1 
)
inline

Build and insert Res, CarryOut = G_SADDO Op0, Op1.

Definition at line 594 of file MachineIRBuilder.h.

References buildInstr().

◆ buildSbfx()

MachineInstrBuilder llvm::MachineIRBuilder::buildSbfx ( const DstOp Dst,
const SrcOp Src,
const SrcOp LSB,
const SrcOp Width 
)
inline

Build and insert Dst = G_SBFX Src, LSB, Width.

Definition at line 2117 of file MachineIRBuilder.h.

References buildInstr().

◆ buildSelect()

MachineInstrBuilder MachineIRBuilder::buildSelect ( const DstOp Res,
const SrcOp Tst,
const SrcOp Op0,
const SrcOp Op1,
std::optional< unsigned Flags = std::nullopt 
)

◆ buildSExt()

MachineInstrBuilder MachineIRBuilder::buildSExt ( const DstOp Res,
const SrcOp Op 
)

Build and insert Res = G_SEXT Op.

G_SEXT produces a register of the specified width, with bits 0 to sizeof(Ty) * 8 set to Op. The remaining bits are duplicated from the high bit of Op (i.e. 2s-complement sign extended).

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register with scalar or vector type.
Op must be a generic virtual register with scalar or vector type.
Op must be smaller than Res
Returns
The newly created instruction.

Definition at line 485 of file MachineIRBuilder.cpp.

References buildInstr().

Referenced by llvm::CallLowering::ValueHandler::extendRegister(), llvm::LegalizerHelper::lowerFPTOSI(), and llvm::LegalizerHelper::narrowScalar().

◆ buildSExtInReg()

MachineInstrBuilder llvm::MachineIRBuilder::buildSExtInReg ( const DstOp Res,
const SrcOp Op,
int64_t  ImmOp 
)
inline

◆ buildSExtOrTrunc()

MachineInstrBuilder MachineIRBuilder::buildSExtOrTrunc ( const DstOp Res,
const SrcOp Op 
)

Build and insert Res = G_SEXT Op, Res = G_TRUNC Op, or Res = COPY Op depending on the differing sizes of Res and Op.

///

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register with scalar or vector type.
Op must be a generic virtual register with scalar or vector type.
Returns
The newly created instruction.

Definition at line 555 of file MachineIRBuilder.cpp.

References buildExtOrTrunc().

Referenced by llvm::LegalizerHelper::getVectorElementPointer(), llvm::LegalizerHelper::lowerSelect(), and llvm::LegalizationArtifactCombiner::tryCombineZExt().

◆ buildShl()

MachineInstrBuilder llvm::MachineIRBuilder::buildShl ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
std::optional< unsigned Flags = std::nullopt 
)
inline

◆ buildShuffleSplat()

MachineInstrBuilder MachineIRBuilder::buildShuffleSplat ( const DstOp Res,
const SrcOp Src 
)

Build and insert a vector splat of a scalar Src using a G_INSERT_VECTOR_ELT and G_SHUFFLE_VECTOR idiom.

Precondition
setBasicBlock or setMI must have been called.
Src must have the same type as the element type of Dst
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 733 of file MachineIRBuilder.cpp.

References assert(), buildConstant(), buildInsertVectorElement(), buildShuffleVector(), buildUndef(), llvm::LLT::getElementType(), llvm::DstOp::getLLTTy(), getMRI(), llvm::LLT::getNumElements(), and llvm::LLT::scalar().

Referenced by llvm::LegalizerHelper::lowerSelect(), and llvm::LegalizerHelper::moreElementsVector().

◆ buildShuffleVector()

MachineInstrBuilder MachineIRBuilder::buildShuffleVector ( const DstOp Res,
const SrcOp Src1,
const SrcOp Src2,
ArrayRef< int >  Mask 
)

◆ buildSITOFP()

MachineInstrBuilder llvm::MachineIRBuilder::buildSITOFP ( const DstOp Dst,
const SrcOp Src0 
)
inline

Build and insert Res = G_SITOFP Src0.

Definition at line 1928 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::LegalizerHelper::lowerFFloor(), and llvm::LegalizerHelper::lowerFPOWI().

◆ buildSMax()

MachineInstrBuilder llvm::MachineIRBuilder::buildSMax ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1 
)
inline

◆ buildSMin()

MachineInstrBuilder llvm::MachineIRBuilder::buildSMin ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1 
)
inline

◆ buildSMulH()

MachineInstrBuilder llvm::MachineIRBuilder::buildSMulH ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
std::optional< unsigned Flags = std::nullopt 
)
inline

Definition at line 1657 of file MachineIRBuilder.h.

References buildInstr().

◆ buildSplatBuildVector()

MachineInstrBuilder MachineIRBuilder::buildSplatBuildVector ( const DstOp Res,
const SrcOp Src 
)

Build and insert Res = G_BUILD_VECTOR with Src replicated to fill the number of elements.

Definition at line 714 of file MachineIRBuilder.cpp.

References buildInstr(), llvm::DstOp::getLLTTy(), and getMRI().

Referenced by buildConstant(), llvm::CSEMIRBuilder::buildConstant(), buildFConstant(), llvm::CSEMIRBuilder::buildFConstant(), and getMemsetValue().

◆ buildSplatVector()

MachineInstrBuilder MachineIRBuilder::buildSplatVector ( const DstOp Res,
const SrcOp Val 
)

Build and insert Res = G_SPLAT_VECTOR Val.

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register with vector type.
Val must be a generic virtual register with scalar type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 745 of file MachineIRBuilder.cpp.

References assert(), buildInstr(), llvm::DstOp::getLLTTy(), and getMRI().

◆ buildSSube()

MachineInstrBuilder llvm::MachineIRBuilder::buildSSube ( const DstOp Res,
const DstOp CarryOut,
const SrcOp Op0,
const SrcOp Op1,
const SrcOp CarryIn 
)
inline

Build and insert Res, CarryOut = G_SSUBE Op0, Op1, CarryInp.

Definition at line 643 of file MachineIRBuilder.h.

References buildInstr().

◆ buildSSubo()

MachineInstrBuilder llvm::MachineIRBuilder::buildSSubo ( const DstOp Res,
const DstOp CarryOut,
const SrcOp Op0,
const SrcOp Op1 
)
inline

Build and insert Res, CarryOut = G_SUBO Op0, Op1.

Definition at line 600 of file MachineIRBuilder.h.

References buildInstr().

◆ buildStore() [1/2]

MachineInstrBuilder MachineIRBuilder::buildStore ( const SrcOp Val,
const SrcOp Addr,
MachineMemOperand MMO 
)

◆ buildStore() [2/2]

MachineInstrBuilder MachineIRBuilder::buildStore ( const SrcOp Val,
const SrcOp Addr,
MachinePointerInfo  PtrInfo,
Align  Alignment,
MachineMemOperand::Flags  MMOFlags = MachineMemOperand::MONone,
const AAMDNodes AAInfo = AAMDNodes() 
)

◆ buildStrictFAdd()

MachineInstrBuilder llvm::MachineIRBuilder::buildStrictFAdd ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
std::optional< unsigned Flags = std::nullopt 
)
inline

Build and insert Res = G_STRICT_FADD Op0, Op1.

Definition at line 1811 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::LegalizerHelper::lower().

◆ buildSub()

MachineInstrBuilder llvm::MachineIRBuilder::buildSub ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
std::optional< unsigned Flags = std::nullopt 
)
inline

◆ buildTrunc()

MachineInstrBuilder MachineIRBuilder::buildTrunc ( const DstOp Res,
const SrcOp Op 
)

Build and insert Res = G_TRUNC Op.

G_TRUNC extracts the low bits of a type. For a vector type each element is truncated independently before being packed into the destination.

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register with scalar or vector type.
Op must be a generic virtual register with scalar or vector type.
Res must be smaller than Op
Returns
The newly created instruction.

Definition at line 863 of file MachineIRBuilder.cpp.

References buildInstr().

Referenced by llvm::CombinerHelper::applyCombineExtendingLoads(), llvm::CombinerHelper::applyCombineTruncOfExt(), llvm::CombinerHelper::applyCombineTruncOfShift(), llvm::CombinerHelper::applyCombineUnmergeWithDeadLanesToTrunc(), llvm::CombinerHelper::applyExtractVecEltBuildVec(), llvm::CallLowering::IncomingValueHandler::assignValueToReg(), llvm::LegalizerHelper::bitcastExtractVectorElt(), llvm::ARMLegalizerInfo::legalizeCustom(), llvm::MipsLegalizerInfo::legalizeCustom(), llvm::AArch64LegalizerInfo::legalizeIntrinsic(), llvm::LegalizerHelper::lowerExtract(), llvm::LegalizerHelper::lowerFCopySign(), llvm::AArch64CallLowering::lowerFormalArguments(), llvm::LegalizerHelper::lowerFPTRUNC_F64_TO_F16(), llvm::InlineAsmLowering::lowerInlineAsm(), llvm::LegalizerHelper::lowerLoad(), llvm::LegalizerHelper::lowerSMULH_UMULH(), llvm::LegalizerHelper::lowerTRUNC(), llvm::LegalizerHelper::lowerU64ToF32BitOps(), llvm::LegalizerHelper::lowerUnmergeValues(), llvm::CombinerHelper::matchNarrowBinopFeedingAnd(), llvm::LegalizerHelper::narrowScalar(), llvm::LegalizerHelper::narrowScalarInsert(), llvm::LegalizerHelper::narrowScalarSrc(), llvm::LegalizationArtifactCombiner::tryCombineTrunc(), llvm::LegalizationArtifactCombiner::tryFoldUnmergeCast(), and llvm::LegalizerHelper::widenScalar().

◆ buildUAdde()

MachineInstrBuilder llvm::MachineIRBuilder::buildUAdde ( const DstOp Res,
const DstOp CarryOut,
const SrcOp Op0,
const SrcOp Op1,
const SrcOp CarryIn 
)
inline

Build and insert Res, CarryOut = G_UADDE Op0, Op1, CarryIn.

G_UADDE sets Res to Op0 + Op1 + CarryIn (truncated to the bit width) and sets CarryOut to 1 if the result overflowed in unsigned arithmetic.

Precondition
setBasicBlock or setMI must have been called.
Res, Op0 and Op1 must be generic virtual registers with the same scalar type.
CarryOut and CarryIn must be generic virtual registers with the same scalar type (typically s1)
Returns
The newly created instruction.

Definition at line 619 of file MachineIRBuilder.h.

References buildInstr().

◆ buildUAddo()

MachineInstrBuilder llvm::MachineIRBuilder::buildUAddo ( const DstOp Res,
const DstOp CarryOut,
const SrcOp Op0,
const SrcOp Op1 
)
inline

Build and insert Res, CarryOut = G_UADDO Op0, Op1.

G_UADDO sets Res to Op0 + Op1 (truncated to the bit width) and sets CarryOut to 1 if the result overflowed in unsigned arithmetic.

Precondition
setBasicBlock or setMI must have been called.
Res, Op0 and Op1 must be generic virtual registers with the same scalar type.
CarryOut must be generic virtual register with scalar type (typically s1)
Returns
The newly created instruction.

Definition at line 582 of file MachineIRBuilder.h.

References buildInstr().

◆ buildUbfx()

MachineInstrBuilder llvm::MachineIRBuilder::buildUbfx ( const DstOp Dst,
const SrcOp Src,
const SrcOp LSB,
const SrcOp Width 
)
inline

Build and insert Dst = G_UBFX Src, LSB, Width.

Definition at line 2123 of file MachineIRBuilder.h.

References buildInstr().

◆ buildUITOFP()

MachineInstrBuilder llvm::MachineIRBuilder::buildUITOFP ( const DstOp Dst,
const SrcOp Src0 
)
inline

Build and insert Res = G_UITOFP Src0.

Definition at line 1923 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::LegalizerHelper::lowerSITOFP().

◆ buildUMax()

MachineInstrBuilder llvm::MachineIRBuilder::buildUMax ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1 
)
inline

Build and insert Res = G_UMAX Op0, Op1.

Definition at line 1969 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::AArch64LegalizerInfo::legalizeIntrinsic().

◆ buildUMin()

MachineInstrBuilder llvm::MachineIRBuilder::buildUMin ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1 
)
inline

Build and insert Res = G_UMIN Op0, Op1.

Definition at line 1963 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::AArch64LegalizerInfo::legalizeIntrinsic(), and llvm::LegalizerHelper::lowerAddSubSatToMinMax().

◆ buildUMulH()

MachineInstrBuilder llvm::MachineIRBuilder::buildUMulH ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
std::optional< unsigned Flags = std::nullopt 
)
inline

Definition at line 1651 of file MachineIRBuilder.h.

References buildInstr().

◆ buildUndef()

MachineInstrBuilder MachineIRBuilder::buildUndef ( const DstOp Res)

◆ buildUnmerge() [1/3]

MachineInstrBuilder MachineIRBuilder::buildUnmerge ( ArrayRef< LLT Res,
const SrcOp Op 
)

◆ buildUnmerge() [2/3]

MachineInstrBuilder MachineIRBuilder::buildUnmerge ( ArrayRef< Register Res,
const SrcOp Op 
)

◆ buildUnmerge() [3/3]

MachineInstrBuilder MachineIRBuilder::buildUnmerge ( LLT  Res,
const SrcOp Op 
)

Build and insert an unmerge of Res sized pieces to cover Op.

Definition at line 677 of file MachineIRBuilder.cpp.

References buildInstr(), getMRI(), and llvm::LLT::getSizeInBits().

◆ buildURem()

MachineInstrBuilder llvm::MachineIRBuilder::buildURem ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1,
std::optional< unsigned Flags = std::nullopt 
)
inline

Build and insert Res = G_UREM Op0, Op1.

Definition at line 1664 of file MachineIRBuilder.h.

References buildInstr().

Referenced by llvm::CombinerHelper::applyRotateOutOfRange(), and llvm::LegalizerHelper::lowerFunnelShiftAsShifts().

◆ buildUSube()

MachineInstrBuilder llvm::MachineIRBuilder::buildUSube ( const DstOp Res,
const DstOp CarryOut,
const SrcOp Op0,
const SrcOp Op1,
const SrcOp CarryIn 
)
inline

Build and insert Res, CarryOut = G_USUBE Op0, Op1, CarryInp.

Definition at line 627 of file MachineIRBuilder.h.

References buildInstr().

◆ buildUSubo()

MachineInstrBuilder llvm::MachineIRBuilder::buildUSubo ( const DstOp Res,
const DstOp CarryOut,
const SrcOp Op0,
const SrcOp Op1 
)
inline

Build and insert Res, CarryOut = G_USUBO Op0, Op1.

Definition at line 588 of file MachineIRBuilder.h.

References buildInstr().

◆ buildVecReduceAdd()

MachineInstrBuilder llvm::MachineIRBuilder::buildVecReduceAdd ( const DstOp Dst,
const SrcOp Src 
)
inline

Build and insert Res = G_VECREDUCE_ADD Src.

Definition at line 2052 of file MachineIRBuilder.h.

References buildInstr().

◆ buildVecReduceAnd()

MachineInstrBuilder llvm::MachineIRBuilder::buildVecReduceAnd ( const DstOp Dst,
const SrcOp Src 
)
inline

Build and insert Res = G_VECREDUCE_AND Src.

Definition at line 2062 of file MachineIRBuilder.h.

References buildInstr().

◆ buildVecReduceFAdd()

MachineInstrBuilder llvm::MachineIRBuilder::buildVecReduceFAdd ( const DstOp Dst,
const SrcOp ScalarIn,
const SrcOp VecIn 
)
inline

Build and insert Res = G_VECREDUCE_FADD Src.

ScalarIn is the scalar accumulator input to the reduction operation of VecIn.

Definition at line 2013 of file MachineIRBuilder.h.

References buildInstr().

◆ buildVecReduceFMax()

MachineInstrBuilder llvm::MachineIRBuilder::buildVecReduceFMax ( const DstOp Dst,
const SrcOp Src 
)
inline

Build and insert Res = G_VECREDUCE_FMAX Src.

Definition at line 2030 of file MachineIRBuilder.h.

References buildInstr().

◆ buildVecReduceFMaximum()

MachineInstrBuilder llvm::MachineIRBuilder::buildVecReduceFMaximum ( const DstOp Dst,
const SrcOp Src 
)
inline

Build and insert Res = G_VECREDUCE_FMAXIMUM Src.

Definition at line 2040 of file MachineIRBuilder.h.

References buildInstr().

◆ buildVecReduceFMin()

MachineInstrBuilder llvm::MachineIRBuilder::buildVecReduceFMin ( const DstOp Dst,
const SrcOp Src 
)
inline

Build and insert Res = G_VECREDUCE_FMIN Src.

Definition at line 2035 of file MachineIRBuilder.h.

References buildInstr().

◆ buildVecReduceFMinimum()

MachineInstrBuilder llvm::MachineIRBuilder::buildVecReduceFMinimum ( const DstOp Dst,
const SrcOp Src 
)
inline

Build and insert Res = G_VECREDUCE_FMINIMUM Src.

Definition at line 2046 of file MachineIRBuilder.h.

References buildInstr().

◆ buildVecReduceFMul()

MachineInstrBuilder llvm::MachineIRBuilder::buildVecReduceFMul ( const DstOp Dst,
const SrcOp ScalarIn,
const SrcOp VecIn 
)
inline

Build and insert Res = G_VECREDUCE_FMUL Src.

ScalarIn is the scalar accumulator input to the reduction operation of VecIn.

Definition at line 2023 of file MachineIRBuilder.h.

References buildInstr().

◆ buildVecReduceMul()

MachineInstrBuilder llvm::MachineIRBuilder::buildVecReduceMul ( const DstOp Dst,
const SrcOp Src 
)
inline

Build and insert Res = G_VECREDUCE_MUL Src.

Definition at line 2057 of file MachineIRBuilder.h.

References buildInstr().

◆ buildVecReduceOr()

MachineInstrBuilder llvm::MachineIRBuilder::buildVecReduceOr ( const DstOp Dst,
const SrcOp Src 
)
inline

Build and insert Res = G_VECREDUCE_OR Src.

Definition at line 2067 of file MachineIRBuilder.h.

References buildInstr().

◆ buildVecReduceSeqFAdd()

MachineInstrBuilder llvm::MachineIRBuilder::buildVecReduceSeqFAdd ( const DstOp Dst,
const SrcOp ScalarIn,
const SrcOp VecIn 
)
inline

Build and insert Res = G_VECREDUCE_SEQ_FADD ScalarIn, VecIn.

ScalarIn is the scalar accumulator input to start the sequential reduction operation of VecIn.

Definition at line 1991 of file MachineIRBuilder.h.

References buildInstr().

◆ buildVecReduceSeqFMul()

MachineInstrBuilder llvm::MachineIRBuilder::buildVecReduceSeqFMul ( const DstOp Dst,
const SrcOp ScalarIn,
const SrcOp VecIn 
)
inline

Build and insert Res = G_VECREDUCE_SEQ_FMUL ScalarIn, VecIn.

ScalarIn is the scalar accumulator input to start the sequential reduction operation of VecIn.

Definition at line 2002 of file MachineIRBuilder.h.

References buildInstr().

◆ buildVecReduceSMax()

MachineInstrBuilder llvm::MachineIRBuilder::buildVecReduceSMax ( const DstOp Dst,
const SrcOp Src 
)
inline

Build and insert Res = G_VECREDUCE_SMAX Src.

Definition at line 2077 of file MachineIRBuilder.h.

References buildInstr().

◆ buildVecReduceSMin()

MachineInstrBuilder llvm::MachineIRBuilder::buildVecReduceSMin ( const DstOp Dst,
const SrcOp Src 
)
inline

Build and insert Res = G_VECREDUCE_SMIN Src.

Definition at line 2082 of file MachineIRBuilder.h.

References buildInstr().

◆ buildVecReduceUMax()

MachineInstrBuilder llvm::MachineIRBuilder::buildVecReduceUMax ( const DstOp Dst,
const SrcOp Src 
)
inline

Build and insert Res = G_VECREDUCE_UMAX Src.

Definition at line 2087 of file MachineIRBuilder.h.

References buildInstr().

◆ buildVecReduceUMin()

MachineInstrBuilder llvm::MachineIRBuilder::buildVecReduceUMin ( const DstOp Dst,
const SrcOp Src 
)
inline

Build and insert Res = G_VECREDUCE_UMIN Src.

Definition at line 2092 of file MachineIRBuilder.h.

References buildInstr().

◆ buildVecReduceXor()

MachineInstrBuilder llvm::MachineIRBuilder::buildVecReduceXor ( const DstOp Dst,
const SrcOp Src 
)
inline

Build and insert Res = G_VECREDUCE_XOR Src.

Definition at line 2072 of file MachineIRBuilder.h.

References buildInstr().

◆ buildVScale() [1/2]

MachineInstrBuilder MachineIRBuilder::buildVScale ( const DstOp Res,
const ConstantInt MinElts 
)

Build and insert Res = G_VSCALE MinElts.

G_VSCALE puts the value of the runtime vscale multiplied by MinElts into Res.

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register with scalar type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 805 of file MachineIRBuilder.cpp.

References llvm::DstOp::addDefToMIB(), buildInstr(), and getMRI().

◆ buildVScale() [2/2]

MachineInstrBuilder MachineIRBuilder::buildVScale ( const DstOp Res,
unsigned  MinElts 
)

Build and insert Res = G_VSCALE MinElts.

G_VSCALE puts the value of the runtime vscale multiplied by MinElts into Res.

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register with scalar type.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 796 of file MachineIRBuilder.cpp.

References buildVScale(), llvm::IntegerType::get(), getContext(), getFunction(), llvm::DstOp::getLLTTy(), getMF(), getMRI(), and getScalarSizeInBits().

Referenced by buildVScale().

◆ buildXor()

MachineInstrBuilder llvm::MachineIRBuilder::buildXor ( const DstOp Dst,
const SrcOp Src0,
const SrcOp Src1 
)
inline

◆ buildZExt()

MachineInstrBuilder MachineIRBuilder::buildZExt ( const DstOp Res,
const SrcOp Op 
)

Build and insert Res = G_ZEXT Op.

G_ZEXT produces a register of the specified width, with bits 0 to sizeof(Ty) * 8 set to Op. The remaining bits are 0. For a vector register, each element is extended individually.

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register with scalar or vector type.
Op must be a generic virtual register with scalar or vector type.
Op must be smaller than Res
Returns
The newly created instruction.

Definition at line 490 of file MachineIRBuilder.cpp.

References buildInstr().

Referenced by llvm::CombinerHelper::applyCombineShlOfExtend(), llvm::CombinerHelper::applyCombineUnmergeZExtToZExt(), llvm::CallLowering::ValueHandler::extendRegister(), llvm::LegalizerHelper::lower(), llvm::AArch64CallLowering::lowerCall(), llvm::LegalizerHelper::lowerFCopySign(), llvm::LegalizerHelper::lowerFPTOSI(), llvm::LegalizerHelper::lowerFPTRUNC_F64_TO_F16(), llvm::LegalizerHelper::lowerInsert(), llvm::LegalizerHelper::lowerMergeValues(), llvm::AArch64CallLowering::lowerReturn(), llvm::CombinerHelper::matchNarrowBinopFeedingAnd(), and llvm::LegalizerHelper::narrowScalar().

◆ buildZExtInReg()

MachineInstrBuilder MachineIRBuilder::buildZExtInReg ( const DstOp Res,
const SrcOp Op,
int64_t  ImmOp 
)

Build and inserts Res = G_AND Op, LowBitsSet(ImmOp) Since there is no G_ZEXT_INREG like G_SEXT_INREG, the instruction is emulated using G_AND.

Definition at line 570 of file MachineIRBuilder.cpp.

References buildAnd(), buildConstant(), llvm::DstOp::getLLTTy(), llvm::APInt::getLowBitsSet(), getMRI(), and llvm::LLT::getScalarSizeInBits().

Referenced by buildBoolExtInReg(), and llvm::LegalizerHelper::lowerStore().

◆ buildZExtOrTrunc()

MachineInstrBuilder MachineIRBuilder::buildZExtOrTrunc ( const DstOp Res,
const SrcOp Op 
)

Build and insert Res = G_ZEXT Op, Res = G_TRUNC Op, or Res = COPY Op depending on the differing sizes of Res and Op.

///

Precondition
setBasicBlock or setMI must have been called.
Res must be a generic virtual register with scalar or vector type.
Op must be a generic virtual register with scalar or vector type.
Returns
The newly created instruction.

Definition at line 560 of file MachineIRBuilder.cpp.

References buildExtOrTrunc().

Referenced by llvm::CombinerHelper::applyCombineP2IToI2P(), llvm::CombinerHelper::applyUMulHToLShr(), llvm::genWorkgroupQuery(), getMemsetValue(), and llvm::LegalizerHelper::widenScalar().

◆ getBoolExtOp()

unsigned MachineIRBuilder::getBoolExtOp ( bool  IsVec,
bool  IsFP 
) const

◆ getContext()

LLVMContext & llvm::MachineIRBuilder::getContext ( ) const
inline

◆ getCSEInfo() [1/2]

GISelCSEInfo * llvm::MachineIRBuilder::getCSEInfo ( )
inline

Definition at line 315 of file MachineIRBuilder.h.

References llvm::MachineIRBuilderState::CSEInfo.

Referenced by llvm::CSEMIRBuilder::buildInstr().

◆ getCSEInfo() [2/2]

const GISelCSEInfo * llvm::MachineIRBuilder::getCSEInfo ( ) const
inline

Definition at line 316 of file MachineIRBuilder.h.

References llvm::MachineIRBuilderState::CSEInfo.

◆ getDataLayout()

const DataLayout & llvm::MachineIRBuilder::getDataLayout ( ) const
inline

◆ getDebugLoc()

const DebugLoc & llvm::MachineIRBuilder::getDebugLoc ( )
inline

Get the current instruction's debug location.

Definition at line 381 of file MachineIRBuilder.h.

References llvm::MachineIRBuilderState::DL.

Referenced by llvm::SPIRVGlobalRegistry::getOrCreateSPIRVPointerType().

◆ getDL()

const DebugLoc & llvm::MachineIRBuilder::getDL ( )
inline

◆ getInsertPt()

MachineBasicBlock::iterator llvm::MachineIRBuilder::getInsertPt ( )
inline

◆ getMBB() [1/2]

MachineBasicBlock & llvm::MachineIRBuilder::getMBB ( )
inline

Definition at line 310 of file MachineIRBuilder.h.

References getMBB().

◆ getMBB() [2/2]

const MachineBasicBlock & llvm::MachineIRBuilder::getMBB ( ) const
inline

◆ getMF() [1/2]

MachineFunction & llvm::MachineIRBuilder::getMF ( )
inline

Getter for the function we currently build.

Definition at line 273 of file MachineIRBuilder.h.

References assert(), and llvm::MachineIRBuilderState::MF.

Referenced by llvm::CombinerHelper::applySextInRegOfLoad(), llvm::SPIRVGlobalRegistry::assignTypeToVReg(), buildAnyextOrCopy(), llvm::buildAtomicCompareExchangeInst(), buildBoolExtInReg(), llvm::buildBoolRegister(), llvm::buildBuiltinVariableLoad(), buildConstant(), llvm::SPIRVGlobalRegistry::buildConstantFP(), llvm::SPIRVGlobalRegistry::buildConstantInt(), buildDirectDbgValue(), llvm::buildEnqueueKernel(), buildFConstant(), llvm::SPIRVGlobalRegistry::buildGlobalVariable(), buildIndirectDbgValue(), buildInstrNoInsert(), buildLoad(), buildLoadFromOffset(), llvm::buildLoadInst(), llvm::buildNDRange(), buildShuffleVector(), buildStore(), buildVScale(), convertPtrToInt(), llvm::CallLowering::ValueHandler::copyArgumentMemory(), createAtomicLibcall(), llvm::createLibcall(), llvm::createMemLibcall(), llvm::LegalizerHelper::createStackTemporary(), createTuple(), createTypeVReg(), llvm::CallLowering::determineAndHandleAssignments(), emitLoadFromConstantPool(), generateAssignInstrs(), llvm::generateConvertInst(), llvm::generateGroupUniformInst(), llvm::generateImageSizeQueryInst(), llvm::generateIntelSubgroupsInst(), llvm::generateReadImageInst(), llvm::genWorkgroupQuery(), getBoolExtOp(), getContext(), getDataLayout(), llvm::SPIRVGlobalRegistry::getOrCreateOpTypeByOpcode(), llvm::SPIRVGlobalRegistry::getOrCreateOpTypeDeviceEvent(), llvm::SPIRVGlobalRegistry::getOrCreateOpTypeFunctionWithArgs(), llvm::SPIRVGlobalRegistry::getOrCreateOpTypeImage(), llvm::SPIRVGlobalRegistry::getOrCreateOpTypePipe(), llvm::SPIRVGlobalRegistry::getOrCreateOpTypeSampledImage(), llvm::SPIRVGlobalRegistry::getOrCreateOpTypeSampler(), llvm::SPIRVGlobalRegistry::getOrCreateSPIRVBoolType(), llvm::getOrCreateSPIRVDeviceEventPointer(), llvm::SPIRVGlobalRegistry::getOrCreateSPIRVIntegerType(), llvm::SPIRVGlobalRegistry::getOrCreateSPIRVType(), llvm::SPIRVGlobalRegistry::getOrCreateSPIRVTypeByName(), llvm::CombinerHelper::getTargetLowering(), llvm::CallLowering::handleAssignments(), handleMustTailForwardedRegisters(), llvm::insertAssignInstr(), insertBitcasts(), llvm::CallLowering::insertSRetLoads(), llvm::CallLowering::insertSRetOutgoingArgument(), llvm::CallLowering::insertSRetStores(), llvm::AArch64CallLowering::isEligibleForTailCallOptimization(), llvm::ARMLegalizerInfo::legalizeCustom(), llvm::MipsLegalizerInfo::legalizeCustom(), llvm::AMDGPULegalizerInfo::legalizeMinNumMaxNum(), llvm::LegalizerHelper::libcall(), llvm::AArch64CallLowering::lowerCall(), llvm::AMDGPUCallLowering::lowerCall(), llvm::ARMCallLowering::lowerCall(), llvm::M68kCallLowering::lowerCall(), llvm::MipsCallLowering::lowerCall(), llvm::RISCVCallLowering::lowerCall(), llvm::SPIRVCallLowering::lowerCall(), llvm::X86CallLowering::lowerCall(), llvm::CallLowering::lowerCall(), llvm::AMDGPUCallLowering::lowerChainCall(), llvm::AArch64CallLowering::lowerFormalArguments(), llvm::ARMCallLowering::lowerFormalArguments(), llvm::M68kCallLowering::lowerFormalArguments(), llvm::MipsCallLowering::lowerFormalArguments(), llvm::PPCCallLowering::lowerFormalArguments(), llvm::RISCVCallLowering::lowerFormalArguments(), llvm::SPIRVCallLowering::lowerFormalArguments(), llvm::X86CallLowering::lowerFormalArguments(), llvm::LegalizerHelper::lowerFPTRUNC_F64_TO_F16(), llvm::InlineAsmLowering::lowerInlineAsm(), llvm::LegalizerHelper::lowerLoad(), llvm::LegalizerHelper::lowerReadWriteRegister(), llvm::ARMCallLowering::lowerReturn(), llvm::MipsCallLowering::lowerReturn(), llvm::X86CallLowering::lowerReturn(), llvm::AArch64CallLowering::lowerReturn(), llvm::M68kCallLowering::lowerReturn(), llvm::PPCCallLowering::lowerReturn(), llvm::SPIRVCallLowering::lowerReturn(), llvm::LegalizerHelper::lowerStore(), llvm::AMDGPUCallLowering::lowerTailCall(), llvm::CombinerHelper::matchCombineConstPtrAddToI2P(), llvm::CombinerHelper::matchNotCmp(), llvm::CombinerHelper::matchPtrAddZero(), llvm::AMDGPUCallLowering::passSpecialInputs(), propagateSPIRVType(), llvm::LegalizerHelper::reduceLoadStoreWidth(), llvm::RegBankSelect::repairReg(), setInsertPt(), setMBB(), llvm::CombinerHelper::tryCombineMemCpyFamily(), llvm::AArch64GISelUtils::tryEmitBZero(), llvm::CombinerHelper::tryEmitMemcpyInline(), validatePtrTypes(), and llvm::LegalizerHelper::widenScalar().

◆ getMF() [2/2]

const MachineFunction & llvm::MachineIRBuilder::getMF ( ) const
inline

Definition at line 278 of file MachineIRBuilder.h.

References assert(), and llvm::MachineIRBuilderState::MF.

◆ getMRI() [1/2]

MachineRegisterInfo * llvm::MachineIRBuilder::getMRI ( )
inline

Getter for MRI.

Definition at line 295 of file MachineIRBuilder.h.

References llvm::MachineIRBuilderState::MRI.

Referenced by buildAnyextOrCopy(), buildAtomicCmpXchg(), buildAtomicCmpXchgWithSuccess(), llvm::buildAtomicCompareExchangeInst(), llvm::buildAtomicFlagInst(), llvm::buildAtomicFloatingRMWInst(), llvm::buildAtomicInitInst(), llvm::buildAtomicLoadInst(), buildAtomicRMW(), llvm::buildAtomicRMWInst(), llvm::buildAtomicStoreInst(), llvm::buildBarrierInst(), buildBlockAddress(), buildBoolExt(), llvm::buildBoolRegister(), buildBrCond(), buildBrIndirect(), buildBrJT(), buildBuildVectorConstant(), buildBuildVectorTrunc(), llvm::buildBuiltinVariableLoad(), buildCast(), buildConstant(), llvm::CSEMIRBuilder::buildConstant(), buildConstantPool(), llvm::SPIRVGlobalRegistry::buildConstantSampler(), buildDeleteTrailingVectorElements(), buildDynStackAlloc(), llvm::buildEnqueueKernel(), buildExtOrTrunc(), buildExtract(), buildFConstant(), llvm::CSEMIRBuilder::buildFConstant(), buildFrameIndex(), buildGlobalValue(), llvm::SPIRVGlobalRegistry::buildGlobalVariable(), buildInsert(), llvm::CSEMIRBuilder::buildInstr(), buildInstr(), buildLoad(), buildLoadFromOffset(), llvm::buildLoadInst(), buildLoadInstr(), buildLogBase2(), buildMaskLowPtrBits(), llvm::buildMemSemanticsReg(), llvm::buildNDRange(), buildNeg(), buildNot(), buildPadVectorWithUndefElements(), buildPtrAdd(), buildShuffleSplat(), buildShuffleVector(), buildSplatBuildVector(), buildSplatVector(), buildStore(), buildUnmerge(), buildVScale(), buildZExtInReg(), llvm::createLibcall(), emitLoadFromConstantPool(), llvm::generateEnqueueInst(), llvm::generateGroupInst(), llvm::generateGroupUniformInst(), llvm::generateImageMiscQueryInst(), llvm::generateImageSizeQueryInst(), llvm::generateIntelSubgroupsInst(), llvm::generateLoadStoreInst(), llvm::generateReadImageInst(), llvm::generateSampleImageInst(), llvm::generateSpecConstantInst(), llvm::generateWriteImageInst(), llvm::genWorkgroupQuery(), getMemsetValue(), insertBitcasts(), llvm::AArch64LegalizerInfo::legalizeCustom(), llvm::ARMLegalizerInfo::legalizeCustom(), llvm::MipsLegalizerInfo::legalizeCustom(), llvm::AArch64LegalizerInfo::legalizeIntrinsic(), llvm::RISCVLegalizerInfo::legalizeIntrinsic(), llvm::LegalizerHelper::libcall(), llvm::SPIRV::lowerBuiltin(), llvm::SPIRV::lowerBuiltinType(), llvm::SPIRVCallLowering::lowerCall(), llvm::SPIRVCallLowering::lowerFormalArguments(), llvm::InlineAsmLowering::lowerInlineAsm(), llvm::LegalizerHelper::lowerTRUNC(), materializePtrAdd(), and llvm::AArch64GISelUtils::tryEmitBZero().

◆ getMRI() [2/2]

const MachineRegisterInfo * llvm::MachineIRBuilder::getMRI ( ) const
inline

Definition at line 296 of file MachineIRBuilder.h.

References llvm::MachineIRBuilderState::MRI.

◆ getObserver()

GISelChangeObserver * llvm::MachineIRBuilder::getObserver ( )
inline

◆ getPCSections()

MDNode * llvm::MachineIRBuilder::getPCSections ( )
inline

Get the current instruction's PC sections metadata.

Definition at line 387 of file MachineIRBuilder.h.

References llvm::MachineIRBuilderState::PCSections.

Referenced by buildInstrNoInsert().

◆ getState()

MachineIRBuilderState & llvm::MachineIRBuilder::getState ( )
inline

Getter for the State.

Definition at line 299 of file MachineIRBuilder.h.

◆ getTII()

const TargetInstrInfo & llvm::MachineIRBuilder::getTII ( )
inline

◆ insertInstr()

MachineInstrBuilder MachineIRBuilder::insertInstr ( MachineInstrBuilder  MIB)

◆ isObservingChanges()

bool llvm::MachineIRBuilder::isObservingChanges ( ) const
inline

Definition at line 374 of file MachineIRBuilder.h.

References llvm::MachineIRBuilderState::Observer.

◆ materializePtrAdd()

std::optional< MachineInstrBuilder > MachineIRBuilder::materializePtrAdd ( Register Res,
Register  Op0,
const LLT  ValueTy,
uint64_t  Value 
)

Materialize and insert Res = G_PTR_ADD Op0, (G_CONSTANT Value)

G_PTR_ADD adds Value bytes to the pointer specified by Op0, storing the resulting pointer in Res. If Value is zero then no G_PTR_ADD or G_CONSTANT will be created and

Precondition
Op0 will be assigned to Res.
setBasicBlock or setMI must have been called.
Op0 must be a generic virtual register with pointer type.
ValueTy must be a scalar type.
Res must be 0. This is to detect confusion between materializePtrAdd() and buildPtrAdd().
Postcondition
Res will either be a new generic virtual register of the same type as Op0 or Op0 itself.
Returns
a MachineInstrBuilder for the newly created instruction.

Definition at line 210 of file MachineIRBuilder.cpp.

References assert(), buildConstant(), buildPtrAdd(), llvm::MachineRegisterInfo::createGenericVirtualRegister(), getMRI(), getType(), and llvm::LLT::isScalar().

Referenced by llvm::CallLowering::insertSRetLoads(), llvm::CallLowering::insertSRetStores(), and llvm::LegalizerHelper::reduceLoadStoreWidth().

◆ recordInsertion()

void llvm::MachineIRBuilder::recordInsertion ( MachineInstr InsertedInstr) const
inlineprotected

◆ setChangeObserver()

void llvm::MachineIRBuilder::setChangeObserver ( GISelChangeObserver Observer)
inline

◆ setCSEInfo()

void llvm::MachineIRBuilder::setCSEInfo ( GISelCSEInfo Info)
inline

Definition at line 333 of file MachineIRBuilder.h.

References llvm::MachineIRBuilderState::CSEInfo, and Info.

Referenced by llvm::Combiner::Combiner().

◆ setDebugLoc()

void llvm::MachineIRBuilder::setDebugLoc ( const DebugLoc DL)
inline

Set the debug location to DL for all the next build instructions.

Definition at line 378 of file MachineIRBuilder.h.

References llvm::MachineIRBuilderState::DL, and DL.

Referenced by llvm::CombinerHelper::applyExtendThroughPhis(), MachineIRBuilder(), and setInstrAndDebugLoc().

◆ setInsertPt()

void llvm::MachineIRBuilder::setInsertPt ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  II 
)
inline

◆ setInstr()

void llvm::MachineIRBuilder::setInstr ( MachineInstr MI)
inline

◆ setInstrAndDebugLoc()

void llvm::MachineIRBuilder::setInstrAndDebugLoc ( MachineInstr MI)
inline

Set the insertion point to before MI, and set the debug loc to MI's loc.

Precondition
MI must be in getMF().

Definition at line 361 of file MachineIRBuilder.h.

References MI, setDebugLoc(), and setInstr().

Referenced by llvm::CombinerHelper::applyAshShlToSextInreg(), llvm::CombinerHelper::applyBuildFn(), llvm::CombinerHelper::applyBuildFnNoErase(), llvm::CombinerHelper::applyCombineAddP2IToPtrAdd(), llvm::CombinerHelper::applyCombineConstantFoldFpUnary(), llvm::CombinerHelper::applyCombineConstPtrAddToI2P(), llvm::CombinerHelper::applyCombineDivRem(), llvm::CombinerHelper::applyCombineExtOfExt(), llvm::CombinerHelper::applyCombineIndexedLoadStore(), llvm::CombinerHelper::applyCombineShlOfExtend(), llvm::CombinerHelper::applyCombineTruncOfExt(), llvm::CombinerHelper::applyCombineTruncOfShift(), llvm::CombinerHelper::applyCombineUnmergeConstant(), llvm::CombinerHelper::applyCombineUnmergeMergeToPlainValues(), llvm::CombinerHelper::applyCombineUnmergeWithDeadLanesToTrunc(), llvm::CombinerHelper::applyCombineUnmergeZExtToZExt(), AMDGPUCombinerHelper::applyExpandPromotedF16FMed3(), llvm::CombinerHelper::applyExtendThroughPhis(), llvm::CombinerHelper::applyExtractVecEltBuildVec(), AMDGPUCombinerHelper::applyFoldableFneg(), llvm::CombinerHelper::applyFoldBinOpIntoSelect(), llvm::CombinerHelper::applyFsubToFneg(), llvm::CombinerHelper::applyFunnelShiftConstantModulo(), llvm::MipsRegisterBankInfo::applyMappingImpl(), llvm::CombinerHelper::applyOptBrCondByInvertingCond(), llvm::CombinerHelper::applyPtrAddZero(), llvm::CombinerHelper::applyRotateOutOfRange(), llvm::CombinerHelper::applySextInRegOfLoad(), llvm::CombinerHelper::applySextTruncSextLoad(), llvm::CombinerHelper::applyShiftImmedChain(), llvm::CombinerHelper::applyShiftOfShiftedLogic(), llvm::CombinerHelper::applySimplifyURemByPow2(), llvm::CombinerHelper::applyUMulHToLShr(), llvm::CombinerHelper::applyXorOfAndWithSameReg(), llvm::CombinerHelper::buildSDivUsingMul(), llvm::CombinerHelper::buildUDivUsingMul(), llvm::LegalizerHelper::equalizeVectorShuffleLengths(), llvm::LegalizerHelper::legalizeInstrStep(), llvm::LegalizerHelper::lowerRotate(), llvm::LegalizerHelper::moreElementsVectorShuffle(), llvm::LegalizationArtifactCombiner::tryCombineAnyExt(), llvm::LegalizationArtifactCombiner::ArtifactValueFinder::tryCombineMergeLike(), llvm::LegalizationArtifactCombiner::tryCombineSExt(), llvm::LegalizationArtifactCombiner::tryCombineUnmergeValues(), llvm::LegalizationArtifactCombiner::tryCombineZExt(), llvm::AArch64GISelUtils::tryEmitBZero(), and llvm::LegalizerHelper::widenScalar().

◆ setMBB()

void llvm::MachineIRBuilder::setMBB ( MachineBasicBlock MBB)
inline

◆ setMF()

void MachineIRBuilder::setMF ( MachineFunction MF)

◆ setPCSections()

void llvm::MachineIRBuilder::setPCSections ( MDNode MD)
inline

Set the PC sections metadata to MD for all the next build instructions.

Definition at line 384 of file MachineIRBuilder.h.

References llvm::MachineIRBuilderState::PCSections.

Referenced by setInstr().

◆ setState()

void llvm::MachineIRBuilder::setState ( const MachineIRBuilderState NewState)
inline

Setter for the State.

Definition at line 302 of file MachineIRBuilder.h.

◆ stopObservingChanges()

void llvm::MachineIRBuilder::stopObservingChanges ( )
inline

◆ validateBinaryOp()

void MachineIRBuilder::validateBinaryOp ( const LLT  Res,
const LLT  Op0,
const LLT  Op1 
)
protected

Definition at line 187 of file MachineIRBuilder.cpp.

References assert(), llvm::LLT::isScalar(), and llvm::LLT::isVector().

Referenced by buildInstr().

◆ validateSelectOp()

void MachineIRBuilder::validateSelectOp ( const LLT  ResTy,
const LLT  TstTy,
const LLT  Op0Ty,
const LLT  Op1Ty 
)
protected

◆ validateShiftOp()

void MachineIRBuilder::validateShiftOp ( const LLT  Res,
const LLT  Op0,
const LLT  Op1 
)
protected

Definition at line 193 of file MachineIRBuilder.cpp.

References assert(), llvm::LLT::isScalar(), and llvm::LLT::isVector().

Referenced by buildInstr().

◆ validateTruncExt()

void MachineIRBuilder::validateTruncExt ( const LLT  Dst,
const LLT  Src,
bool  IsExtend 
)
protected

◆ validateUnaryOp()

void MachineIRBuilder::validateUnaryOp ( const LLT  Res,
const LLT  Op0 
)
protected

Definition at line 182 of file MachineIRBuilder.cpp.

References assert(), llvm::LLT::isScalar(), and llvm::LLT::isVector().

Referenced by buildInstr().


The documentation for this class was generated from the following files: