LLVM  14.0.0git
Macros | Typedefs | Functions | Variables
HexagonDisassembler.cpp File Reference
#include "MCTargetDesc/HexagonBaseInfo.h"
#include "MCTargetDesc/HexagonMCChecker.h"
#include "MCTargetDesc/HexagonMCInstrInfo.h"
#include "MCTargetDesc/HexagonMCTargetDesc.h"
#include "TargetInfo/HexagonTargetInfo.h"
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCDisassembler/MCDisassembler.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCFixedLenDisassembler.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCInstrInfo.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/MC/TargetRegistry.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
#include <cassert>
#include <cstddef>
#include <cstdint>
#include <memory>
#include "HexagonDepDecoders.inc"
#include "HexagonGenDisassemblerTables.inc"
Include dependency graph for HexagonDisassembler.cpp:

Go to the source code of this file.

Macros

#define DEBUG_TYPE   "hexagon-disassembler"
 

Typedefs

using DecodeStatus = MCDisassembler::DecodeStatus
 

Functions

static DecodeStatus DecodeIntRegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeGeneralSubRegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeIntRegsLow8RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeHvxVRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeDoubleRegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeGeneralDoubleLow8RegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeHvxWRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeHvxVQRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodePredRegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeHvxQRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeCtrRegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeGuestRegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeSysRegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeModRegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeCtrRegs64RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeGuestRegs64RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeSysRegs64RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)
 
static DecodeStatus unsignedImmDecoder (MCInst &MI, unsigned tmp, uint64_t Address, const void *Decoder)
 
static DecodeStatus s32_0ImmDecoder (MCInst &MI, unsigned tmp, uint64_t, const void *Decoder)
 
static DecodeStatus brtargetDecoder (MCInst &MI, unsigned tmp, uint64_t Address, const void *Decoder)
 
static MCDisassemblercreateHexagonDisassembler (const Target &T, const MCSubtargetInfo &STI, MCContext &Ctx)
 
LLVM_EXTERNAL_VISIBILITY void LLVMInitializeHexagonDisassembler ()
 
static void adjustDuplex (MCInst &MI, MCContext &Context)
 
static DecodeStatus DecodeRegisterClass (MCInst &Inst, unsigned RegNo, ArrayRef< MCPhysReg > Table)
 

Variables

static const uint16_t SysRegDecoderTable []
 
static const uint16_t SysReg64DecoderTable []
 

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE   "hexagon-disassembler"

Definition at line 33 of file HexagonDisassembler.cpp.

Typedef Documentation

◆ DecodeStatus

Definition at line 38 of file HexagonDisassembler.cpp.

Function Documentation

◆ adjustDuplex()

static void adjustDuplex ( MCInst MI,
MCContext Context 
)
static

◆ brtargetDecoder()

static DecodeStatus brtargetDecoder ( MCInst MI,
unsigned  tmp,
uint64_t  Address,
const void *  Decoder 
)
static

◆ createHexagonDisassembler()

static MCDisassembler* createHexagonDisassembler ( const Target T,
const MCSubtargetInfo STI,
MCContext Ctx 
)
static

Definition at line 160 of file HexagonDisassembler.cpp.

Referenced by LLVMInitializeHexagonDisassembler().

◆ DecodeCtrRegs64RegisterClass()

static DecodeStatus DecodeCtrRegs64RegisterClass ( MCInst Inst,
unsigned  RegNo,
uint64_t  Address,
const void *  Decoder 
)
static

◆ DecodeCtrRegsRegisterClass()

static DecodeStatus DecodeCtrRegsRegisterClass ( MCInst Inst,
unsigned  RegNo,
uint64_t  Address,
const void *  Decoder 
)
static

◆ DecodeDoubleRegsRegisterClass()

static DecodeStatus DecodeDoubleRegsRegisterClass ( MCInst Inst,
unsigned  RegNo,
uint64_t  Address,
const void *  Decoder 
)
static

Definition at line 595 of file HexagonDisassembler.cpp.

References DecodeRegisterClass().

◆ DecodeGeneralDoubleLow8RegsRegisterClass()

static DecodeStatus DecodeGeneralDoubleLow8RegsRegisterClass ( MCInst Inst,
unsigned  RegNo,
uint64_t  Address,
const void *  Decoder 
)
static

Definition at line 607 of file HexagonDisassembler.cpp.

References DecodeRegisterClass().

◆ DecodeGeneralSubRegsRegisterClass()

static DecodeStatus DecodeGeneralSubRegsRegisterClass ( MCInst Inst,
unsigned  RegNo,
uint64_t  Address,
const void *  Decoder 
)
static

Definition at line 566 of file HexagonDisassembler.cpp.

References DecodeRegisterClass(), R2, R4, and R6.

◆ DecodeGuestRegs64RegisterClass()

static DecodeStatus DecodeGuestRegs64RegisterClass ( MCInst Inst,
unsigned  RegNo,
uint64_t  Address,
const void *  Decoder 
)
static

◆ DecodeGuestRegsRegisterClass()

static DecodeStatus DecodeGuestRegsRegisterClass ( MCInst Inst,
unsigned  RegNo,
uint64_t  Address,
const void *  Decoder 
)
static

◆ DecodeHvxQRRegisterClass()

static DecodeStatus DecodeHvxQRRegisterClass ( MCInst Inst,
unsigned  RegNo,
uint64_t  Address,
const void *  Decoder 
)
static

Definition at line 653 of file HexagonDisassembler.cpp.

References DecodeRegisterClass().

◆ DecodeHvxVQRRegisterClass()

static LLVM_ATTRIBUTE_UNUSED DecodeStatus DecodeHvxVQRRegisterClass ( MCInst Inst,
unsigned  RegNo,
uint64_t  Address,
const void *  Decoder 
)
static

Definition at line 633 of file HexagonDisassembler.cpp.

References DecodeRegisterClass().

◆ DecodeHvxVRRegisterClass()

static DecodeStatus DecodeHvxVRRegisterClass ( MCInst Inst,
unsigned  RegNo,
uint64_t  Address,
const void *  Decoder 
)
static

◆ DecodeHvxWRRegisterClass()

static DecodeStatus DecodeHvxWRRegisterClass ( MCInst Inst,
unsigned  RegNo,
uint64_t  Address,
const void *  Decoder 
)
static

Definition at line 616 of file HexagonDisassembler.cpp.

References DecodeRegisterClass().

◆ DecodeIntRegsLow8RegisterClass()

static DecodeStatus DecodeIntRegsLow8RegisterClass ( MCInst Inst,
unsigned  RegNo,
uint64_t  Address,
const void *  Decoder 
)
static

Definition at line 545 of file HexagonDisassembler.cpp.

References llvm::Address, and DecodeIntRegsRegisterClass().

◆ DecodeIntRegsRegisterClass()

static DecodeStatus DecodeIntRegsRegisterClass ( MCInst Inst,
unsigned  RegNo,
uint64_t  Address,
const void *  Decoder 
)
static

Definition at line 551 of file HexagonDisassembler.cpp.

References DecodeRegisterClass(), IntRegDecoderTable, R2, R4, and R6.

Referenced by DecodeIntRegsLow8RegisterClass().

◆ DecodeModRegsRegisterClass()

static DecodeStatus DecodeModRegsRegisterClass ( MCInst Inst,
unsigned  RegNo,
uint64_t  Address,
const void *  Decoder 
)
static

◆ DecodePredRegsRegisterClass()

static DecodeStatus DecodePredRegsRegisterClass ( MCInst Inst,
unsigned  RegNo,
uint64_t  Address,
const void *  Decoder 
)
static

Definition at line 644 of file HexagonDisassembler.cpp.

References DecodeRegisterClass(), and P2.

◆ DecodeRegisterClass()

static DecodeStatus DecodeRegisterClass ( MCInst Inst,
unsigned  RegNo,
ArrayRef< MCPhysReg >  Table 
)
static

◆ DecodeSysRegs64RegisterClass()

static DecodeStatus DecodeSysRegs64RegisterClass ( MCInst Inst,
unsigned  RegNo,
uint64_t  Address,
const void *  Decoder 
)
static

◆ DecodeSysRegsRegisterClass()

static DecodeStatus DecodeSysRegsRegisterClass ( MCInst Inst,
unsigned  RegNo,
uint64_t  Address,
const void *  Decoder 
)
static

◆ LLVMInitializeHexagonDisassembler()

LLVM_EXTERNAL_VISIBILITY void LLVMInitializeHexagonDisassembler ( )

◆ s32_0ImmDecoder()

static DecodeStatus s32_0ImmDecoder ( MCInst MI,
unsigned  tmp,
uint64_t  ,
const void *  Decoder 
)
static

◆ unsignedImmDecoder()

static DecodeStatus unsignedImmDecoder ( MCInst MI,
unsigned  tmp,
uint64_t  Address,
const void *  Decoder 
)
static

Variable Documentation

◆ SysReg64DecoderTable

const uint16_t SysReg64DecoderTable[]
static
Initial value:
= {
Hexagon::SGP1_0, Hexagon::S3_2, Hexagon::S5_4, Hexagon::S7_6,
Hexagon::S9_8, Hexagon::S11_10, Hexagon::S13_12, Hexagon::S15_14,
Hexagon::S17_16, Hexagon::S19_18, Hexagon::S21_20, Hexagon::S23_22,
Hexagon::S25_24, Hexagon::S27_26, Hexagon::S29_28, Hexagon::S31_30,
Hexagon::S33_32, Hexagon::S35_34, Hexagon::S37_36, Hexagon::S39_38,
Hexagon::S41_40, Hexagon::S43_42, Hexagon::S45_44, Hexagon::S47_46,
Hexagon::S49_48, Hexagon::S51_50, Hexagon::S53_52, Hexagon::S55_54,
Hexagon::S57_56, Hexagon::S59_58, Hexagon::S61_60, Hexagon::S63_62,
Hexagon::S65_64, Hexagon::S67_66, Hexagon::S69_68, Hexagon::S71_70,
Hexagon::S73_72, Hexagon::S75_74, Hexagon::S77_76, Hexagon::S79_78,
}

Definition at line 814 of file HexagonDisassembler.cpp.

Referenced by DecodeSysRegs64RegisterClass().

◆ SysRegDecoderTable

const uint16_t SysRegDecoderTable[]
static
Initial value:
= {
Hexagon::SGP0, Hexagon::SGP1, Hexagon::STID,
Hexagon::ELR, Hexagon::BADVA0, Hexagon::BADVA1,
Hexagon::SSR, Hexagon::CCR, Hexagon::HTID,
Hexagon::BADVA, Hexagon::IMASK, Hexagon::S11,
Hexagon::S12, Hexagon::S13, Hexagon::S14,
Hexagon::S15, Hexagon::EVB, Hexagon::MODECTL,
Hexagon::SYSCFG, Hexagon::S19, Hexagon::S20,
Hexagon::VID, Hexagon::S22, Hexagon::S23,
Hexagon::S24, Hexagon::S25, Hexagon::S26,
Hexagon::CFGBASE, Hexagon::DIAG, Hexagon::REV,
Hexagon::PCYCLELO, Hexagon::PCYCLEHI, Hexagon::ISDBST,
Hexagon::ISDBCFG0, Hexagon::ISDBCFG1, Hexagon::S35,
Hexagon::BRKPTPC0, Hexagon::BRKPTCFG0, Hexagon::BRKPTPC1,
Hexagon::BRKPTCFG1, Hexagon::ISDBMBXIN, Hexagon::ISDBMBXOUT,
Hexagon::ISDBEN, Hexagon::ISDBGPR, Hexagon::S44,
Hexagon::S45, Hexagon::S46, Hexagon::S47,
Hexagon::PMUCNT0, Hexagon::PMUCNT1, Hexagon::PMUCNT2,
Hexagon::PMUCNT3, Hexagon::PMUEVTCFG, Hexagon::PMUCFG,
Hexagon::S54, Hexagon::S55, Hexagon::S56,
Hexagon::S57, Hexagon::S58, Hexagon::S59,
Hexagon::S60, Hexagon::S61, Hexagon::S62,
Hexagon::S63, Hexagon::S64, Hexagon::S65,
Hexagon::S66, Hexagon::S67, Hexagon::S68,
Hexagon::S69, Hexagon::S70, Hexagon::S71,
Hexagon::S72, Hexagon::S73, Hexagon::S74,
Hexagon::S75, Hexagon::S76, Hexagon::S77,
Hexagon::S78, Hexagon::S79, Hexagon::S80,
}

Definition at line 770 of file HexagonDisassembler.cpp.

Referenced by DecodeSysRegsRegisterClass().