LLVM  14.0.0git
MipsAsmBackend.h
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1 //===-- MipsAsmBackend.h - Mips Asm Backend ------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file defines the MipsAsmBackend class.
10 //
11 //===----------------------------------------------------------------------===//
12 //
13 
14 #ifndef LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSASMBACKEND_H
15 #define LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSASMBACKEND_H
16 
18 #include "llvm/ADT/Triple.h"
19 #include "llvm/MC/MCAsmBackend.h"
20 
21 namespace llvm {
22 
23 class MCAssembler;
24 struct MCFixupKindInfo;
25 class MCRegisterInfo;
26 class Target;
27 
28 class MipsAsmBackend : public MCAsmBackend {
29  Triple TheTriple;
30  bool IsN32;
31 
32 public:
33  MipsAsmBackend(const Target &T, const MCRegisterInfo &MRI, const Triple &TT,
34  StringRef CPU, bool N32)
35  : MCAsmBackend(TT.isLittleEndian() ? support::little : support::big),
36  TheTriple(TT), IsN32(N32) {}
37 
38  std::unique_ptr<MCObjectTargetWriter>
39  createObjectTargetWriter() const override;
40 
41  void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
43  uint64_t Value, bool IsResolved,
44  const MCSubtargetInfo *STI) const override;
45 
47  const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
48 
49  unsigned getNumFixupKinds() const override {
51  }
52 
53  /// @name Target Relaxation Interfaces
54  /// @{
55 
56  /// fixupNeedsRelaxation - Target specific predicate for whether a given
57  /// fixup requires the associated instruction to be relaxed.
59  const MCRelaxableFragment *DF,
60  const MCAsmLayout &Layout) const override {
61  // FIXME.
62  llvm_unreachable("RelaxInstruction() unimplemented");
63  return false;
64  }
65 
66  bool writeNopData(raw_ostream &OS, uint64_t Count,
67  const MCSubtargetInfo *STI) const override;
68 
69  bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
70  const MCValue &Target) override;
71 
72  bool isMicroMips(const MCSymbol *Sym) const override;
73 }; // class MipsAsmBackend
74 
75 } // namespace
76 
77 #endif
llvm
This file implements support for optimizing divisions by a constant.
Definition: AllocatorList.h:23
llvm::MCRelaxableFragment
A relaxable fragment holds on to its MCInst, since it may need to be relaxed during the assembler lay...
Definition: MCFragment.h:271
llvm::MCSymbol
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:41
llvm::Target
Target - Wrapper for Target specific information.
Definition: TargetRegistry.h:137
llvm::Triple
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:45
llvm::MipsAsmBackend::createObjectTargetWriter
std::unique_ptr< MCObjectTargetWriter > createObjectTargetWriter() const override
Definition: MipsAsmBackend.cpp:219
llvm::AMDGPU::Exp::Target
Target
Definition: SIDefines.h:742
llvm::Optional
Definition: APInt.h:33
llvm::MipsAsmBackend::getFixupKindInfo
const MCFixupKindInfo & getFixupKindInfo(MCFixupKind Kind) const override
Get information on a fixup kind.
Definition: MipsAsmBackend.cpp:346
llvm::MipsAsmBackend::fixupNeedsRelaxation
bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value, const MCRelaxableFragment *DF, const MCAsmLayout &Layout) const override
fixupNeedsRelaxation - Target specific predicate for whether a given fixup requires the associated in...
Definition: MipsAsmBackend.h:58
llvm::Data
@ Data
Definition: SIMachineScheduler.h:55
llvm::MipsAsmBackend::MipsAsmBackend
MipsAsmBackend(const Target &T, const MCRegisterInfo &MRI, const Triple &TT, StringRef CPU, bool N32)
Definition: MipsAsmBackend.h:33
llvm::MipsAsmBackend::shouldForceRelocation
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup, const MCValue &Target) override
Hook to check if a relocation is needed for some target specific reason.
Definition: MipsAsmBackend.cpp:534
llvm::MCAsmBackend
Generic interface to target specific assembler backends.
Definition: MCAsmBackend.h:36
MCAsmBackend.h
llvm::MutableArrayRef< char >
llvm::support::little
@ little
Definition: Endian.h:27
llvm::raw_ostream
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:53
llvm::lltok::Kind
Kind
Definition: LLToken.h:18
DF
static RegisterPass< DebugifyFunctionPass > DF("debugify-function", "Attach debug info to a function")
llvm::MCAssembler
Definition: MCAssembler.h:60
uint64_t
llvm::MCFixupKindInfo
Target independent information on a fixup kind.
Definition: MCFixupKindInfo.h:15
llvm::Mips::NumTargetFixupKinds
@ NumTargetFixupKinds
Definition: MipsFixupKinds.h:227
Triple.h
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:58
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:134
llvm::MCRegisterInfo
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
Definition: MCRegisterInfo.h:135
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
llvm::GraphProgram::Name
Name
Definition: GraphWriter.h:52
llvm::MCAsmLayout
Encapsulates the layout of an assembly file at a particular point in time.
Definition: MCAsmLayout.h:28
llvm::MipsAsmBackend::isMicroMips
bool isMicroMips(const MCSymbol *Sym) const override
Check whether a given symbol has been flagged with MICROMIPS flag.
Definition: MipsAsmBackend.cpp:577
llvm::MipsAsmBackend::getFixupKind
Optional< MCFixupKind > getFixupKind(StringRef Name) const override
Map a relocation name used in .reloc to a fixup kind.
Definition: MipsAsmBackend.cpp:303
llvm::MCFixupKind
MCFixupKind
Extensible enumeration to represent the type of a fixup.
Definition: MCFixup.h:21
MipsFixupKinds.h
llvm::MipsAsmBackend
Definition: MipsAsmBackend.h:28
support
Reimplement select in terms of SEL *We would really like to support but we need to prove that the add doesn t need to overflow between the two bit chunks *Implement pre post increment support(e.g. PR935) *Implement smarter const ant generation for binops with large immediates. A few ARMv6T2 ops should be pattern matched
Definition: README.txt:10
llvm::HexStyle::Asm
@ Asm
0ffh
Definition: MCInstPrinter.h:34
llvm::MCValue
This represents an "assembler immediate".
Definition: MCValue.h:37
llvm::MipsAsmBackend::applyFixup
void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, const MCValue &Target, MutableArrayRef< char > Data, uint64_t Value, bool IsResolved, const MCSubtargetInfo *STI) const override
ApplyFixup - Apply the Value for given Fixup into the provided data fragment, at the offset specified...
Definition: MipsAsmBackend.cpp:243
llvm::MCSubtargetInfo
Generic base class for all target subtargets.
Definition: MCSubtargetInfo.h:75
llvm::MCFixup
Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...
Definition: MCFixup.h:71
llvm::Value
LLVM Value Representation.
Definition: Value.h:74
llvm::MipsAsmBackend::getNumFixupKinds
unsigned getNumFixupKinds() const override
Get the number of target specific fixup kinds.
Definition: MipsAsmBackend.h:49
llvm::support::big
@ big
Definition: Endian.h:27
llvm::MipsAsmBackend::writeNopData
bool writeNopData(raw_ostream &OS, uint64_t Count, const MCSubtargetInfo *STI) const override
WriteNopData - Write an (optimal) nop sequence of Count bytes to the given output.
Definition: MipsAsmBackend.cpp:521