SIInsertWaitcnts.cpp File Reference

Insert wait instructions for memory reads and writes. More...

#include "AMDGPU.h"
#include "GCNSubtarget.h"
#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
#include "SIMachineFunctionInfo.h"
#include "Utils/AMDGPUBaseInfo.h"
#include "llvm/ADT/MapVector.h"
#include "llvm/ADT/PostOrderIterator.h"
#include "llvm/ADT/Sequence.h"
#include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/CodeGen/MachinePostDominators.h"
#include "llvm/InitializePasses.h"
#include "llvm/Support/DebugCounter.h"
#include "llvm/TargetParser/TargetParser.h"

Go to the source code of this file.

Classes
struct	llvm::enum_iteration_traits< InstCounterType >

Namespaces
namespace	llvm
	This is an optimization pass for GlobalISel generic memory operations.

Macros
#define	DEBUG_TYPE   "si-insert-waitcnts"

Functions
	DEBUG_COUNTER (ForceExpCounter, DEBUG_TYPE"-forceexp", "Force emit s_waitcnt expcnt(0) instrs")
	DEBUG_COUNTER (ForceLgkmCounter, DEBUG_TYPE"-forcelgkm", "Force emit s_waitcnt lgkmcnt(0) instrs")
	DEBUG_COUNTER (ForceVMCounter, DEBUG_TYPE"-forcevm", "Force emit s_waitcnt vmcnt(0) instrs")
static bool	mayWriteLDSThroughDMA (const MachineInstr &MI)
	INITIALIZE_PASS_BEGIN (SIInsertWaitcnts, DEBUG_TYPE, "SI Insert Waitcnts", false, false) INITIALIZE_PASS_END(SIInsertWaitcnts
static bool	updateOperandIfDifferent (MachineInstr &MI, uint16_t OpName, unsigned NewEnc)
static bool	readsVCCZ (const MachineInstr &MI)
static bool	callWaitsOnFunctionEntry (const MachineInstr &MI)
static bool	callWaitsOnFunctionReturn (const MachineInstr &MI)
static bool	isWaitInstr (MachineInstr &Inst)

Variables
static cl::opt< bool >	ForceEmitZeroFlag ("amdgpu-waitcnt-forcezero", cl::desc("Force all waitcnt instrs to be emitted as s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)"), cl::init(false), cl::Hidden)
	DEBUG_TYPE
SI Insert	Waitcnts
SI Insert	false

Detailed Description

Insert wait instructions for memory reads and writes.

Memory reads and writes are issued asynchronously, so we need to insert S_WAITCNT instructions when we want to access any of their results or overwrite any register that's used asynchronously.

TODO: This pass currently keeps one timeline per hardware counter. A more finely-grained approach that keeps one timeline per event type could sometimes get away with generating weaker s_waitcnt instructions. For example, when both SMEM and LDS are in flight and we need to wait for the i-th-last LDS instruction, then an lgkmcnt(i) is actually sufficient, but the pass will currently generate a conservative lgkmcnt(0) because multiple event types are in flight.

Definition in file SIInsertWaitcnts.cpp.

Macro Definition Documentation

DEBUG_TYPE

#define DEBUG_TYPE   "si-insert-waitcnts"

Definition at line 41 of file SIInsertWaitcnts.cpp.

Function Documentation

callWaitsOnFunctionEntry()

static bool callWaitsOnFunctionEntry ( const MachineInstr &  MI )

static

Returns

true if the callee inserts an s_waitcnt 0 on function entry.

Definition at line 981 of file SIInsertWaitcnts.cpp.

callWaitsOnFunctionReturn()

static bool callWaitsOnFunctionReturn ( const MachineInstr &  MI )

static

Returns

true if the callee is expected to wait for any outstanding waits before returning.

Definition at line 991 of file SIInsertWaitcnts.cpp.

DEBUG_COUNTER() [1/3]

DEBUG_COUNTER	(	ForceExpCounter	,
		DEBUG_TYPE"-forceexp"	,
		"Force emit s_waitcnt expcnt(0) instrs"
	)

DEBUG_COUNTER() [2/3]

DEBUG_COUNTER	(	ForceLgkmCounter	,
		DEBUG_TYPE"-forcelgkm"	,
		"Force emit s_waitcnt lgkmcnt(0) instrs"
	)

DEBUG_COUNTER() [3/3]

DEBUG_COUNTER	(	ForceVMCounter	,
		DEBUG_TYPE"-forcevm"	,
		"Force emit s_waitcnt vmcnt(0) instrs"
	)

INITIALIZE_PASS_BEGIN()

INITIALIZE_PASS_BEGIN	(	SIInsertWaitcnts	,
		DEBUG_TYPE	,
		"SI Insert Waitcnts"	,
		false	,
		false
	)

isWaitInstr()

static bool isWaitInstr ( MachineInstr &  Inst )

static

Definition at line 1576 of file SIInsertWaitcnts.cpp.

References llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), and llvm::MachineOperand::isReg().

mayWriteLDSThroughDMA()

static bool mayWriteLDSThroughDMA ( const MachineInstr &  MI )

static

Definition at line 549 of file SIInsertWaitcnts.cpp.

References llvm::SIInstrInfo::isFLAT(), llvm::SIInstrInfo::isMUBUF(), llvm::SIInstrInfo::isVALU(), and MI.

readsVCCZ()

static bool readsVCCZ ( const MachineInstr &  MI )

static

Definition at line 974 of file SIInsertWaitcnts.cpp.

References MI.

updateOperandIfDifferent()

static bool updateOperandIfDifferent ( MachineInstr &  MI, uint16_t  OpName, unsigned  NewEnc  )

static

Definition at line 859 of file SIInsertWaitcnts.cpp.

References assert(), llvm::MachineOperand::getImm(), llvm::AMDGPU::getNamedOperandIdx(), MI, and llvm::MachineOperand::setImm().

Variable Documentation

DEBUG_TYPE

DEBUG_TYPE

Definition at line 848 of file SIInsertWaitcnts.cpp.

false

SI Insert false

Definition at line 848 of file SIInsertWaitcnts.cpp.

ForceEmitZeroFlag

cl::opt< bool > ForceEmitZeroFlag("amdgpu-waitcnt-forcezero", cl::desc("Force all waitcnt instrs to be emitted as s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)"), cl::init(false), cl::Hidden) ( "amdgpu-waitcnt-forcezero"  , cl::desc("Force all waitcnt instrs to be emitted as s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)")  , cl::init(false)  , cl::Hidden    )

static

Waitcnts

SI Insert Waitcnts

Definition at line 848 of file SIInsertWaitcnts.cpp.