25 #define DEBUG_TYPE "asm-printer"
27 #define PRINT_ALIAS_INSTR
28 #include "MipsGenAsmWriter.inc"
32 assert(
MI.getOperand(OpNo).isReg() &&
"Register operand expected.");
33 return MI.getOperand(OpNo).getReg() == R;
81 switch (
MI->getOpcode()) {
86 O <<
"\t.set\tpush\n";
87 O <<
"\t.set\tmips32r2\n";
91 printSaveRestore(
MI, STI,
O);
92 O <<
" # 16 bit inst\n";
96 printSaveRestore(
MI, STI,
O);
101 printSaveRestore(
MI, STI,
O);
102 O <<
" # 16 bit inst\n";
104 case Mips::RestoreX16:
106 printSaveRestore(
MI, STI,
O);
113 !printAlias(*
MI, Address, STI,
O))
117 switch (
MI->getOpcode()) {
122 O <<
"\n\t.set\tpop";
126 void MipsInstPrinter::printOperand(
const MCInst *
MI,
unsigned OpNo,
139 assert(
Op.isExpr() &&
"unknown operand kind in printOperand");
140 Op.getExpr()->print(
O, &
MAI,
true);
143 void MipsInstPrinter::printJumpOperand(
const MCInst *
MI,
unsigned OpNo,
148 return printOperand(
MI, OpNo, STI,
O);
156 void MipsInstPrinter::printBranchOperand(
const MCInst *
MI,
uint64_t Address,
162 return printOperand(
MI, OpNo, STI,
O);
176 template <
unsigned Bits,
unsigned Offset>
177 void MipsInstPrinter::printUImm(
const MCInst *
MI,
int opNum,
183 Imm &= (1 <<
Bits) - 1;
189 printOperand(
MI, opNum, STI,
O);
192 void MipsInstPrinter::printMemOperand(
const MCInst *
MI,
int opNum,
201 switch (
MI->getOpcode()) {
207 case Mips::SWM16_MMR6:
209 case Mips::LWM16_MMR6:
210 opNum =
MI->getNumOperands() - 2;
214 printOperand(
MI, opNum + 1, STI,
O);
216 printOperand(
MI, opNum, STI,
O);
220 void MipsInstPrinter::printMemOperandEA(
const MCInst *
MI,
int opNum,
225 printOperand(
MI, opNum, STI,
O);
227 printOperand(
MI, opNum + 1, STI,
O);
230 void MipsInstPrinter::printFCCOperand(
const MCInst *
MI,
int opNum,
237 void MipsInstPrinter::
242 bool MipsInstPrinter::printAlias(
const char *Str,
const MCInst &
MI,
246 OS <<
"\t" << Str <<
"\t";
248 printBranchOperand(&
MI, Address, OpNo, STI, OS);
250 printOperand(&
MI, OpNo, STI, OS);
254 bool MipsInstPrinter::printAlias(
const char *Str,
const MCInst &
MI,
258 printAlias(Str,
MI, Address, OpNo0, STI, OS, IsBranch);
261 printBranchOperand(&
MI, Address, OpNo1, STI, OS);
263 printOperand(&
MI, OpNo1, STI, OS);
269 switch (
MI.getOpcode()) {
274 return (isReg<Mips::ZERO>(
MI, 0) && isReg<Mips::ZERO>(
MI, 1) &&
275 printAlias(
"b",
MI, Address, 2, STI, OS,
true)) ||
276 (isReg<Mips::ZERO>(
MI, 1) &&
277 printAlias(
"beqz",
MI, Address, 0, 2, STI, OS,
true));
280 return isReg<Mips::ZERO_64>(
MI, 1) &&
281 printAlias(
"beqz",
MI, Address, 0, 2, STI, OS,
true);
285 return isReg<Mips::ZERO>(
MI, 1) &&
286 printAlias(
"bnez",
MI, Address, 0, 2, STI, OS,
true);
289 return isReg<Mips::ZERO_64>(
MI, 1) &&
290 printAlias(
"bnez",
MI, Address, 0, 2, STI, OS,
true);
293 return isReg<Mips::ZERO>(
MI, 0) &&
294 printAlias(
"bal",
MI, Address, 1, STI, OS,
true);
297 return isReg<Mips::FCC0>(
MI, 0) &&
298 printAlias(
"bc1t",
MI, Address, 1, STI, OS,
true);
301 return isReg<Mips::FCC0>(
MI, 0) &&
302 printAlias(
"bc1f",
MI, Address, 1, STI, OS,
true);
306 return (isReg<Mips::ZERO>(
MI, 0) &&
307 printAlias(
"jr",
MI, Address, 1, STI, OS)) ||
308 (isReg<Mips::RA>(
MI, 0) &&
309 printAlias(
"jalr",
MI, Address, 1, STI, OS));
313 return (isReg<Mips::ZERO_64>(
MI, 0) &&
314 printAlias(
"jr",
MI, Address, 1, STI, OS)) ||
315 (isReg<Mips::RA_64>(
MI, 0) &&
316 printAlias(
"jalr",
MI, Address, 1, STI, OS));
321 return isReg<Mips::ZERO>(
MI, 2) &&
322 printAlias(
"not",
MI, Address, 0, 1, STI, OS);
325 return isReg<Mips::ZERO_64>(
MI, 2) &&
326 printAlias(
"not",
MI, Address, 0, 1, STI, OS);
331 return isReg<Mips::ZERO>(
MI, 2) &&
332 printAlias(
"move",
MI, Address, 0, 1, STI, OS);
338 void MipsInstPrinter::printSaveRestore(
const MCInst *
MI,
341 for (
unsigned i = 0,
e =
MI->getNumOperands();
i !=
e; ++
i) {
342 if (
i != 0)
O <<
", ";
343 if (
MI->getOperand(
i).isReg())
346 printUImm<16>(
MI,
i, STI,
O);
350 void MipsInstPrinter::printRegisterList(
const MCInst *
MI,
int opNum,
355 for (
int i = opNum,
e =
MI->getNumOperands() - 2;
i !=
e; ++
i) {