10#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPU_H
11#define LLVM_LIB_TARGET_AMDGPU_AMDGPU_H
20class AMDGPUTargetMachine;
246 :
TM(
TM), ScanImpl(ScanImpl) {}
436 static const bool ASAliasRules[10][10] = {
438 {
true,
true,
false,
true,
true,
true,
true,
true,
true,
true},
439 {
true,
true,
false,
false,
true,
false,
true,
true,
true,
true},
440 {
false,
false,
true,
false,
false,
false,
false,
false,
false,
false},
441 {
true,
false,
false,
true,
false,
false,
false,
false,
false,
false},
442 {
true,
true,
false,
false,
false,
false,
true,
true,
true,
true},
443 {
true,
false,
false,
false,
false,
true,
false,
false,
false,
false},
444 {
true,
true,
false,
false,
true,
false,
false,
true,
true,
true},
445 {
true,
true,
false,
false,
true,
false,
true,
true,
true,
true},
446 {
true,
true,
false,
false,
true,
false,
true,
true,
true,
true},
447 {
true,
true,
false,
false,
true,
false,
true,
true,
true,
true},
451 return ASAliasRules[AS1][AS2];
AMDGPU address space definition.
const char LLVMTargetMachineRef TM
This header defines various interfaces for pass management in LLVM.
PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM)
AMDGPUAttributorPass(TargetMachine &TM)
PreservedAnalyses run(Function &, FunctionAnalysisManager &)
AMDGPUCodeGenPreparePass(TargetMachine &TM)
AMDGPULowerKernelArgumentsPass(TargetMachine &TM)
PreservedAnalyses run(Function &, FunctionAnalysisManager &)
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM)
AMDGPURewriteUndefForPHIPass()=default
A container for analyses that lazily runs them and caches their results.
FunctionPass class - This class is used to implement most global optimizations.
ImmutablePass class - This class is used to provide information that does not need to be run.
ModulePass class - This class is used to implement unstructured interprocedural optimizations and ana...
A Module instance is used to store all the information related to an LLVM module.
PassRegistry - This class manages the registration and intitialization of the pass subsystem as appli...
Pass interface - Implemented by all 'passes'.
A set of analyses that are preserved following a run of a transformation pass.
Primary interface to the complete machine description for the target machine.
@ CONSTANT_ADDRESS_32BIT
Address space for 32-bit constant memory.
@ CONSTANT_ADDRESS
Address space for constant memory (VTX2).
@ FLAT_ADDRESS
Address space for flat memory.
@ GLOBAL_ADDRESS
Address space for global memory (RAT0, VTX0).
bool isFlatGlobalAddrSpace(unsigned AS)
static bool addrspacesMayAlias(unsigned AS1, unsigned AS2)
bool isExtendedGlobalAddrSpace(unsigned AS)
This is an optimization pass for GlobalISel generic memory operations.
void initializeSIFormMemoryClausesPass(PassRegistry &)
char & SIPreAllocateWWMRegsID
ImmutablePass * createAMDGPUAAWrapperPass()
FunctionPass * createSIPreAllocateWWMRegsPass()
FunctionPass * createAMDGPUSetWavePriorityPass()
char & AMDGPUCtorDtorLoweringLegacyPassID
void initializeAMDGPUInsertSingleUseVDSTPass(PassRegistry &)
void initializeGCNCreateVOPDPass(PassRegistry &)
ModulePass * createAMDGPUOpenCLEnqueuedBlockLoweringPass()
char & AMDGPUAnnotateKernelFeaturesID
char & GCNPreRAOptimizationsID
void initializeGCNPreRAOptimizationsPass(PassRegistry &)
void initializeGCNRewritePartialRegUsesPass(llvm::PassRegistry &)
void initializeAMDGPUPerfHintAnalysisPass(PassRegistry &)
char & SIMemoryLegalizerID
void initializeAMDGPUAttributorLegacyPass(PassRegistry &)
void initializeAMDGPUDAGToDAGISelPass(PassRegistry &)
FunctionPass * createSIModeRegisterPass()
void initializeAMDGPUAAWrapperPassPass(PassRegistry &)
ModulePass * createAMDGPULowerBufferFatPointersPass()
void initializeSIModeRegisterPass(PassRegistry &)
ModulePass * createAMDGPUCtorDtorLoweringLegacyPass()
void initializeSIOptimizeVGPRLiveRangePass(PassRegistry &)
char & AMDGPUImageIntrinsicOptimizerID
void initializeAMDGPULateCodeGenPreparePass(PassRegistry &)
void initializeAMDGPURewriteUndefForPHILegacyPass(PassRegistry &)
char & AMDGPUPromoteKernelArgumentsID
FunctionPass * createAMDGPUPreLegalizeCombiner(bool IsOptNone)
char & GCNRewritePartialRegUsesID
FunctionPass * createAMDGPUPostLegalizeCombiner(bool IsOptNone)
void initializeAMDGPUAnnotateUniformValuesPass(PassRegistry &)
void initializeSIShrinkInstructionsPass(PassRegistry &)
FunctionPass * createAMDGPURewriteOutArgumentsPass()
void initializeGCNPreRALongBranchRegPass(PassRegistry &)
char & AMDGPUResourceUsageAnalysisID
char & SILoadStoreOptimizerID
FunctionPass * createSIWholeQuadModePass()
ModulePass * createAMDGPULowerKernelAttributesPass()
ModulePass * createAMDGPUAlwaysInlinePass(bool GlobalOpt=true)
FunctionPass * createSIPeepholeSDWAPass()
void initializeSIPreEmitPeepholePass(PassRegistry &)
FunctionPass * createSILoadStoreOptimizerPass()
char & SILowerWWMCopiesID
void initializeSIFixVGPRCopiesPass(PassRegistry &)
ModulePass * createAMDGPUUnifyMetadataPass()
void initializeAMDGPUMachineCFGStructurizerPass(PassRegistry &)
void initializeAMDGPUGlobalISelDivergenceLoweringPass(PassRegistry &)
void initializeAMDGPURemoveIncompatibleFunctionsPass(PassRegistry &)
void initializeSILowerWWMCopiesPass(PassRegistry &)
void initializeGCNNSAReassignPass(PassRegistry &)
void initializeSIInsertWaitcntsPass(PassRegistry &)
char & AMDGPUInsertSingleUseVDSTID
char & SIFormMemoryClausesID
char & AMDGPURemoveIncompatibleFunctionsID
void initializeAMDGPULowerModuleLDSLegacyPass(PassRegistry &)
void initializeAMDGPUCtorDtorLoweringLegacyPass(PassRegistry &)
void initializeAMDGPURegBankCombinerPass(PassRegistry &)
char & AMDGPUGlobalISelDivergenceLoweringID
void initializeSILoadStoreOptimizerPass(PassRegistry &)
void initializeSILateBranchLoweringPass(PassRegistry &)
void initializeSIPeepholeSDWAPass(PassRegistry &)
FunctionPass * createAMDGPUPromoteAllocaToVector()
char & AMDGPULateCodeGenPrepareID
char & AMDGPUUnifyDivergentExitNodesID
char & SIInsertWaitcntsID
FunctionPass * createAMDGPUAtomicOptimizerPass(ScanOptions ScanStrategy)
char & AMDGPUPrintfRuntimeBindingID
void initializeAMDGPURewriteOutArgumentsPass(PassRegistry &)
void initializeAMDGPUExternalAAWrapperPass(PassRegistry &)
void initializeAMDGPULowerKernelArgumentsPass(PassRegistry &)
char & AMDGPUPerfHintAnalysisID
char & SILowerSGPRSpillsID
char & SILateBranchLoweringPassID
FunctionPass * createGCNPreRAOptimizationsPass()
FunctionPass * createSIShrinkInstructionsPass()
void initializeAMDGPUAnnotateKernelFeaturesPass(PassRegistry &)
void initializeSIPostRABundlerPass(PassRegistry &)
void initializeAMDGPUPromoteAllocaToVectorPass(PassRegistry &)
Pass * createAMDGPUAttributorLegacyPass()
void initializeSIWholeQuadModePass(PassRegistry &)
FunctionPass * createAMDGPULowerKernelArgumentsPass()
char & AMDGPUInsertDelayAluID
Pass * createAMDGPUAnnotateKernelFeaturesPass()
char & SIOptimizeVGPRLiveRangeID
char & SIOptimizeExecMaskingPreRAID
char & AMDGPULowerModuleLDSLegacyPassID
void initializeSIInsertHardClausesPass(PassRegistry &)
FunctionPass * createSIPostRABundlerPass()
FunctionPass * createSIFormMemoryClausesPass()
void initializeAMDGPUPostLegalizerCombinerPass(PassRegistry &)
Pass * createAMDGPUStructurizeCFGPass()
CodeGenOptLevel
Code generation optimization level.
char & AMDGPULowerBufferFatPointersID
void initializeSIAnnotateControlFlowPass(PassRegistry &)
ModulePass * createAMDGPUPrintfRuntimeBinding()
void initializeSIMemoryLegalizerPass(PassRegistry &)
char & AMDGPUUnifyMetadataID
void initializeAMDGPUImageIntrinsicOptimizerPass(PassRegistry &)
FunctionPass * createAMDGPUAnnotateUniformValues()
ModulePass * createAMDGPULowerModuleLDSLegacyPass(const AMDGPUTargetMachine *TM=nullptr)
void initializeAMDGPUPreLegalizerCombinerPass(PassRegistry &)
FunctionPass * createAMDGPUPromoteAlloca()
char & SIPreEmitPeepholeID
ModulePass * createAMDGPURemoveIncompatibleFunctionsPass(const TargetMachine *)
FunctionPass * createSILowerI1CopiesPass()
void initializeGCNRegPressurePrinterPass(PassRegistry &)
char & AMDGPURewriteOutArgumentsID
void initializeAMDGPUArgumentUsageInfoPass(PassRegistry &)
void initializeSIPreAllocateWWMRegsPass(PassRegistry &)
FunctionPass * createAMDGPUCodeGenPreparePass()
FunctionPass * createAMDGPUISelDag(TargetMachine &TM, CodeGenOptLevel OptLevel)
This pass converts a legalized DAG into a AMDGPU-specific.
void initializeAMDGPUAtomicOptimizerPass(PassRegistry &)
char & AMDGPUMachineCFGStructurizerID
char & AMDGPULowerKernelAttributesID
char & GCNRegPressurePrinterID
FunctionPass * createAMDGPURegBankCombiner(bool IsOptNone)
char & AMDGPUPromoteAllocaID
FunctionPass * createSIFoldOperandsPass()
void initializeSIOptimizeExecMaskingPreRAPass(PassRegistry &)
void initializeAMDGPUMarkLastScratchLoadPass(PassRegistry &)
ImmutablePass * createAMDGPUExternalAAWrapperPass()
void initializeAMDGPUCodeGenPreparePass(PassRegistry &)
FunctionPass * createAMDGPURewriteUndefForPHILegacyPass()
void initializeSILowerSGPRSpillsPass(PassRegistry &)
void initializeAMDGPULowerKernelAttributesPass(PassRegistry &)
char & SIInsertHardClausesID
FunctionPass * createAMDGPUMachineCFGStructurizerPass()
void initializeAMDGPUResourceUsageAnalysisPass(PassRegistry &)
void initializeSIFixSGPRCopiesPass(PassRegistry &)
void initializeSILowerI1CopiesPass(PassRegistry &)
char & SILowerControlFlowID
char & AMDGPUAtomicOptimizerID
char & SIAnnotateControlFlowPassID
FunctionPass * createLowerWWMCopiesPass()
void initializeSIOptimizeExecMaskingPass(PassRegistry &)
char & AMDGPUAnnotateUniformValuesPassID
FunctionPass * createAMDGPUGlobalISelDivergenceLoweringPass()
FunctionPass * createSIMemoryLegalizerPass()
void initializeSIFoldOperandsPass(PassRegistry &)
void initializeSILowerControlFlowPass(PassRegistry &)
char & AMDGPUOpenCLEnqueuedBlockLoweringID
void initializeAMDGPURegBankSelectPass(PassRegistry &)
char & AMDGPURewriteUndefForPHILegacyPassID
FunctionPass * createSIOptimizeVGPRLiveRangePass()
FunctionPass * createAMDGPUImageIntrinsicOptimizerPass(const TargetMachine *)
void initializeAMDGPUUnifyDivergentExitNodesPass(PassRegistry &)
void initializeAMDGPULowerBufferFatPointersPass(PassRegistry &)
FunctionPass * createSIInsertWaitcntsPass()
void initializeGCNDPPCombinePass(PassRegistry &)
FunctionPass * createSIOptimizeExecMaskingPreRAPass()
FunctionPass * createGCNDPPCombinePass()
FunctionPass * createAMDGPULateCodeGenPreparePass()
char & AMDGPUMarkLastScratchLoadID
FunctionPass * createSIFixSGPRCopiesPass()
void initializeAMDGPUPrintfRuntimeBindingPass(PassRegistry &)
void initializeAMDGPUPromoteAllocaPass(PassRegistry &)
void initializeAMDGPUOpenCLEnqueuedBlockLoweringPass(PassRegistry &)
char & AMDGPUPromoteAllocaToVectorID
void initializeAMDGPUInsertDelayAluPass(PassRegistry &)
char & SIOptimizeExecMaskingID
void initializeAMDGPUUnifyMetadataPass(PassRegistry &)
FunctionPass * createSIFixControlFlowLiveIntervalsPass()
FunctionPass * createSIAnnotateControlFlowPass()
Create the annotation pass.
char & AMDGPULowerKernelArgumentsID
void initializeAMDGPUAlwaysInlinePass(PassRegistry &)
char & AMDGPUCodeGenPrepareID
void initializeAMDGPUSetWavePriorityPass(PassRegistry &)
char & SIShrinkInstructionsID
FunctionPass * createAMDGPUPromoteKernelArgumentsPass()
char & GCNPreRALongBranchRegID
void initializeAMDGPUPromoteKernelArgumentsPass(PassRegistry &)
AMDGPUAlwaysInlinePass(bool GlobalOpt=true)
PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM)
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM)
AMDGPUAtomicOptimizerPass(TargetMachine &TM, ScanOptions ScanImpl)
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM)
AMDGPUImageIntrinsicOptimizerPass(TargetMachine &TM)
PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM)
AMDGPULowerBufferFatPointersPass(const TargetMachine &TM)
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM)
PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM)
AMDGPULowerModuleLDSPass(const AMDGPUTargetMachine &TM_)
const AMDGPUTargetMachine & TM
PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM)
AMDGPUSimplifyLibCallsPass()
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM)
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM)
A CRTP mix-in to automatically provide informational APIs needed for passes.