LLVM 19.0.0git
VETargetMachine.cpp
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1//===-- VETargetMachine.cpp - Define TargetMachine for VE -----------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9//
10//===----------------------------------------------------------------------===//
11
12#include "VETargetMachine.h"
14#include "VE.h"
17#include "llvm/CodeGen/Passes.h"
22#include <optional>
23
24using namespace llvm;
25
26#define DEBUG_TYPE "ve"
27
29 // Register the target.
31
34}
35
36static std::string computeDataLayout(const Triple &T) {
37 // Aurora VE is little endian
38 std::string Ret = "e";
39
40 // Use ELF mangling
41 Ret += "-m:e";
42
43 // Alignments for 64 bit integers.
44 Ret += "-i64:64";
45
46 // VE supports 32 bit and 64 bits integer on registers
47 Ret += "-n32:64";
48
49 // Stack alignment is 128 bits
50 Ret += "-S128";
51
52 // Vector alignments are 64 bits
53 // Need to define all of them. Otherwise, each alignment becomes
54 // the size of each data by default.
55 Ret += "-v64:64:64"; // for v2f32
56 Ret += "-v128:64:64";
57 Ret += "-v256:64:64";
58 Ret += "-v512:64:64";
59 Ret += "-v1024:64:64";
60 Ret += "-v2048:64:64";
61 Ret += "-v4096:64:64";
62 Ret += "-v8192:64:64";
63 Ret += "-v16384:64:64"; // for v256f64
64
65 return Ret;
66}
67
68static Reloc::Model getEffectiveRelocModel(std::optional<Reloc::Model> RM) {
69 return RM.value_or(Reloc::Static);
70}
71
72namespace {
73class VEELFTargetObjectFile : public TargetLoweringObjectFileELF {
74 void Initialize(MCContext &Ctx, const TargetMachine &TM) override {
76 InitializeELF(TM.Options.UseInitArray);
77 }
78};
79} // namespace
80
81static std::unique_ptr<TargetLoweringObjectFile> createTLOF() {
82 return std::make_unique<VEELFTargetObjectFile>();
83}
84
85/// Create an Aurora VE architecture model
87 StringRef CPU, StringRef FS,
89 std::optional<Reloc::Model> RM,
90 std::optional<CodeModel::Model> CM,
91 CodeGenOptLevel OL, bool JIT)
92 : LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options,
94 getEffectiveCodeModel(CM, CodeModel::Small), OL),
95 TLOF(createTLOF()),
96 Subtarget(TT, std::string(CPU), std::string(FS), *this) {
98}
99
101
104 return TargetTransformInfo(VETTIImpl(this, F));
105}
106
108 BumpPtrAllocator &Allocator, const Function &F,
109 const TargetSubtargetInfo *STI) const {
110 return VEMachineFunctionInfo::create<VEMachineFunctionInfo>(Allocator, F,
111 STI);
112}
113
114namespace {
115/// VE Code Generator Pass Configuration Options.
116class VEPassConfig : public TargetPassConfig {
117public:
118 VEPassConfig(VETargetMachine &TM, PassManagerBase &PM)
119 : TargetPassConfig(TM, PM) {}
120
121 VETargetMachine &getVETargetMachine() const {
122 return getTM<VETargetMachine>();
123 }
124
125 void addIRPasses() override;
126 bool addInstSelector() override;
127 void addPreEmitPass() override;
128};
129} // namespace
130
132 return new VEPassConfig(*this, PM);
133}
134
135void VEPassConfig::addIRPasses() {
136 // VE requires atomic expand pass.
137 addPass(createAtomicExpandPass());
139}
140
141bool VEPassConfig::addInstSelector() {
142 addPass(createVEISelDag(getVETargetMachine()));
143 return false;
144}
145
146void VEPassConfig::addPreEmitPass() {
147 // LVLGen should be called after scheduling and register allocation
148 addPass(createLVLGenPass());
149}
#define LLVM_EXTERNAL_VISIBILITY
Definition: Compiler.h:135
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang", "erlang-compatible garbage collector")
static LVOptions Options
Definition: LVOptions.cpp:25
static std::string computeDataLayout()
#define F(x, y, z)
Definition: MD5.cpp:55
const char LLVMTargetMachineRef TM
Basic Register Allocator
Target-Independent Code Generator Pass Configuration Options pass.
LLVM_EXTERNAL_VISIBILITY void LLVMInitializeVETarget()
static Reloc::Model getEffectiveRelocModel(std::optional< Reloc::Model > RM)
static std::unique_ptr< TargetLoweringObjectFile > createTLOF()
This file a TargetTransformInfo::Concept conforming object specific to the VE target machine.
Allocate memory in an ever growing pool, as if by bump-pointer.
Definition: Allocator.h:66
This class describes a target machine that is implemented with the LLVM target-independent code gener...
Context object for machine code objects.
Definition: MCContext.h:76
PassRegistry - This class manages the registration and intitialization of the pass subsystem as appli...
Definition: PassRegistry.h:37
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
void Initialize(MCContext &Ctx, const TargetMachine &TM) override
This method must be called before any actual lowering is done.
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:78
std::unique_ptr< const MCSubtargetInfo > STI
Target-Independent Code Generator Pass Configuration Options.
virtual void addIRPasses()
Add common target configurable passes that perform LLVM IR to IR transforms following machine indepen...
TargetSubtargetInfo - Generic base class for all target subtargets.
This pass provides access to the codegen interfaces that are needed for IR-level transformations.
Target - Wrapper for Target specific information.
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
~VETargetMachine() override
VETargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, std::optional< Reloc::Model > RM, std::optional< CodeModel::Model > CM, CodeGenOptLevel OL, bool JIT)
Create an Aurora VE architecture model.
MachineFunctionInfo * createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F, const TargetSubtargetInfo *STI) const override
Create the target's instance of MachineFunctionInfo.
TargetPassConfig * createPassConfig(PassManagerBase &PM) override
Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of ...
TargetTransformInfo getTargetTransformInfo(const Function &F) const override
Get a TargetTransformInfo implementation for the target.
PassManagerBase - An abstract interface to allow code to add passes to a pass manager without having ...
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
FunctionPass * createLVLGenPass()
Definition: LVLGen.cpp:38
FunctionPass * createAtomicExpandPass()
AtomicExpandPass - At IR level this pass replace atomic instructions with __atomic_* library calls,...
FunctionPass * createVEISelDag(VETargetMachine &TM)
createVEISelDag - This pass converts a legalized DAG into a VE-specific DAG, ready for instruction sc...
Target & getTheVETarget()
CodeModel::Model getEffectiveCodeModel(std::optional< CodeModel::Model > CM, CodeModel::Model Default)
Helper method for getting the code model, returning Default if CM does not have a value.
CodeGenOptLevel
Code generation optimization level.
Definition: CodeGen.h:54
void initializeVEDAGToDAGISelPass(PassRegistry &)
Implement std::hash so that hash_code can be used in STL containers.
Definition: BitVector.h:858
MachineFunctionInfo - This class can be derived from and used by targets to hold private target-speci...
RegisterTargetMachine - Helper template for registering a target machine implementation,...