LLVM 20.0.0git
X86MachineFunctionInfo.h
Go to the documentation of this file.
1//===-- X86MachineFunctionInfo.h - X86 machine function info ----*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file declares X86-specific per-machine-function information.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_X86_X86MACHINEFUNCTIONINFO_H
14#define LLVM_LIB_TARGET_X86_X86MACHINEFUNCTIONINFO_H
15
16#include "llvm/ADT/ArrayRef.h"
22#include <set>
23
24namespace llvm {
25
27
28class X86MachineFunctionInfo;
29
30namespace yaml {
31template <> struct ScalarEnumerationTraits<AMXProgModelEnum> {
33 YamlIO.enumCase(Value, "None", AMXProgModelEnum::None);
34 YamlIO.enumCase(Value, "DirectReg", AMXProgModelEnum::DirectReg);
35 YamlIO.enumCase(Value, "ManagedRA", AMXProgModelEnum::ManagedRA);
36 }
37};
38
41
44
45 void mappingImpl(yaml::IO &YamlIO) override;
47};
48
50 static void mapping(IO &YamlIO, X86MachineFunctionInfo &MFI) {
51 YamlIO.mapOptional("amxProgModel", MFI.AMXProgModel);
52 }
53};
54} // end namespace yaml
55
56/// X86MachineFunctionInfo - This class is derived from MachineFunction and
57/// contains private X86 target-specific information for each MachineFunction.
59 virtual void anchor();
60
61 /// ForceFramePointer - True if the function is required to use of frame
62 /// pointer for reasons other than it containing dynamic allocation or
63 /// that FP eliminatation is turned off. For example, Cygwin main function
64 /// contains stack pointer re-alignment code which requires FP.
65 bool ForceFramePointer = false;
66
67 /// RestoreBasePointerOffset - Non-zero if the function has base pointer
68 /// and makes call to llvm.eh.sjlj.setjmp. When non-zero, the value is a
69 /// displacement from the frame pointer to a slot where the base pointer
70 /// is stashed.
71 signed char RestoreBasePointerOffset = 0;
72
73 /// WinEHXMMSlotInfo - Slot information of XMM registers in the stack frame
74 /// in bytes.
75 DenseMap<int, unsigned> WinEHXMMSlotInfo;
76
77 /// CalleeSavedFrameSize - Size of the callee-saved register portion of the
78 /// stack frame in bytes.
79 unsigned CalleeSavedFrameSize = 0;
80
81 /// BytesToPopOnReturn - Number of bytes function pops on return (in addition
82 /// to the space used by the return address).
83 /// Used on windows platform for stdcall & fastcall name decoration
84 unsigned BytesToPopOnReturn = 0;
85
86 /// ReturnAddrIndex - FrameIndex for return slot.
87 int ReturnAddrIndex = 0;
88
89 /// FrameIndex for return slot.
90 int FrameAddrIndex = 0;
91
92 /// TailCallReturnAddrDelta - The number of bytes by which return address
93 /// stack slot is moved as the result of tail call optimization.
94 int TailCallReturnAddrDelta = 0;
95
96 /// SRetReturnReg - Some subtargets require that sret lowering includes
97 /// returning the value of the returned struct in a register. This field
98 /// holds the virtual register into which the sret argument is passed.
99 Register SRetReturnReg;
100
101 /// GlobalBaseReg - keeps track of the virtual register initialized for
102 /// use as the global base register. This is used for PIC in some PIC
103 /// relocation models.
104 Register GlobalBaseReg;
105
106 /// VarArgsFrameIndex - FrameIndex for start of varargs area.
107 int VarArgsFrameIndex = 0;
108 /// RegSaveFrameIndex - X86-64 vararg func register save area.
109 int RegSaveFrameIndex = 0;
110 /// VarArgsGPOffset - X86-64 vararg func int reg offset.
111 unsigned VarArgsGPOffset = 0;
112 /// VarArgsFPOffset - X86-64 vararg func fp reg offset.
113 unsigned VarArgsFPOffset = 0;
114 /// ArgumentStackSize - The number of bytes on stack consumed by the arguments
115 /// being passed on the stack.
116 unsigned ArgumentStackSize = 0;
117 /// NumLocalDynamics - Number of local-dynamic TLS accesses.
118 unsigned NumLocalDynamics = 0;
119 /// HasPushSequences - Keeps track of whether this function uses sequences
120 /// of pushes to pass function parameters.
121 bool HasPushSequences = false;
122
123 /// True if the function recovers from an SEH exception, and therefore needs
124 /// to spill and restore the frame pointer.
125 bool HasSEHFramePtrSave = false;
126
127 /// The frame index of a stack object containing the original frame pointer
128 /// used to address arguments in a function using a base pointer.
129 int SEHFramePtrSaveIndex = 0;
130
131 /// The AMX programing model used in the function.
133
134 /// True if this function has a subset of CSRs that is handled explicitly via
135 /// copies.
136 bool IsSplitCSR = false;
137
138 /// True if this function uses the red zone.
139 bool UsesRedZone = false;
140
141 /// True if this function has DYN_ALLOCA instructions.
142 bool HasDynAlloca = false;
143
144 /// True if this function has any preallocated calls.
145 bool HasPreallocatedCall = false;
146
147 /// Whether this function has an extended frame record [Ctx, RBP, Return
148 /// addr]. If so, bit 60 of the in-memory frame pointer will be 1 to enable
149 /// other tools to detect the extended record.
150 bool HasSwiftAsyncContext = false;
151
152 /// Ajust stack for push2/pop2
153 bool PadForPush2Pop2 = false;
154
155 /// Candidate registers for push2/pop2
156 std::set<Register> CandidatesForPush2Pop2;
157
158 /// True if this function has CFI directives that adjust the CFA.
159 /// This is used to determine if we should direct the debugger to use
160 /// the CFA instead of the stack pointer.
161 bool HasCFIAdjustCfa = false;
162
163 MachineInstr *StackPtrSaveMI = nullptr;
164
165 std::optional<int> SwiftAsyncContextFrameIdx;
166
167 // Preallocated fields are only used during isel.
168 // FIXME: Can we find somewhere else to store these?
169 DenseMap<const Value *, size_t> PreallocatedIds;
170 SmallVector<size_t, 0> PreallocatedStackSizes;
171 SmallVector<SmallVector<size_t, 4>, 0> PreallocatedArgOffsets;
172
173 // True if a function clobbers FP/BP according to its calling convention.
174 bool FPClobberedByCall = false;
175 bool BPClobberedByCall = false;
176
177private:
178 /// ForwardedMustTailRegParms - A list of virtual and physical registers
179 /// that must be forwarded to every musttail call.
180 SmallVector<ForwardedRegister, 1> ForwardedMustTailRegParms;
181
182public:
185
187
191 const override;
192
194
195 bool getForceFramePointer() const { return ForceFramePointer;}
196 void setForceFramePointer(bool forceFP) { ForceFramePointer = forceFP; }
197
198 bool getHasPushSequences() const { return HasPushSequences; }
199 void setHasPushSequences(bool HasPush) { HasPushSequences = HasPush; }
200
201 bool getRestoreBasePointer() const { return RestoreBasePointerOffset!=0; }
203 void setRestoreBasePointer(unsigned CalleeSavedFrameSize) {
204 RestoreBasePointerOffset = -CalleeSavedFrameSize;
205 }
206 int getRestoreBasePointerOffset() const {return RestoreBasePointerOffset; }
207
208 DenseMap<int, unsigned>& getWinEHXMMSlotInfo() { return WinEHXMMSlotInfo; }
210 return WinEHXMMSlotInfo; }
211
212 unsigned getCalleeSavedFrameSize() const {
213 return CalleeSavedFrameSize + 8 * padForPush2Pop2();
214 }
215 void setCalleeSavedFrameSize(unsigned bytes) { CalleeSavedFrameSize = bytes; }
216
217 unsigned getBytesToPopOnReturn() const { return BytesToPopOnReturn; }
218 void setBytesToPopOnReturn (unsigned bytes) { BytesToPopOnReturn = bytes;}
219
220 int getRAIndex() const { return ReturnAddrIndex; }
221 void setRAIndex(int Index) { ReturnAddrIndex = Index; }
222
223 int getFAIndex() const { return FrameAddrIndex; }
224 void setFAIndex(int Index) { FrameAddrIndex = Index; }
225
226 int getTCReturnAddrDelta() const { return TailCallReturnAddrDelta; }
227 void setTCReturnAddrDelta(int delta) {TailCallReturnAddrDelta = delta;}
228
229 Register getSRetReturnReg() const { return SRetReturnReg; }
230 void setSRetReturnReg(Register Reg) { SRetReturnReg = Reg; }
231
232 Register getGlobalBaseReg() const { return GlobalBaseReg; }
233 void setGlobalBaseReg(Register Reg) { GlobalBaseReg = Reg; }
234
235 int getVarArgsFrameIndex() const { return VarArgsFrameIndex; }
236 void setVarArgsFrameIndex(int Idx) { VarArgsFrameIndex = Idx; }
237
238 int getRegSaveFrameIndex() const { return RegSaveFrameIndex; }
239 void setRegSaveFrameIndex(int Idx) { RegSaveFrameIndex = Idx; }
240
241 unsigned getVarArgsGPOffset() const { return VarArgsGPOffset; }
242 void setVarArgsGPOffset(unsigned Offset) { VarArgsGPOffset = Offset; }
243
244 unsigned getVarArgsFPOffset() const { return VarArgsFPOffset; }
245 void setVarArgsFPOffset(unsigned Offset) { VarArgsFPOffset = Offset; }
246
247 unsigned getArgumentStackSize() const { return ArgumentStackSize; }
248 void setArgumentStackSize(unsigned size) { ArgumentStackSize = size; }
249
250 unsigned getNumLocalDynamicTLSAccesses() const { return NumLocalDynamics; }
251 void incNumLocalDynamicTLSAccesses() { ++NumLocalDynamics; }
252
253 bool getHasSEHFramePtrSave() const { return HasSEHFramePtrSave; }
254 void setHasSEHFramePtrSave(bool V) { HasSEHFramePtrSave = V; }
255
256 int getSEHFramePtrSaveIndex() const { return SEHFramePtrSaveIndex; }
257 void setSEHFramePtrSaveIndex(int Index) { SEHFramePtrSaveIndex = Index; }
258
259 AMXProgModelEnum getAMXProgModel() const { return AMXProgModel; }
261 assert((AMXProgModel == AMXProgModelEnum::None || AMXProgModel == Model) &&
262 "mixed model is not supported");
263 AMXProgModel = Model;
264 }
265
267 return ForwardedMustTailRegParms;
268 }
269
270 bool isSplitCSR() const { return IsSplitCSR; }
271 void setIsSplitCSR(bool s) { IsSplitCSR = s; }
272
273 bool getUsesRedZone() const { return UsesRedZone; }
274 void setUsesRedZone(bool V) { UsesRedZone = V; }
275
276 bool hasDynAlloca() const { return HasDynAlloca; }
277 void setHasDynAlloca(bool v) { HasDynAlloca = v; }
278
279 bool hasPreallocatedCall() const { return HasPreallocatedCall; }
280 void setHasPreallocatedCall(bool v) { HasPreallocatedCall = v; }
281
282 bool hasSwiftAsyncContext() const { return HasSwiftAsyncContext; }
283 void setHasSwiftAsyncContext(bool v) { HasSwiftAsyncContext = v; }
284
285 bool padForPush2Pop2() const { return PadForPush2Pop2; }
286 void setPadForPush2Pop2(bool V) { PadForPush2Pop2 = V; }
287
289 return CandidatesForPush2Pop2.find(Reg) != CandidatesForPush2Pop2.end();
290 }
292 CandidatesForPush2Pop2.insert(Reg);
293 }
295 return CandidatesForPush2Pop2.size();
296 }
297
298 bool hasCFIAdjustCfa() const { return HasCFIAdjustCfa; }
299 void setHasCFIAdjustCfa(bool v) { HasCFIAdjustCfa = v; }
300
301 void setStackPtrSaveMI(MachineInstr *MI) { StackPtrSaveMI = MI; }
302 MachineInstr *getStackPtrSaveMI() const { return StackPtrSaveMI; }
303
304 std::optional<int> getSwiftAsyncContextFrameIdx() const {
305 return SwiftAsyncContextFrameIdx;
306 }
307 void setSwiftAsyncContextFrameIdx(int v) { SwiftAsyncContextFrameIdx = v; }
308
310 auto Insert = PreallocatedIds.insert({CS, PreallocatedIds.size()});
311 if (Insert.second) {
312 PreallocatedStackSizes.push_back(0);
313 PreallocatedArgOffsets.emplace_back();
314 }
315 return Insert.first->second;
316 }
317
318 void setPreallocatedStackSize(size_t Id, size_t StackSize) {
319 PreallocatedStackSizes[Id] = StackSize;
320 }
321
322 size_t getPreallocatedStackSize(const size_t Id) {
323 assert(PreallocatedStackSizes[Id] != 0 && "stack size not set");
324 return PreallocatedStackSizes[Id];
325 }
326
328 PreallocatedArgOffsets[Id].assign(AO.begin(), AO.end());
329 }
330
332 assert(!PreallocatedArgOffsets[Id].empty() && "arg offsets not set");
333 return PreallocatedArgOffsets[Id];
334 }
335
336 bool getFPClobberedByCall() const { return FPClobberedByCall; }
337 void setFPClobberedByCall(bool C) { FPClobberedByCall = C; }
338
339 bool getBPClobberedByCall() const { return BPClobberedByCall; }
340 void setBPClobberedByCall(bool C) { BPClobberedByCall = C; }
341};
342
343} // End llvm namespace
344
345#endif
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
IO & YamlIO
Definition: ELFYAML.cpp:1294
IRTranslator LLVM IR MI
#define F(x, y, z)
Definition: MD5.cpp:55
unsigned Reg
Basic Register Allocator
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file defines the SmallVector class.
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: ArrayRef.h:41
iterator end() const
Definition: ArrayRef.h:154
iterator begin() const
Definition: ArrayRef.h:153
Allocate memory in an ever growing pool, as if by bump-pointer.
Definition: Allocator.h:66
unsigned size() const
Definition: DenseMap.h:99
std::pair< iterator, bool > insert(const std::pair< KeyT, ValueT > &KV)
Definition: DenseMap.h:211
Representation of each machine instruction.
Definition: MachineInstr.h:69
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: SmallVector.h:587
void assign(size_type NumElts, ValueParamT Elt)
Definition: SmallVector.h:718
reference emplace_back(ArgTypes &&... Args)
Definition: SmallVector.h:951
void push_back(const T &Elt)
Definition: SmallVector.h:427
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1210
TargetSubtargetInfo - Generic base class for all target subtargets.
LLVM Value Representation.
Definition: Value.h:74
X86MachineFunctionInfo - This class is derived from MachineFunction and contains private X86 target-s...
void setBytesToPopOnReturn(unsigned bytes)
const DenseMap< int, unsigned > & getWinEHXMMSlotInfo() const
void setAMXProgModel(AMXProgModelEnum Model)
bool isCandidateForPush2Pop2(Register Reg) const
X86MachineFunctionInfo(const X86MachineFunctionInfo &)=default
ArrayRef< size_t > getPreallocatedArgOffsets(const size_t Id)
void setVarArgsGPOffset(unsigned Offset)
void setArgumentStackSize(unsigned size)
X86MachineFunctionInfo(const Function &F, const TargetSubtargetInfo *STI)
void setPreallocatedArgOffsets(size_t Id, ArrayRef< size_t > AO)
void setRestoreBasePointer(unsigned CalleeSavedFrameSize)
SmallVectorImpl< ForwardedRegister > & getForwardedMustTailRegParms()
void setRestoreBasePointer(const MachineFunction *MF)
std::optional< int > getSwiftAsyncContextFrameIdx() const
size_t getPreallocatedStackSize(const size_t Id)
unsigned getNumLocalDynamicTLSAccesses() const
void setPreallocatedStackSize(size_t Id, size_t StackSize)
DenseMap< int, unsigned > & getWinEHXMMSlotInfo()
MachineInstr * getStackPtrSaveMI() const
MachineFunctionInfo * clone(BumpPtrAllocator &Allocator, MachineFunction &DestMF, const DenseMap< MachineBasicBlock *, MachineBasicBlock * > &Src2DstMBB) const override
Make a functionally equivalent copy of this MachineFunctionInfo in MF.
void initializeBaseYamlFields(const yaml::X86MachineFunctionInfo &YamlMFI)
AMXProgModelEnum getAMXProgModel() const
void setVarArgsFPOffset(unsigned Offset)
void addCandidateForPush2Pop2(Register Reg)
void setStackPtrSaveMI(MachineInstr *MI)
void setCalleeSavedFrameSize(unsigned bytes)
size_t getPreallocatedIdForCallSite(const Value *CS)
@ C
The default llvm calling convention, compatible with C.
Definition: CallingConv.h:34
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
@ Offset
Definition: DWP.cpp:480
auto size(R &&Range, std::enable_if_t< std::is_base_of< std::random_access_iterator_tag, typename std::iterator_traits< decltype(Range.begin())>::iterator_category >::value, void > *=nullptr)
Get the size of a range.
Definition: STLExtras.h:1680
MachineFunctionInfo - This class can be derived from and used by targets to hold private target-speci...
Targets should override this in a way that mirrors the implementation of llvm::MachineFunctionInfo.
static void mapping(IO &YamlIO, X86MachineFunctionInfo &MFI)
static void enumeration(IO &YamlIO, AMXProgModelEnum &Value)
void mappingImpl(yaml::IO &YamlIO) override