llvm::X86_MC Namespace Reference

Classes
class	X86MCInstrAnalysis

Functions
static std::vector< std::pair< uint64_t, uint64_t > >	findX86PltEntries (uint64_t PltSectionVA, ArrayRef< uint8_t > PltContents, uint64_t GotPltSectionVA)
static std::vector< std::pair< uint64_t, uint64_t > >	findX86_64PltEntries (uint64_t PltSectionVA, ArrayRef< uint8_t > PltContents)
std::string	ParseX86Triple (const Triple &TT)
unsigned	getDwarfRegFlavour (const Triple &TT, bool isEH)
void	initLLVMToSEHAndCVRegMapping (MCRegisterInfo *MRI)
bool	hasLockPrefix (const MCInst &MI)
	Returns true if this instruction has a LOCK prefix. More...
bool	is16BitMemOperand (const MCInst &MI, unsigned Op, const MCSubtargetInfo &STI)
bool	is32BitMemOperand (const MCInst &MI, unsigned Op)
bool	is64BitMemOperand (const MCInst &MI, unsigned Op)
bool	needsAddressSizeOverride (const MCInst &MI, const MCSubtargetInfo &STI, int MemoryOperand, uint64_t TSFlags)
	Returns true if this instruction needs an Address-Size override prefix. More...
MCSubtargetInfo *	createX86MCSubtargetInfo (const Triple &TT, StringRef CPU, StringRef FS)
	Create a X86 MCSubtargetInfo instance. More...

Function Documentation

createX86MCSubtargetInfo()

MCSubtargetInfo * llvm::X86_MC::createX86MCSubtargetInfo	(	const Triple &	TT,
		StringRef	CPU,
		StringRef	FS
	)

Create a X86 MCSubtargetInfo instance.

This is exposed so Asm parser, etc. do not need to go through TargetRegistry.

Definition at line 390 of file X86MCTargetDesc.cpp.

References assert(), llvm::StringRef::empty(), llvm::X86AS::FS, and ParseX86Triple().

Referenced by LLVMInitializeX86TargetMC().

findX86_64PltEntries()

static std::vector<std::pair<uint64_t, uint64_t> > llvm::X86_MC::findX86_64PltEntries ( uint64_t  PltSectionVA, ArrayRef< uint8_t >  PltContents  )

static

Definition at line 599 of file X86MCTargetDesc.cpp.

Referenced by llvm::X86_MC::X86MCInstrAnalysis::findPltEntries().

findX86PltEntries()

static std::vector<std::pair<uint64_t, uint64_t> > llvm::X86_MC::findX86PltEntries ( uint64_t  PltSectionVA, ArrayRef< uint8_t >  PltContents, uint64_t  GotPltSectionVA  )

static

Definition at line 573 of file X86MCTargetDesc.cpp.

Referenced by llvm::X86_MC::X86MCInstrAnalysis::findPltEntries().

getDwarfRegFlavour()

unsigned llvm::X86_MC::getDwarfRegFlavour	(	const Triple &	TT,
		bool	isEH
	)

Definition at line 61 of file X86MCTargetDesc.cpp.

References llvm::DWARFFlavour::X86_32_DarwinEH, llvm::DWARFFlavour::X86_32_Generic, llvm::DWARFFlavour::X86_64, and llvm::Triple::x86_64.

Referenced by createX86MCRegisterInfo().

hasLockPrefix()

bool llvm::X86_MC::hasLockPrefix

(

const MCInst &

MI

)

Returns true if this instruction has a LOCK prefix.

Definition at line 73 of file X86MCTargetDesc.cpp.

References llvm::X86::IP_HAS_LOCK, and MI.

initLLVMToSEHAndCVRegMapping()

void llvm::X86_MC::initLLVMToSEHAndCVRegMapping

(

MCRegisterInfo *

MRI

)

Definition at line 168 of file X86MCTargetDesc.cpp.

References AH, llvm::AArch64CC::AL, BH, llvm::ARCISD::BL, CH, DL, llvm::N86::EAX, llvm::N86::EBP, llvm::N86::EBX, llvm::N86::ECX, llvm::N86::EDI, llvm::N86::EDX, llvm::N86::ESI, llvm::N86::ESP, I, MRI, and SI.

Referenced by createX86MCRegisterInfo(), and llvm::X86RegisterInfo::X86RegisterInfo().

is16BitMemOperand()

bool llvm::X86_MC::is16BitMemOperand	(	const MCInst &	MI,
		unsigned	Op,
		const MCSubtargetInfo &	STI
	)

Parameters

Op	operand # of the memory operand.

Returns

true if the specified instruction has a 16-bit memory operand.

Definition at line 86 of file X86MCTargetDesc.cpp.

References llvm::X86::AddrBaseReg, llvm::X86::AddrIndexReg, llvm::sampleprof::Base, llvm::MCSubtargetInfo::hasFeature(), isMemOperand(), and MI.

Referenced by needsAddressSizeOverride().

is32BitMemOperand()

bool llvm::X86_MC::is32BitMemOperand	(	const MCInst &	MI,
		unsigned	Op
	)

Parameters

Op	operand # of the memory operand.

Returns

true if the specified instruction has a 32-bit memory operand.

Definition at line 97 of file X86MCTargetDesc.cpp.

References llvm::X86::AddrBaseReg, llvm::X86::AddrIndexReg, assert(), llvm::sampleprof::Base, isMemOperand(), and MI.

Referenced by needsAddressSizeOverride().

is64BitMemOperand()

bool llvm::X86_MC::is64BitMemOperand	(	const MCInst &	MI,
		unsigned	Op
	)

Parameters

Op	operand # of the memory operand.

Returns

true if the specified instruction has a 64-bit memory operand.

Definition at line 110 of file X86MCTargetDesc.cpp.

References isMemOperand(), and MI.

Referenced by needsAddressSizeOverride().

needsAddressSizeOverride()

bool llvm::X86_MC::needsAddressSizeOverride	(	const MCInst &	MI,
		const MCSubtargetInfo &	STI,
		int	MemoryOperand,
		uint64_t	TSFlags
	)

Returns true if this instruction needs an Address-Size override prefix.

Definition at line 115 of file X86MCTargetDesc.cpp.

References llvm::X86II::AdSize16, llvm::X86II::AdSize32, llvm::X86II::AdSizeMask, assert(), llvm::N86::EDI, llvm::N86::ESI, llvm::X86II::FormMask, llvm::MCSubtargetInfo::hasFeature(), is16BitMemOperand(), is32BitMemOperand(), is64BitMemOperand(), MI, llvm::X86II::RawFrmDst, llvm::X86II::RawFrmDstSrc, llvm::X86II::RawFrmSrc, SI, and TSFlags.

Referenced by llvm::X86InstPrinterCommon::printInstFlags().

ParseX86Triple()

std::string llvm::X86_MC::ParseX86Triple

(

const Triple &

TT

)

Definition at line 47 of file X86MCTargetDesc.cpp.

References llvm::Triple::CODE16, and llvm::X86AS::FS.

Referenced by createX86MCSubtargetInfo().